commit 5d5a1bbf4e043a7b97e14a8a070d542d483b58c7
author Andrew Geissler <openbmcbump-github@yahoo.com> Wed Mar 13 20:30:52 2019 +0000
committer Andrew Geissler <geissonator@yahoo.com> Mon Mar 18 16:18:38 2019 -0500
tree b54f816c0a6d1df797a1de947ffb40f25c1b6070
parent a9d9e970071285a9c9fd574774356d4489cce1db

intel-ipmi-oem: srcrev bump fcce83df79..7086a88cfe

James Feist (1):
      Add Threshold bit to sensor capabilites

(From meta-intel rev: 78ee092cb1d50300cd3902dbc2b4f247b3a91834)

Change-Id: I54c38d2bfef17b1f717533f8987c028f1449ded1
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>

meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb

diff --git a/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb b/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
index 7bf3d41..4d0d204 100755
--- a/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
+++ b/meta-intel/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
@@ -5,7 +5,7 @@
 LIC_FILES_CHKSUM = "file://LICENSE;md5=a6a4edad4aed50f39a66d098d74b265b"
 
 SRC_URI = "git://github.com/openbmc/intel-ipmi-oem"
-SRCREV = "fcce83df799d9580f48b7f793989c9c96bc882e0"
+SRCREV = "7086a88cfe94db15233bae450b3a03d3566bca68"
 
 S = "${WORKDIR}/git"
 PV = "0.1+git${SRCPV}"