meta-nuvoton: npcm8xx-bootblock: update to 0.2.8
Changelog:
version 0.2.8 - Nov 22 2022
=============
- Bug fix: disable RECALIB in DDR, after training, before sweep phase.
- eSPI: enable auto handshake.
Version 0.2.6 - Oct 26 2022
=============
- Bug fix: If DRAM is 2GB and max DRAM size in header is smaller, GMMAP
should be set according to header, not according to the physical
device.
Version 0.2.4 - Oct 18 2022
=============
- MC: Support 2GB DRAM
- MC: Updated TRFC default to 2GB DRAM and fixed value for 1600/1G
- CLK: always set PLLs by bootblock. Set all dividers in PORST.
- SPI-X: upper limit of 33MHz.
Signed-off-by: Benjamin Fair <benjaminfair@google.com>
Change-Id: Ia82fba195139d245ccb7f62218a900069c575e2c
diff --git a/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock.inc b/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock.inc
index 6910fc9..5319c4e 100644
--- a/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock.inc
+++ b/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock.inc
@@ -10,7 +10,7 @@
SRC_URI = " \
https://github.com/Nuvoton-Israel/npcm8xx-bootblock/blob/${SRCREV}/LICENSE;name=lic \
- https://github.com/Nuvoton-Israel/npcm8xx-bootblock/releases/download/${RELEASE}/arbel_a35_bootblock.bin;downloadfilename=${FILENAME};name=bin \
+ https://github.com/Nuvoton-Israel/npcm8xx-bootblock/releases/download/${RELEASE}/arbel_a35_bootblock.${PV}.bin;downloadfilename=${FILENAME};name=bin \
"
SRC_URI[lic.sha256sum] = "7c34d28e784b202aa4998f477fd0aa9773146952d7f6fa5971369fcdda59cf48"