commit 7bcb91b6337ba1e3676697c82e301d82c155ee02
author Tim Lee <timlee660101@gmail.com> Tue Dec 05 16:32:20 2023 +0800
committer Tim Lee <chli30@nuvoton.com> Mon Dec 11 01:07:23 2023 +0000
tree 4988f487e5b0b482a6bf74a390dd3dda04730b18
parent c7586aec0392fa7dd03e2ec4eb5177cc8bc46481

meta-nuvoton: npcm8xx-bootblock: update to 0.3.9

Changelog:

version 0.3.9 - Nov 29th 2023
=============
- block PLL resetting in secondary boot.
- PLLs are set only after PORST.
  (PLLs only, other dividers like FIU are set on any reset).
- Change print of DRAM type.
- Print all values in MHz (instead of Hz).

Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I409d725b0e8e93b7e8497a0a20243956ee47571b

meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock_0.3.9.bb

diff --git a/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock_0.3.9.bb b/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock_0.3.9.bb
new file mode 100644
index 0000000..45f7946
--- /dev/null
+++ b/meta-nuvoton/recipes-bsp/images/npcm8xx-bootblock_0.3.9.bb
@@ -0,0 +1,3 @@
+SRCREV = "4a12209ba483f511a7bf5090ca5d3872e82299eb"
+
+require npcm8xx-bootblock.inc