aspeed-u-boot-sdk: Update to latest dev commit
Chia-Wei, Wang (1):
aspeed: ast2600: add CPU clock initialization
Dylan Hung (9):
[add] add ECC setting
[update] correct the ecc range
[fix] fix build error when ASPEED_ECC is off
[update] ecc off by default
[update] add ECC enable message
target margin 0 is legal arg.
[fix] fix incorrect DMA base calculation
[update] fix 2600 fpga issue.
[update] update ast2600 fpga config
ryan_chen (8):
add otp strap bspi size info
add pcie support for evb
add for spi aux information
disable h2x pcie at default
add for h2x
add i2c pinctrl
add i2c pinctrl
update enable ast2600 evb i2c
(From meta-aspeed rev: af1e9221445c4932ead0722287873686fe86b399)
Change-Id: I1bfcad52dbd0a27f0e753c8c14d22584156f02b5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed-sdk_2019.04.inc b/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed-sdk_2019.04.inc
index bef5448..4e1d945 100644
--- a/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed-sdk_2019.04.inc
+++ b/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed-sdk_2019.04.inc
@@ -8,7 +8,7 @@
# We use the revision in order to avoid having to fetch it from the
# repo during parse
-SRCREV = "3d624802e82868bc5c2b6314cdff7499d8441761"
+SRCREV = "9b5fc98374593c49133b709f71119222ecfff3eb"
UBRANCH = "aspeed-dev-v2019.04"
SRC_URI = "git://github.com/AspeedTech-BMC/u-boot;branch=${UBRANCH};protocol=https"