diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch
deleted file mode 100644
index 9ae4b39..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 3bc797e097ef2b29acf36560e4d2bfeec31f8d81 Mon Sep 17 00:00:00 2001
-From: Ben Horgan <ben.horgan@arm.com>
-Date: Fri, 4 Mar 2022 16:48:14 +0000
-Subject: [PATCH] feat: emulate cntp timer register accesses using cnthps
-
-Upstream-Status: Inappropriate [Experimental feature]
-Signed-off-by: Ben Horgan <ben.horgan@arm.com>
-Change-Id: I67508203273baf3bd8e6be2d99717028db945715
----
- Makefile                                |   3 +-
- src/arch/aarch64/hypervisor/BUILD.gn    |   1 +
- src/arch/aarch64/hypervisor/cpu.c       |  11 ++-
- src/arch/aarch64/hypervisor/handler.c   |   6 ++
- src/arch/aarch64/hypervisor/timer_el1.c | 104 ++++++++++++++++++++++++
- src/arch/aarch64/hypervisor/timer_el1.h |  20 +++++
- src/arch/aarch64/msr.h                  |   8 ++
- 7 files changed, 150 insertions(+), 3 deletions(-)
- create mode 100644 src/arch/aarch64/hypervisor/timer_el1.c
- create mode 100644 src/arch/aarch64/hypervisor/timer_el1.h
-
-diff --git a/Makefile b/Makefile
-index 95cab9a56bfd..21cca938531d 100644
---- a/Makefile
-+++ b/Makefile
-@@ -60,7 +60,8 @@ CHECKPATCH := $(CURDIR)/third_party/linux/scripts/checkpatch.pl \
- # debug_el1.c : uses XMACROS, which checkpatch doesn't understand.
- # perfmon.c : uses XMACROS, which checkpatch doesn't understand.
- # feature_id.c : uses XMACROS, which checkpatch doesn't understand.
--CHECKPATCH_IGNORE := "src/arch/aarch64/hypervisor/debug_el1.c\|src/arch/aarch64/hypervisor/perfmon.c\|src/arch/aarch64/hypervisor/feature_id.c"
-+# timer_el1.c : uses XMACROS, which checkpatch doesn't understand.
-+CHECKPATCH_IGNORE := "src/arch/aarch64/hypervisor/debug_el1.c\|src/arch/aarch64/hypervisor/perfmon.c\|src/arch/aarch64/hypervisor/feature_id.c\|src/arch/aarch64/hypervisor/timer_el1.c"
- 
- OUT ?= out/$(PROJECT)
- OUT_DIR = out/$(PROJECT)
-diff --git a/src/arch/aarch64/hypervisor/BUILD.gn b/src/arch/aarch64/hypervisor/BUILD.gn
-index 6068d1e8f075..de1a414dac68 100644
---- a/src/arch/aarch64/hypervisor/BUILD.gn
-+++ b/src/arch/aarch64/hypervisor/BUILD.gn
-@@ -45,6 +45,7 @@ source_set("hypervisor") {
-     "handler.c",
-     "perfmon.c",
-     "psci_handler.c",
-+    "timer_el1.c",
-     "vm.c",
-   ]
- 
-diff --git a/src/arch/aarch64/hypervisor/cpu.c b/src/arch/aarch64/hypervisor/cpu.c
-index 5e025b596674..edd5df134cfc 100644
---- a/src/arch/aarch64/hypervisor/cpu.c
-+++ b/src/arch/aarch64/hypervisor/cpu.c
-@@ -98,13 +98,20 @@ void arch_regs_reset(struct vcpu *vcpu)
- 	if (is_primary) {
- 		/*
- 		 * cnthctl_el2 is redefined when VHE is enabled.
--		 * EL1PCTEN, don't trap phys cnt access.
--		 * EL1PCEN, don't trap phys timer access.
-+		 * EL1PCTEN, don't trap phys cnt access. Except when in
-+		 * secure world without vhe.
-+		 * EL1PCEN, don't trap phys timer access. Except when in
-+		 * secure world without vhe.
- 		 */
- 		if (has_vhe_support()) {
- 			cnthctl |= (1U << 10) | (1U << 11);
- 		} else {
-+#if SECURE_WORLD == 1
-+			cnthctl &= ~(1U << 0);
-+			cnthctl &= ~(1U << 1);
-+#else
- 			cnthctl |= (1U << 0) | (1U << 1);
-+#endif
- 		}
- 	}
- 
-diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
-index 3422ff7b8265..c495df40f3f5 100644
---- a/src/arch/aarch64/hypervisor/handler.c
-+++ b/src/arch/aarch64/hypervisor/handler.c
-@@ -34,6 +34,7 @@
- #include "psci_handler.h"
- #include "smc.h"
- #include "sysregs.h"
-+#include "timer_el1.h"
- 
- /**
-  * Hypervisor Fault Address Register Non-Secure.
-@@ -1295,6 +1296,11 @@ void handle_system_register_access(uintreg_t esr_el2)
- 			inject_el1_sysreg_trap_exception(vcpu, esr_el2);
- 			return;
- 		}
-+	} else if (timer_el1_is_register_access(esr_el2)) {
-+		if (!timer_el1_process_access(vcpu, vm_id, esr_el2)) {
-+			inject_el1_unknown_exception(vcpu, esr_el2);
-+			return;
-+		}
- 	} else {
- 		inject_el1_sysreg_trap_exception(vcpu, esr_el2);
- 		return;
-diff --git a/src/arch/aarch64/hypervisor/timer_el1.c b/src/arch/aarch64/hypervisor/timer_el1.c
-new file mode 100644
-index 000000000000..c30e5543f436
---- /dev/null
-+++ b/src/arch/aarch64/hypervisor/timer_el1.c
-@@ -0,0 +1,104 @@
-+/*
-+ * Copyright 2022 The Hafnium Authors.
-+ *
-+ * Use of this source code is governed by a BSD-style
-+ * license that can be found in the LICENSE file or at
-+ * https://opensource.org/licenses/BSD-3-Clause.
-+ */
-+
-+#include "timer_el1.h"
-+
-+#include "hf/dlog.h"
-+
-+#include "msr.h"
-+#include "sysregs.h"
-+
-+/*
-+ * Physical timer (CNTP) register encodings as defined in
-+ * table D13-8 of the ARMv8 ARM (DDI0487F).
-+ * TYPE, op0, op1, crn, crm, op2
-+ * The register names are the concatenation of
-+ * "CNTP_", TYPE and "_EL2".
-+ */
-+#define CNTP_REGISTERS          \
-+	X(CTL,  3, 3, 14, 2, 1) \
-+	X(CVAL, 3, 3, 14, 2, 2) \
-+	X(TVAL, 3, 3, 14, 2, 0) \
-+
-+bool timer_el1_is_register_access(uintreg_t esr)
-+{
-+	uintreg_t sys_register = GET_ISS_SYSREG(esr);
-+	bool is_timer_access;
-+	switch (sys_register) {
-+#define X(type, op0, op1, crn, crm, op2)                  \
-+	case (GET_ISS_ENCODING(op0, op1, crn, crm, op2)): \
-+		is_timer_access = true;                   \
-+		break;
-+			CNTP_REGISTERS
-+#undef X
-+	case (GET_ISS_ENCODING(3, 3, 14, 0, 1)):
-+		is_timer_access = true;
-+		break;
-+	default:
-+		is_timer_access = false;
-+	}
-+
-+	return is_timer_access;
-+}
-+
-+/* Accesses to CNTP timer emulated with CNTHPS */
-+bool timer_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
-+			      uintreg_t esr)
-+{
-+	uintreg_t sys_register = GET_ISS_SYSREG(esr);
-+	uintreg_t rt_register = GET_ISS_RT(esr);
-+	uintreg_t value;
-+
-+	if (ISS_IS_READ(esr)) {
-+		switch (sys_register) {
-+#define X(type, op0, op1, crn, crm, op2)                           \
-+		case (GET_ISS_ENCODING(op0, op1, crn, crm, op2)):  \
-+			value = read_msr(MSR_CNTHPS_##type##_EL2); \
-+			vcpu->regs.r[rt_register] = value;         \
-+			break;
-+				CNTP_REGISTERS
-+#undef X
-+		case (GET_ISS_ENCODING(3, 3, 14, 0, 1)):
-+			value = read_msr(cntpct_el0);
-+			vcpu->regs.r[rt_register] = value;
-+			break;
-+		default:
-+			dlog_notice(
-+				"Unsupported timer register "
-+				"read: "
-+				"op0=%d, op1=%d, crn=%d, crm=%d, op2=%d, "
-+				"rt=%d.\n",
-+				GET_ISS_OP0(esr), GET_ISS_OP1(esr),
-+				GET_ISS_CRN(esr), GET_ISS_CRM(esr),
-+				GET_ISS_OP2(esr), GET_ISS_RT(esr));
-+			break;
-+		}
-+	} else {
-+		value = vcpu->regs.r[rt_register];
-+		switch (sys_register) {
-+#define X(type, op0, op1, crn, crm, op2)                           \
-+		case (GET_ISS_ENCODING(op0, op1, crn, crm, op2)):  \
-+			write_msr(MSR_CNTHPS_##type##_EL2, value); \
-+			break;
-+				CNTP_REGISTERS
-+#undef X
-+		default:
-+			dlog_notice(
-+				"Unsupported timer register "
-+				"write: "
-+				"op0=%d, op1=%d, crn=%d, crm=%d, op2=%d, "
-+				"rt=%d, value=%d.\n",
-+				GET_ISS_OP0(esr), GET_ISS_OP1(esr),
-+				GET_ISS_CRN(esr), GET_ISS_CRM(esr),
-+				GET_ISS_OP2(esr), GET_ISS_RT(esr), value);
-+			break;
-+		}
-+	}
-+
-+	return true;
-+}
-diff --git a/src/arch/aarch64/hypervisor/timer_el1.h b/src/arch/aarch64/hypervisor/timer_el1.h
-new file mode 100644
-index 000000000000..04a43b6ca335
---- /dev/null
-+++ b/src/arch/aarch64/hypervisor/timer_el1.h
-@@ -0,0 +1,20 @@
-+/*
-+ * Copyright 2022 The Hafnium Authors.
-+ *
-+ * Use of this source code is governed by a BSD-style
-+ * license that can be found in the LICENSE file or at
-+ * https://opensource.org/licenses/BSD-3-Clause.
-+ */
-+
-+#pragma once
-+
-+#include "hf/arch/types.h"
-+
-+#include "hf/cpu.h"
-+
-+#include "vmapi/hf/ffa.h"
-+
-+bool timer_el1_is_register_access(uintreg_t esr);
-+
-+bool timer_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
-+			      uintreg_t esr);
-diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h
-index 6edc39f2af48..bf1a66d1d4c5 100644
---- a/src/arch/aarch64/msr.h
-+++ b/src/arch/aarch64/msr.h
-@@ -131,3 +131,11 @@
- #define MSR_ELR_EL12 S3_5_C4_C0_1
- 
- #endif
-+
-+/*
-+ * Secure EL2 Physical timer (CNTHPS) register encodings as defined in
-+ * table D13-8 of the ARMv8 ARM (DDI0487F).
-+ */
-+#define MSR_CNTHPS_CTL_EL2 S3_4_C14_C5_1
-+#define MSR_CNTHPS_CVAL_EL2 S3_4_C14_C5_2
-+#define MSR_CNTHPS_TVAL_EL2 S3_4_C14_C5_0
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch
deleted file mode 100644
index 9627a76..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 1fef5bd2504ce3a203c56a3b66dba773cd4893c6 Mon Sep 17 00:00:00 2001
-From: Davidson K <davidson.kumaresan@arm.com>
-Date: Thu, 8 Sep 2022 10:47:10 +0530
-Subject: [PATCH] feat(vhe): enable vhe and disable branch protection for TC
-
-Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
-Change-Id: I60cd607d9f2bf0114b482980e7ca68e24aaf4d1f
-Upstream-Status: Pending [Not submitted to upstream yet]
----
- BUILD.gn | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/BUILD.gn b/BUILD.gn
-index cc6a78f4fdb8..acd1f9d1634b 100644
---- a/BUILD.gn
-+++ b/BUILD.gn
-@@ -245,7 +245,6 @@ aarch64_toolchains("secure_tc") {
-   heap_pages = 180
-   max_cpus = 8
-   max_vms = 16
--  branch_protection = "standard"
-   toolchain_args = {
-     plat_ffa = "//src/arch/aarch64/plat/ffa:spmc"
-     plat_psci = "//src/arch/aarch64/plat/psci:spmc"
-@@ -254,6 +253,7 @@ aarch64_toolchains("secure_tc") {
-     secure_world = "1"
-     pl011_base_address = "0x7ff80000"
-     enable_mte = "1"
-+    enable_vhe = "1"
-     plat_log_level = "LOG_LEVEL_INFO"
-   }
- }
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch
deleted file mode 100644
index 3e67615..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From 9f5b07e30c82713b9598ea60d9f802bd419b560f Mon Sep 17 00:00:00 2001
-From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
-Date: Tue, 26 Apr 2022 14:43:58 +0100
-Subject: [PATCH] feat: emulate interrupt controller register access
-
-This emulates ICC_SGI1R_EL1 and ICC_IGRPEN1_EL1 register
-
-Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
-Change-Id: I0c11f034f3676067597461a183a341c809adcaa4
-Upstream-Status: Inappropriate [Experimental feature]
----
- src/arch/aarch64/hypervisor/handler.c |  5 ++
- src/arch/aarch64/hypervisor/perfmon.c | 84 +++++++++++++++++++++++++++
- src/arch/aarch64/hypervisor/perfmon.h |  5 ++
- src/arch/aarch64/msr.h                |  3 +
- 4 files changed, 97 insertions(+)
-
-diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c
-index c495df40f3f5..13578fc99670 100644
---- a/src/arch/aarch64/hypervisor/handler.c
-+++ b/src/arch/aarch64/hypervisor/handler.c
-@@ -1301,6 +1301,11 @@ void handle_system_register_access(uintreg_t esr_el2)
- 			inject_el1_unknown_exception(vcpu, esr_el2);
- 			return;
- 		}
-+	} else if (intr_ctrl_is_register_access(esr_el2)) {
-+		if (!intr_ctrl_el1_process_access(vcpu, vm_id, esr_el2)) {
-+			inject_el1_unknown_exception(vcpu, esr_el2);
-+			return;
-+		}
- 	} else {
- 		inject_el1_sysreg_trap_exception(vcpu, esr_el2);
- 		return;
-diff --git a/src/arch/aarch64/hypervisor/perfmon.c b/src/arch/aarch64/hypervisor/perfmon.c
-index f13b035480d8..05e216c84c2e 100644
---- a/src/arch/aarch64/hypervisor/perfmon.c
-+++ b/src/arch/aarch64/hypervisor/perfmon.c
-@@ -116,6 +116,10 @@
- 	X(PMEVTYPER30_EL0   , 3, 3, 14, 15, 6) \
- 	X(PMCCFILTR_EL0     , 3, 3, 14, 15, 7)
- 
-+#define INTR_CTRL_REGISTERS                    \
-+	X(ICC_IGRPEN1_EL1   , 3, 0, 12, 12, 7) \
-+	X(ICC_SGI1R_EL1     , 3, 0, 12, 11, 5) \
-+
- /* clang-format on */
- 
- /**
-@@ -232,3 +236,83 @@ uintreg_t perfmon_get_pmccfiltr_el0_init_value(ffa_vm_id_t vm_id)
- 
- 	return 0;
- }
-+
-+bool intr_ctrl_is_register_access(uintreg_t esr)
-+{
-+	uintreg_t op0 = GET_ISS_OP0(esr);
-+	uintreg_t op1 = GET_ISS_OP1(esr);
-+	uintreg_t crn = GET_ISS_CRN(esr);
-+	uintreg_t crm = GET_ISS_CRM(esr);
-+
-+	if (op0 == 3 && op1 == 0 && crn == 12 && crm == 12) {
-+		return true;
-+	}
-+
-+	if (op0 == 3 && op1 == 0 && crn == 12 && crm == 11) {
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+bool intr_ctrl_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
-+				  uintreg_t esr)
-+{
-+	uintreg_t sys_register = GET_ISS_SYSREG(esr);
-+	uintreg_t rt_register = GET_ISS_RT(esr);
-+	uintreg_t value;
-+
-+	/* +1 because Rt can access register XZR */
-+	CHECK(rt_register < NUM_GP_REGS + 1);
-+
-+	if (ISS_IS_READ(esr)) {
-+		switch (sys_register) {
-+#define X(reg_name, op0, op1, crn, crm, op2)              \
-+	case (GET_ISS_ENCODING(op0, op1, crn, crm, op2)): \
-+		value = read_msr(reg_name);               \
-+		break;
-+			INTR_CTRL_REGISTERS
-+#undef X
-+		default:
-+			value = vcpu->regs.r[rt_register];
-+			dlog_notice(
-+				"Unsupported interrupt control register "
-+				"read: "
-+				"op0=%d, op1=%d, crn=%d, crm=%d, op2=%d, "
-+				"rt=%d.\n",
-+				GET_ISS_OP0(esr), GET_ISS_OP1(esr),
-+				GET_ISS_CRN(esr), GET_ISS_CRM(esr),
-+				GET_ISS_OP2(esr), GET_ISS_RT(esr));
-+			break;
-+		}
-+		if (rt_register != RT_REG_XZR) {
-+			vcpu->regs.r[rt_register] = value;
-+		}
-+	} else {
-+		if (rt_register != RT_REG_XZR) {
-+			value = vcpu->regs.r[rt_register];
-+		} else {
-+			value = 0;
-+		}
-+		switch (sys_register) {
-+#define X(reg_name, op0, op1, crn, crm, op2)              \
-+	case (GET_ISS_ENCODING(op0, op1, crn, crm, op2)): \
-+		write_msr(reg_name, value);               \
-+		break;
-+			INTR_CTRL_REGISTERS
-+#undef X
-+		default:
-+			dlog_notice(
-+				"Unsupported interrupt control register "
-+				"write: "
-+				"op0=%d, op1=%d, crn=%d, crm=%d, op2=%d, "
-+				"rt=%d.\n",
-+				GET_ISS_OP0(esr), GET_ISS_OP1(esr),
-+				GET_ISS_CRN(esr), GET_ISS_CRM(esr),
-+				GET_ISS_OP2(esr), GET_ISS_RT(esr));
-+			break;
-+		}
-+	}
-+
-+	return true;
-+}
-diff --git a/src/arch/aarch64/hypervisor/perfmon.h b/src/arch/aarch64/hypervisor/perfmon.h
-index 81669ba1c401..c90d45bfc239 100644
---- a/src/arch/aarch64/hypervisor/perfmon.h
-+++ b/src/arch/aarch64/hypervisor/perfmon.h
-@@ -70,3 +70,8 @@ bool perfmon_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
- 			    uintreg_t esr_el2);
- 
- uintreg_t perfmon_get_pmccfiltr_el0_init_value(ffa_vm_id_t vm_id);
-+
-+bool intr_ctrl_is_register_access(uintreg_t esr);
-+
-+bool intr_ctrl_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id,
-+				  uintreg_t esr);
-diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h
-index bf1a66d1d4c5..b88a14b52f68 100644
---- a/src/arch/aarch64/msr.h
-+++ b/src/arch/aarch64/msr.h
-@@ -139,3 +139,6 @@
- #define MSR_CNTHPS_CTL_EL2 S3_4_C14_C5_1
- #define MSR_CNTHPS_CVAL_EL2 S3_4_C14_C5_2
- #define MSR_CNTHPS_TVAL_EL2 S3_4_C14_C5_0
-+
-+#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
-+#define ICC_SGI1R_EL1 S3_0_C12_C11_5
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch
deleted file mode 100644
index cd19f63..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 41f3ff2f011da69ff81234769353955e51c7e588 Mon Sep 17 00:00:00 2001
-From: Davidson K <davidson.kumaresan@arm.com>
-Date: Thu, 7 Oct 2021 12:20:08 +0530
-Subject: [PATCH] feat(vhe): set STAGE1_NS while mapping memory from NWd to SWd
-
-If the memory is shared by a VM executing in non secure world, attribute
-MM_MODE_NS had to be set while mapping that in a S-EL0 SP executing in
-secure world. It will not be needed for a S-EL1 SP since the NS bit is
-available only for the stage 1 translations and the stage 1 translations
-for a S-EL1 SP will be handled by a trusted OS running in S-EL1.
-
-Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
-Change-Id: I074e2d5a50a659bd3c097d797c4901f08d210b1b
-Upstream-Status: Pending [Not submitted to upstream yet]
----
- src/ffa_memory.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/src/ffa_memory.c b/src/ffa_memory.c
-index 5826cb2fdd4b..bae677633dea 100644
---- a/src/ffa_memory.c
-+++ b/src/ffa_memory.c
-@@ -2618,6 +2618,18 @@ struct ffa_value ffa_memory_retrieve(struct vm_locked to_locked,
- 
- 	memory_to_attributes = ffa_memory_permissions_to_mode(
- 		permissions, share_state->sender_orig_mode);
-+
-+	if (to_locked.vm->el0_partition) {
-+		/*
-+		 * Get extra mapping attributes for the given VM ID.
-+		 * If the memory is shared by a VM executing in non secure
-+		 * world, attribute MM_MODE_NS had to be set while mapping
-+		 * that in a SP executing in secure world.
-+		 */
-+		memory_to_attributes |= arch_mm_extra_attributes_from_vm(
-+						retrieve_request->sender);
-+	}
-+
- 	ret = ffa_retrieve_check_update(
- 		to_locked, memory_region->sender, share_state->fragments,
- 		share_state->fragment_constituent_counts,
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc
index 09de6f1..4e5368e 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc
@@ -3,15 +3,6 @@
 COMPATIBLE_MACHINE = "(tc?)"
 HAFNIUM_PLATFORM = "secure_tc"
 
-FILESEXTRAPATHS:prepend:tc := "${THISDIR}/files/tc:"
-
-SRC_URI:append = " \
-        file://0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch \
-        file://0002-feat-emulate-interrupt-controller-register-access.patch \
-        file://0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch \
-        file://0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch;patchdir=project/reference \
-        "
-
 do_compile() {
     PATH="${S}/prebuilts/linux-x64/clang/bin:$PATH" oe_runmake -C ${S}
 }
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-initramfs-image.bb b/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-initramfs-image.bb
index 884d4b3..cac3b73 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-initramfs-image.bb
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/images/corstone1000-initramfs-image.bb
@@ -21,8 +21,5 @@
 # all optee packages
 IMAGE_INSTALL += "optee-client"
 
-# external system linux userspace test application
-IMAGE_INSTALL += "corstone1000-external-sys-tests"
-
 # TS PSA API tests commands for crypto, its, ps and iat
 IMAGE_INSTALL += "packagegroup-ts-tests-psa"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/fvp-base/0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/fvp-base/0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch
new file mode 100644
index 0000000..4d0019a
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/fvp-base/0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch
@@ -0,0 +1,64 @@
+From b79d3cf319cc5698311ef83247110c93d3c2de2c Mon Sep 17 00:00:00 2001
+Message-Id: <b79d3cf319cc5698311ef83247110c93d3c2de2c.1695834344.git.diego.sueiro@arm.com>
+From: Diego Sueiro <diego.sueiro@arm.com>
+Date: Wed, 27 Sep 2023 18:05:26 +0100
+Subject: [PATCH] fdts/fvp-base: Add stdout-path and virtio net and rng nodes
+
+Upstream-Status: Pending
+Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
+---
+ fdts/fvp-base-psci-common.dtsi |  8 ++++++--
+ fdts/rtsm_ve-motherboard.dtsi  | 12 ++++++++++++
+ 2 files changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/fdts/fvp-base-psci-common.dtsi b/fdts/fvp-base-psci-common.dtsi
+index 79cf37d3b0..b1ba5ce703 100644
+--- a/fdts/fvp-base-psci-common.dtsi
++++ b/fdts/fvp-base-psci-common.dtsi
+@@ -30,7 +30,9 @@
+ #if (ENABLE_RME == 1)
+ 	chosen { bootargs = "console=ttyAMA0 earlycon=pl011,0x1c090000 root=/dev/vda ip=on";};
+ #else
+-	chosen {};
++	chosen {
++		stdout-path = &v2m_serial0;
++	};
+ #endif
+ 
+ 	aliases {
+@@ -243,6 +245,8 @@
+ 				<0 0 39 &gic 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ 				<0 0 40 &gic 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ 				<0 0 41 &gic 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+-				<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
++				<0 0 42 &gic 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
++				<0 0 44 &gic 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
++				<0 0 46 &gic 0 GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ 	};
+ };
+diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi
+index 0a824b349a..21a083a51a 100644
+--- a/fdts/rtsm_ve-motherboard.dtsi
++++ b/fdts/rtsm_ve-motherboard.dtsi
+@@ -230,6 +230,18 @@
+ 					interrupts = <42>;
+ 				};
+ 
++				virtio@150000 {
++					compatible = "virtio,mmio";
++					reg = <0x150000 0x200>;
++					interrupts = <44>;
++				};
++
++				virtio@200000 {
++					compatible = "virtio,mmio";
++					reg = <0x200000 0x200>;
++					interrupts = <46>;
++				};
++
+ 				rtc@170000 {
+ 					compatible = "arm,pl031", "arm,primecell";
+ 					reg = <0x170000 0x1000>;
+-- 
+2.39.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-Reserve-OP-TEE-memory-from-nwd.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-Reserve-OP-TEE-memory-from-nwd.patch
index 2c634e3..ce2d059 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-Reserve-OP-TEE-memory-from-nwd.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0001-Reserve-OP-TEE-memory-from-nwd.patch
@@ -11,8 +11,9 @@
 prevent the normal world from using it. This is not required on most
 platforms as the Trusted OS is run from secure RAM.
 
-Upstream-Status: Pending (not yet submited to upstream)
+Upstream-Status: Pending (not yet submitted to upstream)
 Signed-off-by: Adam Johnston <adam.johnston@arm.com>
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
 ---
  plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts | 12 ++++++++++++
  1 file changed, 12 insertions(+)
@@ -31,9 +32,9 @@
 +		#size-cells = <2>;
 +		ranges;
 +
-+		optee@0x08000000 {
++		optee@0xDE000000 {
 +			compatible = "removed-dma-pool";
-+			reg = <0x0 0x08000000 0x0 0x02000000>;
++			reg = <0x0 0xDE000000 0x0 0x02000000>;
 +			no-map;
 +		};
 +	};
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0002-Modify-BL32-Location-to-DDR4.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0002-Modify-BL32-Location-to-DDR4.patch
new file mode 100644
index 0000000..8b2be19
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0002-Modify-BL32-Location-to-DDR4.patch
@@ -0,0 +1,30 @@
+From 15dab90c3cb8e7677c4f953c2269e8ee1afa01b0 Mon Oct 2 13:45:43 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Mon, 2 Oct 2023 13:45:43 +0000
+Subject: [PATCH] Modify BL32 Location to DDR4
+
+Since OP-TEE start address is changed to run
+from DDR4, this patch changes BL32 entrypoint
+to the correct one.
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+---
+ plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
+index ed870803c..797dfe3a4 100644
+--- a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
++++ b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
+@@ -22,8 +22,8 @@
+ 		maj_ver = <0x1>;
+ 		min_ver = <0x0>;
+ 		exec_state = <0x0>;
+-		load_address = <0x0 0x08000000>;
+-		entrypoint = <0x0 0x08000000>;
++		load_address = <0x0 0xDE000000>;
++		entrypoint = <0x0 0xDE000000>;
+ 		binary_size = <0x2000000>;
+ 	};
+ 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0003-Modify-SPMC-Base-to-DDR4.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0003-Modify-SPMC-Base-to-DDR4.patch
new file mode 100644
index 0000000..9e32717
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/0003-Modify-SPMC-Base-to-DDR4.patch
@@ -0,0 +1,28 @@
+From 9a1d11b9fbadf740c73aee6dca4fd0370b38e4a8 Tue Oct 3 13:49:13 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Tue, 3 Oct 2023 13:49:13 +0000
+Subject: [PATCH] Modify SPMC Base to DDR4
+
+Since OP-TEE start address is changed to run
+from DDR4, this patch changes SPMC base to 
+the correct one.
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+---
+ plat/arm/board/n1sdp/include/platform_def.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
+index b3799a7b2..b12c61b61 100644
+--- a/plat/arm/board/n1sdp/include/platform_def.h
++++ b/plat/arm/board/n1sdp/include/platform_def.h
+@@ -118,7 +118,7 @@
+ 
+ #define PLAT_ARM_MAX_BL31_SIZE		UL(0x40000)
+ 
+-#define PLAT_ARM_SPMC_BASE		U(0x08000000)
++#define PLAT_ARM_SPMC_BASE		U(0xDE000000)
+ #define PLAT_ARM_SPMC_SIZE		UL(0x02000000)  /* 32 MB */
+ 
+ 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend
index 392c609..074bc68 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend
@@ -2,3 +2,5 @@
 
 COMPATIBLE_MACHINE:corstone1000 = "corstone1000"
 SRCREV:corstone1000 = "5f591f67738a1bbe6b262c53d9dad46ed8bbcd67"
+
+COMPATIBLE_MACHINE:n1sdp = "n1sdp"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc
index ee07137..8673199 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc
@@ -24,6 +24,16 @@
 # BL2 loads BL32 (optee). So, optee needs to be built first:
 DEPENDS += "optee-os"
 
+# Note: Regarding the build option: LOG_LEVEL. 
+# There seems to be an issue when setting it
+# to 50 (LOG_LEVEL_VERBOSE), where the kernel 
+# tee driver sends yielding requests to OP-TEE
+# at a faster pace than OP-TEE processes them,
+# as the processing time is consumed by logging 
+# in TF-A. When this issue occurs, booting halts 
+# as soon as optee driver starts initialization.
+# Therefore, it's not currently recommended to
+# set LOG_LEVEL to 50 at all.
 EXTRA_OEMAKE:append = " \
                         ARCH=aarch64 \
                         TARGET_PLATFORM=${TFA_TARGET_PLATFORM} \
@@ -41,5 +51,4 @@
                         ERRATA_A35_855472=1 \
                         ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
                         BL32=${RECIPE_SYSROOT}/${nonarch_base_libdir}/firmware/tee-pager_v2.bin \
-                        LOG_LEVEL=50 \
                         "
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-base.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-base.inc
new file mode 100644
index 0000000..5fafe29
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-base.inc
@@ -0,0 +1,20 @@
+# FVP specific TFA parameters
+
+#
+# Armv8-A Base Platform FVP
+#
+
+FILESEXTRAPATHS:prepend := "${THISDIR}/files/:"
+SRC_URI:append = " file://0001-fdts-fvp-base-Add-stdout-path-and-virtio-net-and-rng.patch"
+
+COMPATIBLE_MACHINE = "fvp-base"
+TFA_PLATFORM = "fvp"
+TFA_DEBUG = "1"
+TFA_MBEDTLS = "1"
+TFA_UBOOT ?= "1"
+TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip"
+
+EXTRA_OEMAKE += "FVP_DT_PREFIX=fvp-base-gicv3-psci-1t"
+
+# Our fvp-base machine explicitly has v8.4 cores
+EXTRA_OEMAKE += "ARM_ARCH_MAJOR=8 ARM_ARCH_MINOR=4"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc
deleted file mode 100644
index ca96b44..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc
+++ /dev/null
@@ -1,12 +0,0 @@
-# FVP specific TFA parameters
-
-#
-# Armv8-A Base Platform FVP
-#
-
-COMPATIBLE_MACHINE = "fvp-base"
-TFA_PLATFORM = "fvp"
-TFA_DEBUG = "1"
-TFA_MBEDTLS = "1"
-TFA_UBOOT ?= "1"
-TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc
index 900decc..79dc9b2 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc
@@ -5,18 +5,19 @@
 PV .= "+git"
 
 COMPATIBLE_MACHINE = "n1sdp"
-TFA_PLATFORM       = "n1sdp"
 TFA_BUILD_TARGET   = "all fip"
 TFA_INSTALL_TARGET = "bl1 bl2 bl31 n1sdp-multi-chip n1sdp-single-chip n1sdp_fw_config n1sdp_tb_fw_config fip"
 TFA_DEBUG          = "1"
 TFA_MBEDTLS        = "1"
 TFA_UBOOT          = "0"
-TFA_UEFI           = "1"
+TFA_UEFI          ?= "1"
 
 FILESEXTRAPATHS:prepend := "${THISDIR}/files/n1sdp:"
 
-SRC_URI:append = " \ 
+SRC_URI:append = " \
     file://0001-Reserve-OP-TEE-memory-from-nwd.patch \
+    file://0002-Modify-BL32-Location-to-DDR4.patch \
+    file://0003-Modify-SPMC-Base-to-DDR4.patch \
     "
 
 TFA_ROT_KEY= "plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem"
@@ -37,5 +38,4 @@
 		    ARM_ROTPK_LOCATION="devel_rsa" \
 		    ROT_KEY="${TFA_ROT_KEY}" \
 		    BL32=${RECIPE_SYSROOT}/${nonarch_base_libdir}/firmware/tee-pager_v2.bin \
-		    BL33=${RECIPE_SYSROOT}/firmware/uefi.bin \
 		    "
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend
index 7fbcd3a..cb482a6 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend
@@ -4,7 +4,7 @@
 
 MACHINE_TFA_REQUIRE ?= ""
 MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc"
-MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp.inc"
+MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp-base.inc"
 MACHINE_TFA_REQUIRE:juno = "trusted-firmware-a-juno.inc"
 MACHINE_TFA_REQUIRE:n1sdp = "trusted-firmware-a-n1sdp.inc"
 MACHINE_TFA_REQUIRE:sgi575 = "trusted-firmware-a-sgi575.inc"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-BL2-size-in-flash-lay.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-BL2-size-in-flash-lay.patch
index 98dabbe..4f00ea2 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-BL2-size-in-flash-lay.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0001-Platform-corstone1000-Increase-BL2-size-in-flash-lay.patch
@@ -6,7 +6,7 @@
 Increases BL2 size to align with the flash page size in corstone1000.
 
 Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/24103]
 
 ---
  platform/ext/target/arm/corstone1000/partition/flash_layout.h | 2 +-
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch
index d348d02..6bbd66f 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0002-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch
@@ -7,7 +7,7 @@
 metadata_write/read.
 
 Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/24103]
 
 ---
  platform/ext/target/arm/corstone1000/partition/region_defs.h | 3 ++-
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch
index bf7aba8..7a07c0c 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0003-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch
@@ -12,7 +12,7 @@
 the boot anymore.
 
 Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/24104/7]
 
 ---
  .../arm/corstone1000/fw_update_agent/fwu_agent.c       | 10 +++++++---
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch
index 2f5ba04..e4eba62 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch
@@ -5,8 +5,8 @@
 
 Add unique Corstone-1000 firmware GUID
 
-Upstream-Status: Pending [Not submitted to upstream yet]
 Signed-off-by: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com>
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/24132/3]
 ---
  .../target/arm/corstone1000/fw_update_agent/fwu_agent.c   | 8 ++++----
  1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0006-Platform-Corstone1000-Enable-Signed-Capsule.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0006-Platform-Corstone1000-Enable-Signed-Capsule.patch
index 49c336d..f805a44 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0006-Platform-Corstone1000-Enable-Signed-Capsule.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0006-Platform-Corstone1000-Enable-Signed-Capsule.patch
@@ -7,7 +7,7 @@
 , image_auth, etc.) to comply with the new capsule generation tool (mkeficapsule).
 
 Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/24131/3]
 ---
  .../fw_update_agent/uefi_capsule_parser.c     | 25 +++++++++++--------
  .../fw_update_agent/uefi_capsule_parser.h     |  2 ++
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0007-platform-corstone1000-increase-ITS-max-asset-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0007-platform-corstone1000-increase-ITS-max-asset-size.patch
new file mode 100644
index 0000000..97cd14d
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0007-platform-corstone1000-increase-ITS-max-asset-size.patch
@@ -0,0 +1,29 @@
+From ef97f7083279565dab45a550139935d741f159a9 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Fri, 29 Sep 2023 09:57:19 +0100
+Subject: [PATCH] platform: corstone1000: Increase ITS max asset size
+​
+Increases the max asset size for ITS to enable parsec services & tests
+​
+Upstream-Status: Pending
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Signed-off-by: Vikas Katariya <vikas.katariya@arm.com>
+---
+ platform/ext/target/arm/corstone1000/config_tfm_target.h | 5 +++++
+ 1 files changed, 5 insertions(+)
+​
+diff --git a/platform/ext/target/arm/corstone1000/config_tfm_target.h b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+index e968366639..3f6e8477e5 100644
+--- a/platform/ext/target/arm/corstone1000/config_tfm_target.h
++++ b/platform/ext/target/arm/corstone1000/config_tfm_target.h
+@@ -24,4 +24,9 @@
+ #undef PS_NUM_ASSETS
+ #define PS_NUM_ASSETS        20
+
++/* The maximum size of asset to be stored in the Internal Trusted Storage area. */
++#undef ITS_MAX_ASSET_SIZE
++#define ITS_MAX_ASSET_SIZE        2048
++
++
+ #endif /* __CONFIG_TFM_TARGET_H__ */
+-- 
\ No newline at end of file
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0008-platform-corstone1000-align-capsule-update-structs.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0008-platform-corstone1000-align-capsule-update-structs.patch
new file mode 100644
index 0000000..7aeecfa
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0008-platform-corstone1000-align-capsule-update-structs.patch
@@ -0,0 +1,78 @@
+From 6807d4b30f7d4ed32d3c54dfcaf3ace63eaa4f02 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Thu, 26 Oct 2023 11:46:04 +0100
+Subject: [PATCH] platform: corstone1000: align capsule update structs
+
+U-boot mkefitool creates capsule image without packed and byte-aligned
+structs. This patch aligns the capsule-update structures and avoids
+crashes in case of unaligned pointer access.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending
+---
+ .../fw_update_agent/uefi_capsule_parser.c          | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+index c706c040ac..9f8d12ad4e 100644
+--- a/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/uefi_capsule_parser.c
+@@ -34,14 +34,14 @@ typedef struct {
+     uint32_t                header_size;
+     uint32_t                flags;
+     uint32_t                capsule_image_size;
+-} efi_capsule_header_t;
++} efi_capsule_header_t __attribute__((packed, aligned(1)));
+
+ typedef struct {
+     uint32_t                version;
+     uint16_t                embedded_driver_count;
+     uint16_t                payload_item_count;
+     uint64_t                item_offset_list[];
+-} efi_firmware_management_capsule_header_t;
++} efi_firmware_management_capsule_header_t __attribute__((packed, aligned(1)));
+
+ typedef struct {
+     uint32_t                version;
+@@ -52,14 +52,14 @@ typedef struct {
+     uint32_t                update_vendorcode_size;
+     uint64_t                update_hardware_instance; //introduced in v2
+     uint64_t                image_capsule_support; //introduced in v3
+-} efi_firmware_management_capsule_image_header_t;
++} efi_firmware_management_capsule_image_header_t __attribute__((packed, aligned(1)));
+
+ typedef struct {
+     uint32_t                signature;
+     uint32_t                header_size;
+     uint32_t                fw_version;
+     uint32_t                lowest_supported_version;
+-} fmp_payload_header_t;
++} fmp_payload_header_t __attribute__((packed, aligned(1)));
+
+ #define ANYSIZE_ARRAY 0
+
+@@ -68,18 +68,18 @@ typedef struct {
+     uint16_t                wRevision;
+     uint16_t                wCertificateType;
+     uint8_t                 bCertificate[ANYSIZE_ARRAY];
+-} WIN_CERTIFICATE;
++} WIN_CERTIFICATE __attribute__((packed, aligned(1)));
+
+ typedef struct {
+     WIN_CERTIFICATE         hdr;
+     struct efi_guid         cert_type;
+     uint8_t                 cert_data[ANYSIZE_ARRAY];
+-} win_certificate_uefi_guid_t;
++} win_certificate_uefi_guid_t __attribute__((packed, aligned(1)));
+
+ typedef struct {
+     uint64_t                    monotonic_count;
+     win_certificate_uefi_guid_t   auth_info;
+-} efi_firmware_image_authentication_t;
++} efi_firmware_image_authentication_t __attribute__((packed, aligned(1)));
+
+
+ enum uefi_capsule_error_t uefi_capsule_retrieve_images(void* capsule_ptr,
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0009-platform-corstone1000-fix-synchronization-issue-on-o.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0009-platform-corstone1000-fix-synchronization-issue-on-o.patch
new file mode 100644
index 0000000..be6bde6
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0009-platform-corstone1000-fix-synchronization-issue-on-o.patch
@@ -0,0 +1,50 @@
+From b70dd14eed59d7c5833ded8469cf99e631951e14 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Wed, 15 Nov 2023 09:52:19 +0000
+Subject: [PATCH] platform: corstone1000: fix synchronization issue on openamp
+ notification
+
+This fixes a race that is observed rarely in the FVP. It occurs in FVP
+when tfm sends the notication ack in openamp, and then reset the access
+request which resets the mhu registers before received by the host
+processor. This solution introduces polling on the status register of
+mhu until the notificaiton is read by the host processor. (Inspired by
+signal_and_wait_for_signal function in mhu_wrapper_v2_x.c in trusted-firmware-m
+https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/ext/target/arm/rss/common/native_drivers/mhu_wrapper_v2_x.c#n61)
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ .../corstone1000/openamp/platform_spe_dual_core_hal.c    | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/platform/ext/target/arm/corstone1000/openamp/platform_spe_dual_core_hal.c b/platform/ext/target/arm/corstone1000/openamp/platform_spe_dual_core_hal.c
+index 7613345ffc..b58088032f 100644
+--- a/platform/ext/target/arm/corstone1000/openamp/platform_spe_dual_core_hal.c
++++ b/platform/ext/target/arm/corstone1000/openamp/platform_spe_dual_core_hal.c
+@@ -83,7 +83,7 @@ enum tfm_plat_err_t tfm_dual_core_hal_init(void)
+
+ enum tfm_plat_err_t tfm_hal_notify_peer(void)
+ {
+-    uint32_t access_ready;
++    uint32_t access_ready,val;
+     enum mhu_v2_x_error_t status;
+     struct mhu_v2_x_dev_t* dev = &MHU1_SE_TO_HOST_DEV;
+
+@@ -108,6 +108,13 @@ enum tfm_plat_err_t tfm_hal_notify_peer(void)
+         return TFM_PLAT_ERR_SYSTEM_ERR;
+     }
+
++    do {
++        status = mhu_v2_x_channel_poll(dev, MHU1_SEH_NOTIFY_CH, &val);
++        if (status != MHU_V_2_X_ERR_NONE) {
++            break;
++        }
++    } while(val != 0);
++
+     status = mhu_v2_x_reset_access_request(dev);
+     if (status != MHU_V_2_X_ERR_NONE) {
+         SPMLOG_ERRMSGVAL("mhu_v2_x_reset_access_request : ", status);
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc
index 601d165..7cf3b94 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc
@@ -34,6 +34,9 @@
     file://0004-arm-trusted-firmware-m-disable-fatal-warnings.patch \
     file://0005-Platform-corstone1000-add-unique-firmware-GUID.patch \
     file://0006-Platform-Corstone1000-Enable-Signed-Capsule.patch \
+    file://0007-platform-corstone1000-increase-ITS-max-asset-size.patch \
+    file://0008-platform-corstone1000-align-capsule-update-structs.patch \
+    file://0009-platform-corstone1000-fix-synchronization-issue-on-o.patch \
     "
 
 # TF-M ships patches for external dependencies that needs to be applied
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc
new file mode 100644
index 0000000..b6b7a04
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc
@@ -0,0 +1,63 @@
+# Corstone1000 specific U-boot support
+
+DEPENDS:append = " gnutls-native openssl-native efitools-native"
+CORSTONE1000_DEVICE_TREE:corstone1000-mps3 = "corstone1000-mps3"
+CORSTONE1000_DEVICE_TREE:corstone1000-fvp = "corstone1000-fvp"
+EXTRA_OEMAKE:append = ' DEVICE_TREE=${CORSTONE1000_DEVICE_TREE}'
+
+SYSROOT_DIRS:append = " /boot"
+
+SRC_URI:append = " \
+    file://0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch \
+    file://0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch \
+    file://0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch \
+    file://0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch \
+    file://0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch \
+    file://0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch \
+    file://0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch \
+    file://0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch \
+    file://0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch \
+    file://0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch \
+    file://0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch \
+    file://0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch \
+    file://0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch \
+    file://0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch \
+    file://0015-efi_firmware-add-get_image_info-for-corstone1000.patch \
+    file://0016-efi_loader-fix-null-pointer-exception-with-get_image.patch \
+    file://0017-arm-corstone1000-add-mmc-for-fvp.patch \
+    file://0018-corstone1000-add-compressed-kernel-support.patch \
+    file://0019-arm-corstone1000-esrt-support.patch \
+    file://0020-corstone1000-enable-distro-booting-command.patch \
+    file://0021-corstone1000-add-fwu-metadata-store-info.patch \
+    file://0022-fwu_metadata-make-sure-structures-are-packed.patch \
+    file://0023-corstone1000-add-boot-index.patch \
+    file://0024-corstone1000-adjust-boot-bank-and-kernel-location.patch \
+    file://0025-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch \
+    file://0026-nvmxip-move-header-to-include.patch \
+    file://0027-corstone1000-set-kernel_addr-based-on-boot_idx.patch \
+    file://0028-corstone1000-boot-index-from-active.patch \
+    file://0029-corstone1000-enable-PSCI-reset.patch \
+    file://0030-Enable-EFI-set-get-time-services.patch \
+    file://0031-corstone1000-detect-inflated-kernel-size.patch \
+    file://0032-corstone1000-ESRT-add-unique-firmware-GUID.patch \
+    file://0033-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch \
+    file://0034-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch \
+    file://0035-corstone1000-purge-U-Boot-specific-DT-nodes.patch \
+    file://0036-corstone1000-add-signature-device-tree-overlay.patch \
+    file://0037-corstone1000-enable-authenticated-capsule-config.patch \
+    file://0038-corstone1000-introduce-EFI-authenticated-capsule-upd.patch \
+    file://0039-enables-ondisk-capsule-update-feature.patch		  \
+    file://0040-fix-runtime-capsule-update-flags-checks.patch		  \
+    file://0041-scatter-gather-flag-workaround.patch			  \
+    file://0042-corstone1000-enable-virtio-net-support.patch		  \
+    "
+
+do_configure:append(){
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=CRT/ -keyout ${B}/CRT.key -out ${B}/CRT.crt -nodes -days 365
+    cert-to-efi-sig-list ${B}/CRT.crt ${B}/corstone1000_defconfig/CRT.esl
+}
+
+do_install:append() {
+   install -D -p -m 0644 ${B}/CRT.crt ${DEPLOY_DIR_IMAGE}/corstone1000_capsule_cert.crt
+   install -D -p -m 0644 ${B}/CRT.key ${DEPLOY_DIR_IMAGE}/corstone1000_capsule_key.key
+}
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-fvp-base.inc b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-fvp-base.inc
new file mode 100644
index 0000000..b766181
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-fvp-base.inc
@@ -0,0 +1,8 @@
+# FVP base specific U-boot support
+
+SRC_URI:append = " \
+    file://0001-virtio-rng-Workaround-for-FVP-returning-zero-size-bu.patch \
+    file://0002-vexpress64-Set-the-DM_RNG-property.patch \
+    file://0003-vexpress64-Select-PSCI-RESET-by-default.patch \
+    file://0004-vexpress64-Imply-CONFIG_ARM64_CRC32-by-default.patch \
+    "
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-juno.inc b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-juno.inc
new file mode 100644
index 0000000..e49d87c
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-juno.inc
@@ -0,0 +1,3 @@
+# Juno specific U-boot support
+
+SRC_URI:append = " file://0001-configs-vexpress-modify-to-boot-compressed-initramfs.patch"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-tc.inc b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-tc.inc
new file mode 100644
index 0000000..ca182c5
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot-tc.inc
@@ -0,0 +1,5 @@
+# TC0 and TC1 specific U-boot support 
+
+SRC_URI:append = " \
+    file://bootargs.cfg \
+    "
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch
index df633e2..485ed4b 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch
@@ -1,7 +1,7 @@
-From b79722ade56bd49cf9e7d9b47b6256599c8cdb36 Mon Sep 17 00:00:00 2001
+From 6b7a5bff8d68b191569557b6444e2c5061af8074 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 29 Jul 2022 13:06:19 +0100
-Subject: [PATCH 01/33] FF-A v15: arm64: smccc: add support for SMCCCv1.2
+Subject: [PATCH 01/38] FF-A v15: arm64: smccc: add support for SMCCCv1.2
  x0-x17 registers
 
 add support for x0-x17 registers used by the SMC calls
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch
index 550be6b..ebb2b55 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch
@@ -1,7 +1,7 @@
-From 43137871fcc46513eea1480cd78ad091763578f0 Mon Sep 17 00:00:00 2001
+From faa2a74ce8cc9497c551b1bee6beed5c2c2f2dee Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Thu, 4 Aug 2022 16:46:47 +0100
-Subject: [PATCH 02/33] FF-A v15: lib: uuid: introduce uuid_str_to_le_bin
+Subject: [PATCH 02/38] FF-A v15: lib: uuid: introduce uuid_str_to_le_bin
  function
 
 convert UUID string to little endian binary data
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch
index bbd4e04..dbdf296 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch
@@ -1,7 +1,7 @@
-From 80fd758cb55f8b44078b4535284ea132b0d5a944 Mon Sep 17 00:00:00 2001
+From fa4a5b45d0254e347ba15992d997529f5056fe8f Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 27 Mar 2023 16:24:29 +0100
-Subject: [PATCH 03/33] FF-A v15: lib: uuid: introduce testcase for
+Subject: [PATCH 03/38] FF-A v15: lib: uuid: introduce testcase for
  uuid_str_to_le_bin
 
 provide a test case
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch
index f0d6763..e2c9d86 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch
@@ -1,7 +1,7 @@
-From e8b71ec24884a0c973ac663e6802ff529a8be349 Mon Sep 17 00:00:00 2001
+From 6a50d03467b70220b615dbe87b4b49d7f86fcb2f Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 17 Jul 2023 15:11:43 +0100
-Subject: [PATCH 04/33] FF-A v15: arm_ffa: introduce Arm FF-A support
+Subject: [PATCH 04/38] FF-A v15: arm_ffa: introduce Arm FF-A support
 
 Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch
index aeb4bb9..0a4f4c9 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch
@@ -1,7 +1,7 @@
-From 3eb4fb19777383f5f05b7ce74da141f53ffc4374 Mon Sep 17 00:00:00 2001
+From 2d225908fde28c9759fae7a9fdce6bb8c39ec579 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Wed, 10 May 2023 17:27:01 +0100
-Subject: [PATCH 05/33] FF-A v15: arm_ffa: introduce armffa command
+Subject: [PATCH 05/38] FF-A v15: arm_ffa: introduce armffa command
 
 Provide armffa command showcasing the use of the U-Boot FF-A support
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch
index 4f94b72..13ea227 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch
@@ -1,7 +1,7 @@
-From 4f104ef6804ffd6483d166840d113630be85edb0 Mon Sep 17 00:00:00 2001
+From 8b24115d3b41af53602bfc80bea7e134dc0edefb Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 17 Jul 2023 15:18:58 +0100
-Subject: [PATCH 06/33] FF-A v15: arm_ffa: introduce sandbox FF-A support
+Subject: [PATCH 06/38] FF-A v15: arm_ffa: introduce sandbox FF-A support
 
 Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch
index 966c32b..7233079 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch
@@ -1,7 +1,7 @@
-From 00d0d8edf47430e3069e7c1dfa7a5bb7bb36bd49 Mon Sep 17 00:00:00 2001
+From 9c789dbc70d58f55c84cc02ac35783af0aae85d5 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Wed, 10 May 2023 17:34:55 +0100
-Subject: [PATCH 07/33] FF-A v15: arm_ffa: introduce sandbox test cases for
+Subject: [PATCH 07/38] FF-A v15: arm_ffa: introduce sandbox test cases for
  UCLASS_FFA
 
 Add functional test cases for the FF-A support
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch
index 05b5e4d..5d70db6 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch
@@ -1,7 +1,7 @@
-From 78547a9f322b981a93bbeeb48b3eda1d2ab35cd0 Mon Sep 17 00:00:00 2001
+From 95589fd6c92d41aa22d30a34193006216c6ee827 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 23 Jun 2023 13:44:10 +0100
-Subject: [PATCH 08/33] FF-A v15: arm_ffa: introduce armffa command Sandbox
+Subject: [PATCH 08/38] FF-A v15: arm_ffa: introduce armffa command Sandbox
  test
 
 Add Sandbox test for the armffa command
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch
index bd75bc1..6f663fa 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch
@@ -1,7 +1,7 @@
-From 342844c2a5ad6beb127e1e8e52b311df77cff472 Mon Sep 17 00:00:00 2001
+From 02e38e24676d48d8a792ab6631a903ae1faa6271 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 15 Aug 2022 15:12:49 +0100
-Subject: [PATCH 09/33] FF-A v15: arm_ffa: efi: introduce FF-A MM communication
+Subject: [PATCH 09/38] FF-A v15: arm_ffa: efi: introduce FF-A MM communication
 
 Add MM communication support using FF-A transport
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch
index 4dcec1d..bc71b94 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch
@@ -1,7 +1,7 @@
-From 79e941be83a7394d03b09c618c8e2924ef962d64 Mon Sep 17 00:00:00 2001
+From c726c9ff098e4b271d60856b462f3dc532763a03 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 17 Jul 2023 15:23:33 +0100
-Subject: [PATCH 10/33] FF-A v15: arm_ffa: efi: corstone1000: enable MM
+Subject: [PATCH 10/38] FF-A v15: arm_ffa: efi: corstone1000: enable MM
  communication
 
 turn on EFI MM communication
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch
index d2c440c..00d6ea7 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch
@@ -1,7 +1,7 @@
-From 90b2741149a538c93aed61522c0d3363351bd578 Mon Sep 17 00:00:00 2001
+From 4483f276e70afdd961449ac45d4d8121c2a9080c Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 17 Jul 2023 15:56:18 +0100
-Subject: [PATCH 11/33] efi: corstone1000: fwu: introduce EFI capsule update
+Subject: [PATCH 11/38] efi: corstone1000: fwu: introduce EFI capsule update
 
 This commit provides capsule update feature for Corstone1000.
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch
index f9fb70b..023d53c 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch
@@ -1,7 +1,7 @@
-From 445dfd4a5d8f31a7efb3f2f15aa677de8b3eb602 Mon Sep 17 00:00:00 2001
+From 7844378788f308f3540c5eb10956c84113005fcc Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Fri, 4 Mar 2022 15:56:09 +0000
-Subject: [PATCH 12/33] arm: corstone1000: fix unrecognized filesystem type
+Subject: [PATCH 12/38] arm: corstone1000: fix unrecognized filesystem type
 
 Some usb sticks are not recognized by usb, just add a
 delay before checking status.
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch
index 4ddb35e..71cdf6a 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch
@@ -1,7 +1,7 @@
-From 68248cd3cc95e0480ee2cbc3ebaba51967889199 Mon Sep 17 00:00:00 2001
+From 94e6c1dee044b3573991e48449de9144cfe3c0f3 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Sat, 11 Dec 2021 13:23:55 +0000
-Subject: [PATCH 13/33] efi_loader: corstone1000: remove guid check from
+Subject: [PATCH 13/38] efi_loader: corstone1000: remove guid check from
  corstone1000 config option
 
 Use generic fmp guid and no separte check is required for
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch
index c0b3fa8..9d3cb66 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch
@@ -1,7 +1,7 @@
-From bb0eb602d3697384318cac90605259aa7fb21c9b Mon Sep 17 00:00:00 2001
+From 9be08ccf3f7b30b2c57ff2eb593c5b17c967fc4a Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 17 Dec 2021 19:49:02 +0000
-Subject: [PATCH 14/33] efi_loader: populate ESRT table if EFI_ESRT config
+Subject: [PATCH 14/38] efi_loader: populate ESRT table if EFI_ESRT config
  option is set
 
 This change is to call efi_esrt_populate function if CONFIG_EFI_ESRT
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0015-efi_firmware-add-get_image_info-for-corstone1000.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0015-efi_firmware-add-get_image_info-for-corstone1000.patch
index 2186330..c74c7c0 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0015-efi_firmware-add-get_image_info-for-corstone1000.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0015-efi_firmware-add-get_image_info-for-corstone1000.patch
@@ -1,7 +1,7 @@
-From 5e12999d179e84ac52e242d56c57a4d429651124 Mon Sep 17 00:00:00 2001
+From 03fe979677509f974b8d56097fbbd6c7e4cbe20b Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 17 Dec 2021 19:50:25 +0000
-Subject: [PATCH 15/33] efi_firmware: add get_image_info for corstone1000
+Subject: [PATCH 15/38] efi_firmware: add get_image_info for corstone1000
 
 This change is to populate get_image_info which eventually
 will be populated in ESRT table
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0016-efi_loader-fix-null-pointer-exception-with-get_image.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0016-efi_loader-fix-null-pointer-exception-with-get_image.patch
index b58c1d79..655e014 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0016-efi_loader-fix-null-pointer-exception-with-get_image.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0016-efi_loader-fix-null-pointer-exception-with-get_image.patch
@@ -1,7 +1,7 @@
-From 957e88fc52d77e6a3024f06bebfaa713c9e99e59 Mon Sep 17 00:00:00 2001
+From 13bf700129e902ba7ae556babcfb9c7956f32571 Mon Sep 17 00:00:00 2001
 From: Vishnu Banavath <vishnu.banavath@arm.com>
 Date: Fri, 14 Jan 2022 15:24:18 +0000
-Subject: [PATCH 16/33] efi_loader: fix null pointer exception with
+Subject: [PATCH 16/38] efi_loader: fix null pointer exception with
  get_image_info
 
 get_img_info API implemented for corstone1000 target does not
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0017-arm-corstone1000-add-mmc-for-fvp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0017-arm-corstone1000-add-mmc-for-fvp.patch
index 75fe64c..dd746d9 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0017-arm-corstone1000-add-mmc-for-fvp.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0017-arm-corstone1000-add-mmc-for-fvp.patch
@@ -1,7 +1,7 @@
-From 61b5f50718431b5fff57fcaa924238135b11ed3c Mon Sep 17 00:00:00 2001
+From e07a03678e72afa7a5d2ab66ce2e1a21e0a73cfc Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Mon, 17 Jul 2023 16:50:53 +0100
-Subject: [PATCH 17/33] arm:corstone1000: add mmc for fvp
+Subject: [PATCH 17/38] arm:corstone1000: add mmc for fvp
 
 Enable support mmc/sdcard for the corstone1000 FVP.
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0018-corstone1000-add-compressed-kernel-support.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0018-corstone1000-add-compressed-kernel-support.patch
index 0f28cdf..97cf4d0 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0018-corstone1000-add-compressed-kernel-support.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0018-corstone1000-add-compressed-kernel-support.patch
@@ -1,7 +1,7 @@
-From a5879f1e7d91fc31058ba75b499d77cab080d611 Mon Sep 17 00:00:00 2001
+From b5cfd8ab77e7f305b170a8cd25575e8cc08babc5 Mon Sep 17 00:00:00 2001
 From: Jon Mason <jon.mason@arm.com>
 Date: Wed, 30 Nov 2022 18:59:59 +0000
-Subject: [PATCH 18/33] corstone1000: add compressed kernel support
+Subject: [PATCH 18/38] corstone1000: add compressed kernel support
 
 The corstone1000 kernel has become too large to fit in the available
 storage.  Swtiching to a compressed kernel avoids the problem, but
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-Introduce-external-sys-driver-to-device-tree.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-Introduce-external-sys-driver-to-device-tree.patch
deleted file mode 100644
index a4c6625..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-Introduce-external-sys-driver-to-device-tree.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 0748658414dd02cec0219841a86c4e7b99bfc171 Mon Sep 17 00:00:00 2001
-From: Emekcan <emekcan.aras@arm.com>
-Date: Wed, 30 Nov 2022 19:02:26 +0000
-Subject: [PATCH 19/33] Introduce external sys driver to device-tree
-
-It adds external sys driver binding to u-boot
-device tree.
-
-Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
----
- arch/arm/dts/corstone1000.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 533dfdf8e1..a834d38454 100644
---- a/arch/arm/dts/corstone1000.dtsi
-+++ b/arch/arm/dts/corstone1000.dtsi
-@@ -167,5 +167,12 @@
- 			secure-status = "okay";     /* secure-world-only */
- 			status = "disabled";
- 		};
-+
-+		extsys0: extsys@1A010310 {
-+			compatible = "arm,extsys_ctrl";
-+			reg = <0x1A010310 0x4>,
-+			      <0x1A010314 0X4>;
-+			reg-names = "rstreg", "streg";
-+		};
- 	};
- };
--- 
-2.25.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-arm-corstone1000-esrt-support.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-arm-corstone1000-esrt-support.patch
similarity index 98%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-arm-corstone1000-esrt-support.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-arm-corstone1000-esrt-support.patch
index 369613e..11e5124 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-arm-corstone1000-esrt-support.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0019-arm-corstone1000-esrt-support.patch
@@ -1,7 +1,7 @@
-From 0380dee4df6ef11bb08a9c44119b41c58afc562d Mon Sep 17 00:00:00 2001
+From d7682e9f7c45fffe5be0bc67ee9e31fdca1b94c5 Mon Sep 17 00:00:00 2001
 From: Satish Kumar <satish.kumar01@arm.com>
 Date: Wed, 30 Nov 2022 19:11:43 +0000
-Subject: [PATCH 21/33] arm/corstone1000: esrt support
+Subject: [PATCH 19/38] arm/corstone1000: esrt support
 
 The implementation is platform specific and would require
 change in future.
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch
deleted file mode 100644
index f3b1503..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 396229d3d29d9cfd5e2567be5427a9066072e32f Mon Sep 17 00:00:00 2001
-From: Emekcan <emekcan.aras@arm.com>
-Date: Mon, 12 Sep 2022 15:47:06 +0100
-Subject: [PATCH 20/33] Add mhu and rpmsg client to u-boot device tree
-
-Adds external system controller and mhu driver to u-boot
-device tree. This enables communication between host and
-the external system.
-
-Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
----
- arch/arm/dts/corstone1000.dtsi | 50 ++++++++++++++++++++++++++++++++++
- 1 file changed, 50 insertions(+)
-
-diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index a834d38454..18c4d1e19a 100644
---- a/arch/arm/dts/corstone1000.dtsi
-+++ b/arch/arm/dts/corstone1000.dtsi
-@@ -168,6 +168,56 @@
- 			status = "disabled";
- 		};
- 
-+		mbox_es0mhu0_tx: mhu@1b000000 {
-+			compatible = "arm,mhuv2-tx","arm,primecell";
-+			reg = <0x1b000000 0x1000>;
-+			clocks = <&refclk100mhz>;
-+			clock-names = "apb_pclk";
-+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-+			#mbox-cells = <2>;
-+			arm,mhuv2-protocols = <1 1>;
-+			mbox-name = "arm-es0-mhu0_tx";
-+		};
-+
-+		mbox_es0mhu0_rx: mhu@1b010000 {
-+			compatible = "arm,mhuv2-rx","arm,primecell";
-+			reg = <0x1b010000 0x1000>;
-+			clocks = <&refclk100mhz>;
-+			clock-names = "apb_pclk";
-+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-+			#mbox-cells = <2>;
-+			arm,mhuv2-protocols = <1 1>;
-+			mbox-name = "arm-es0-mhu0_rx";
-+		};
-+
-+		mbox_es0mhu1_tx: mhu@1b020000 {
-+			compatible = "arm,mhuv2-tx","arm,primecell";
-+			reg = <0x1b020000 0x1000>;
-+			clocks = <&refclk100mhz>;
-+			clock-names = "apb_pclk";
-+			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-+			#mbox-cells = <2>;
-+			arm,mhuv2-protocols = <1 1>;
-+			mbox-name = "arm-es0-mhu1_tx";
-+		};
-+
-+		mbox_es0mhu1_rx: mhu@1b030000 {
-+			compatible = "arm,mhuv2-rx","arm,primecell";
-+			reg = <0x1b030000 0x1000>;
-+			clocks = <&refclk100mhz>;
-+			clock-names = "apb_pclk";
-+			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
-+			#mbox-cells = <2>;
-+			arm,mhuv2-protocols = <1 1>;
-+			mbox-name = "arm-es0-mhu1_rx";
-+		};
-+
-+		client {
-+			compatible = "arm,client";
-+			mboxes = <&mbox_es0mhu0_tx 0 0>, <&mbox_es0mhu1_tx 0 0>, <&mbox_es0mhu0_rx 0 0>, <&mbox_es0mhu1_rx 0 0>;
-+			mbox-names = "es0mhu0_tx", "es0mhu1_tx", "es0mhu0_rx", "es0mhu1_rx";
-+		};
-+
- 		extsys0: extsys@1A010310 {
- 			compatible = "arm,extsys_ctrl";
- 			reg = <0x1A010310 0x4>,
--- 
-2.25.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-corstone1000-enable-distro-booting-command.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-corstone1000-enable-distro-booting-command.patch
similarity index 84%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-corstone1000-enable-distro-booting-command.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-corstone1000-enable-distro-booting-command.patch
index 6f04081..ba9aeeb 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-corstone1000-enable-distro-booting-command.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0020-corstone1000-enable-distro-booting-command.patch
@@ -1,7 +1,7 @@
-From b3c9b57d862060b7d112725a567c0ff24184c6e1 Mon Sep 17 00:00:00 2001
+From 0094eb1e6ca78988f105fefb69dd5cc9046c89fe Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Mon, 5 Dec 2022 17:02:32 +0000
-Subject: [PATCH 22/33] corstone1000: enable distro booting command
+Subject: [PATCH 20/38] corstone1000: enable distro booting command
 
 enable distro_bootcmd
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-fwu-metadata-store-info.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-corstone1000-add-fwu-metadata-store-info.patch
similarity index 84%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-fwu-metadata-store-info.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-corstone1000-add-fwu-metadata-store-info.patch
index 6b34796..e524d83 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-fwu-metadata-store-info.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0021-corstone1000-add-fwu-metadata-store-info.patch
@@ -1,7 +1,7 @@
-From 10265c2006291f961cc4fdbbffdec6c5f52bf73b Mon Sep 17 00:00:00 2001
+From 7f0ab0707b476d141bcf16de78d09c793b3b7387 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 15:58:07 +0000
-Subject: [PATCH 23/33] corstone1000: add fwu-metadata store info
+Subject: [PATCH 21/38] corstone1000: add fwu-metadata store info
 
 Add fwu-mdata node and handle for the reference
 nvmxip-qspi.
@@ -13,7 +13,7 @@
  1 file changed, 6 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 18c4d1e19a..25a032b6b3 100644
+index 533dfdf8e1..1e0ec075e4 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
 @@ -38,7 +38,7 @@
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-fwu_metadata-make-sure-structures-are-packed.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-fwu_metadata-make-sure-structures-are-packed.patch
similarity index 91%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-fwu_metadata-make-sure-structures-are-packed.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-fwu_metadata-make-sure-structures-are-packed.patch
index 88566a6..addd1df 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-fwu_metadata-make-sure-structures-are-packed.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0022-fwu_metadata-make-sure-structures-are-packed.patch
@@ -1,7 +1,7 @@
-From 046e54d0152987163355e33fe260419dfcf3b8bb Mon Sep 17 00:00:00 2001
+From b2e413049dcf3dcbe3891a8a70bdd36f30b2e6c8 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 16:13:24 +0000
-Subject: [PATCH 24/33] fwu_metadata: make sure structures are packed
+Subject: [PATCH 22/38] fwu_metadata: make sure structures are packed
 
 The fwu metadata in the metadata partitions
 should/are packed to guarantee that the info is
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-boot-index.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-boot-index.patch
similarity index 90%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-boot-index.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-boot-index.patch
index 45ec44f..b4be24f 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-boot-index.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0023-corstone1000-add-boot-index.patch
@@ -1,7 +1,7 @@
-From 92f471d3195e3893f463b11d49f0db62793ca585 Mon Sep 17 00:00:00 2001
+From 62eaf5720bfe49feedf486c57ce9b9968360460c Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Mon, 17 Jul 2023 17:04:10 +0100
-Subject: [PATCH 25/33] corstone1000: add boot index
+Subject: [PATCH 23/38] corstone1000: add boot index
 
 it is expected that the firmware that runs before
 u-boot somehow provide the information of the bank
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-corstone1000-adjust-boot-bank-and-kernel-location.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-corstone1000-adjust-boot-bank-and-kernel-location.patch
similarity index 89%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-corstone1000-adjust-boot-bank-and-kernel-location.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-corstone1000-adjust-boot-bank-and-kernel-location.patch
index 9a889ea..ddf80f3 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-corstone1000-adjust-boot-bank-and-kernel-location.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0024-corstone1000-adjust-boot-bank-and-kernel-location.patch
@@ -1,7 +1,7 @@
-From 6ea58b2450c72036551e59186888474bcb54a194 Mon Sep 17 00:00:00 2001
+From 147f98fbefc7e13d1b9a3ae4b5fd3adc30dbed6b Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Wed, 1 Feb 2023 16:17:21 +0000
-Subject: [PATCH 26/33] corstone1000: adjust boot bank and kernel location
+Subject: [PATCH 24/38] corstone1000: adjust boot bank and kernel location
 
 Adjust in the env boot script the address of the
 bootbank with the new gpt layout, and also the
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch
similarity index 95%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch
index 621b9d1..7833405 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0025-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch
@@ -1,7 +1,7 @@
-From af1bb3af4ff7bb9486dc9489d27605b8eded45b9 Mon Sep 17 00:00:00 2001
+From ff2e0fe577c5a564a10bcc730392dd5397f6cb34 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Mon, 17 Jul 2023 17:33:52 +0100
-Subject: [PATCH 27/33] corstone1000: add nvmxip, fwu-mdata and gpt options
+Subject: [PATCH 25/38] corstone1000: add nvmxip, fwu-mdata and gpt options
 
 Enable the newest features: nvmxip, fwu-metadata and
 gpt. Commands to print the partition info, gpt info
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-nvmxip-move-header-to-include.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-nvmxip-move-header-to-include.patch
similarity index 90%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-nvmxip-move-header-to-include.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-nvmxip-move-header-to-include.patch
index aac5a1d..ec38a51 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-nvmxip-move-header-to-include.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0026-nvmxip-move-header-to-include.patch
@@ -1,7 +1,7 @@
-From 050c2d8577fd98f20c8b96dab3e4c42c8508b6bc Mon Sep 17 00:00:00 2001
+From 2214be0f540121767d7b6ec4910a7389a1edd13c Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Fri, 9 Jun 2023 13:31:53 +0100
-Subject: [PATCH 28/33] nvmxip: move header to include
+Subject: [PATCH 26/38] nvmxip: move header to include
 
 Move header to include to allow external code
 to get the internal bdev structures to access
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-set-kernel_addr-based-on-boot_idx.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-set-kernel_addr-based-on-boot_idx.patch
similarity index 96%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-set-kernel_addr-based-on-boot_idx.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-set-kernel_addr-based-on-boot_idx.patch
index 6ad4648..a95a8c6 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-set-kernel_addr-based-on-boot_idx.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0027-corstone1000-set-kernel_addr-based-on-boot_idx.patch
@@ -1,7 +1,7 @@
-From c547f3335ddff71a7f4915dc0c99ccbcdbf24b54 Mon Sep 17 00:00:00 2001
+From c615b2e0fe9440b27b83f32c62fdc7f996237b56 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Tue, 18 Jul 2023 12:14:47 +0100
-Subject: [PATCH 29/33] corstone1000: set kernel_addr based on boot_idx
+Subject: [PATCH 27/38] corstone1000: set kernel_addr based on boot_idx
 
 We need to distinguish between boot banks and from which
 partition to load the kernel+initramfs to memory.
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-corstone1000-boot-index-from-active.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-corstone1000-boot-index-from-active.patch
similarity index 91%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-corstone1000-boot-index-from-active.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-corstone1000-boot-index-from-active.patch
index e59a434..5b68e12 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-corstone1000-boot-index-from-active.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0028-corstone1000-boot-index-from-active.patch
@@ -1,7 +1,7 @@
-From faeeeecba2a7c8c507280ce369e3779f7c63d1e4 Mon Sep 17 00:00:00 2001
+From 747da6c0d1f2558ebeaf01ba9f762efa58a08a72 Mon Sep 17 00:00:00 2001
 From: Rui Miguel Silva <rui.silva@linaro.org>
 Date: Mon, 27 Feb 2023 14:40:13 +0000
-Subject: [PATCH 30/33] corstone1000: boot index from active
+Subject: [PATCH 28/38] corstone1000: boot index from active
 
 In our platform, the Secure Enclave is the one who control
 all the boot tries and status, so, every time we get here
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-enable-PSCI-reset.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-enable-PSCI-reset.patch
similarity index 88%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-enable-PSCI-reset.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-enable-PSCI-reset.patch
index 9ba0205..828661c 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-enable-PSCI-reset.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0029-corstone1000-enable-PSCI-reset.patch
@@ -1,7 +1,7 @@
-From 0524aa417c4989bf03366f13a2456b3bcb72fb87 Mon Sep 17 00:00:00 2001
+From af7054ffdb1f84875a652c6b968dacf9a29cdc9c Mon Sep 17 00:00:00 2001
 From: Emekcan Aras <emekcan.aras@arm.com>
 Date: Tue, 18 Jul 2023 12:19:17 +0100
-Subject: [PATCH 31/33] corstone1000: enable PSCI reset
+Subject: [PATCH 29/38] corstone1000: enable PSCI reset
 
 Even though corstone1000 does not implement entire PSCI APIs,it relies on
 PSCI reset interface for the system reset. U-boot change the config name, so we
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-Enable-EFI-set-get-time-services.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-Enable-EFI-set-get-time-services.patch
similarity index 89%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-Enable-EFI-set-get-time-services.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-Enable-EFI-set-get-time-services.patch
index acc35f1..437ee88 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-Enable-EFI-set-get-time-services.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-Enable-EFI-set-get-time-services.patch
@@ -1,7 +1,7 @@
-From 0ba2b25a9c1dd9c63615bf6830cfb470f33a31b5 Mon Sep 17 00:00:00 2001
+From 8ee7a9c05eb1abe10be139f439f2adf638614290 Mon Sep 17 00:00:00 2001
 From: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
 Date: Tue, 18 Jul 2023 12:21:39 +0100
-Subject: [PATCH 32/33] Enable EFI set/get time services
+Subject: [PATCH 30/38] Enable EFI set/get time services
 
 SetTime_Conf and SetTime_Func tests in UEFI SCT test suite of ACS
 fails with unsupported return value. CONFIG_EFI_SET_TIME and
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-corstone1000-detect-inflated-kernel-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-detect-inflated-kernel-size.patch
similarity index 85%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-corstone1000-detect-inflated-kernel-size.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-detect-inflated-kernel-size.patch
index 9fd5b33..0a61fd4 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-corstone1000-detect-inflated-kernel-size.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0031-corstone1000-detect-inflated-kernel-size.patch
@@ -1,7 +1,7 @@
-From b57e05e95735b9b58e81b7a67f483b645c56811e Mon Sep 17 00:00:00 2001
+From b65511da443c07b45151b30ea2dc280219f4252b Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Fri, 11 Aug 2023 10:41:19 +0100
-Subject: [PATCH] corstone1000: detect inflated kernel size
+Subject: [PATCH 31/38] corstone1000: detect inflated kernel size
 
 use filesize variable set by unzip command
 
@@ -12,10 +12,10 @@
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
-index b6b1ccdd78..8a10bca069 100644
+index a0af413de8..5b0b2ac3bf 100644
 --- a/configs/corstone1000_defconfig
 +++ b/configs/corstone1000_defconfig
-@@ -17,7 +17,7 @@ CONFIG_FIT=y
+@@ -15,7 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y
  CONFIG_BOOTDELAY=3
  CONFIG_USE_BOOTARGS=y
  CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-corstone1000-ESRT-add-unique-firmware-GUID.patch
similarity index 90%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-corstone1000-ESRT-add-unique-firmware-GUID.patch
index 197a069..34e4545 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0032-corstone1000-ESRT-add-unique-firmware-GUID.patch
@@ -1,7 +1,7 @@
-From 98b33cc6b3a56f56224e0a6fe6c3564de7b1341a Mon Sep 17 00:00:00 2001
+From 7e63d4982fd4436d9d0d9abebd9e0ed1473f5237 Mon Sep 17 00:00:00 2001
 From: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com>
 Date: Tue, 8 Aug 2023 10:24:39 +0000
-Subject: [PATCH] corstone1000: ESRT: add unique firmware GUID
+Subject: [PATCH 32/38] corstone1000: ESRT: add unique firmware GUID
 
 Add unique Corstone-1000 firmware GUID
 
@@ -12,7 +12,7 @@
  1 file changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
-index 6135f8ed1c..c9117ae2b2 100644
+index c6ab6e2182..7792a6aa83 100644
 --- a/lib/efi_loader/efi_firmware.c
 +++ b/lib/efi_loader/efi_firmware.c
 @@ -20,12 +20,12 @@
@@ -43,5 +43,5 @@
  	ret = efi_fill_image_desc_array(image_info_size, image_info,
  					descriptor_version, descriptor_count,
 -- 
-2.38.1
+2.25.1
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch
similarity index 96%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch
index 25a7aa3..ea5e0ef 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch
@@ -1,7 +1,7 @@
-From a37ab0c2578a4627111022d2d1f27f9efa1c2b76 Mon Sep 17 00:00:00 2001
+From a8ecc3ce0fcabb2414a000b7c8bfe3ce46d4392c Mon Sep 17 00:00:00 2001
 From: Sughosh Ganu <sughosh.ganu@linaro.org>
 Date: Thu, 21 Sep 2023 14:13:42 +0100
-Subject: [PATCH 35/37] dt: Provide a way to remove non-compliant nodes and
+Subject: [PATCH 33/38] dt: Provide a way to remove non-compliant nodes and
  properties
 
 Add a function which is registered to spy for a EVT_FT_FIXUP event,
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch
similarity index 92%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch
index 2eb273a..c44b6e3 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch
@@ -1,7 +1,7 @@
-From 729c0163ae6aed76b3267b95d2989e70ded66716 Mon Sep 17 00:00:00 2001
+From 829e5d3a505452fbdb420432dc885903332a8cdc Mon Sep 17 00:00:00 2001
 From: Sughosh Ganu <sughosh.ganu@linaro.org>
 Date: Thu, 21 Sep 2023 14:15:13 +0100
-Subject: [PATCH 36/37] bootefi: Call the EVT_FT_FIXUP event handler
+Subject: [PATCH 34/38] bootefi: Call the EVT_FT_FIXUP event handler
 
 The bootefi command passes the devicetree to the kernel through the
 EFI config table. Call the event handlers for fixing the devicetree
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-purge-U-Boot-specific-DT-nodes.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-corstone1000-purge-U-Boot-specific-DT-nodes.patch
similarity index 92%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-purge-U-Boot-specific-DT-nodes.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-corstone1000-purge-U-Boot-specific-DT-nodes.patch
index 2aafadd..230ebe6 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-purge-U-Boot-specific-DT-nodes.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0035-corstone1000-purge-U-Boot-specific-DT-nodes.patch
@@ -1,7 +1,7 @@
-From 1527eef4dd54a425a5a178f09fa9d3d65aa3e30a Mon Sep 17 00:00:00 2001
+From 3654cebe9449584aa94563b2252c267b926219c9 Mon Sep 17 00:00:00 2001
 From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
 Date: Thu, 21 Sep 2023 15:24:34 +0100
-Subject: [PATCH 37/37] corstone1000: purge U-Boot specific DT nodes
+Subject: [PATCH 35/38] corstone1000: purge U-Boot specific DT nodes
 
 Remove U-Boot specific DT nodes before passing the DT to Linux
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-add-signature-device-tree-overlay.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-corstone1000-add-signature-device-tree-overlay.patch
similarity index 78%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-add-signature-device-tree-overlay.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-corstone1000-add-signature-device-tree-overlay.patch
index 9d8c6a9..04193a8 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-add-signature-device-tree-overlay.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0036-corstone1000-add-signature-device-tree-overlay.patch
@@ -1,7 +1,7 @@
-From 88cb6f5a91178903d4e306d8653b941f9727987b Mon Sep 17 00:00:00 2001
+From b6e69bd68c1e0171aa2acb78bec54da02defe129 Mon Sep 17 00:00:00 2001
 From: Emekcan Aras <emekcan.aras@arm.com>
 Date: Wed, 13 Sep 2023 13:20:15 +0100
-Subject: [PATCH] corstone1000: add signature device tree overlay
+Subject: [PATCH 36/38] corstone1000: add signature device tree overlay
 
 Adds signature device tree overlay.
 
@@ -12,7 +12,7 @@
  1 file changed, 4 insertions(+)
 
 diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
-index 25a032b6b3..1c3ab2c315 100644
+index 1e0ec075e4..077673dd44 100644
 --- a/arch/arm/dts/corstone1000.dtsi
 +++ b/arch/arm/dts/corstone1000.dtsi
 @@ -111,6 +111,10 @@
@@ -27,5 +27,5 @@
  		compatible = "simple-bus";
  		#address-cells = <1>;
 -- 
-2.17.1
+2.25.1
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-corstone1000-enable-authenticated-capsule-config.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-enable-authenticated-capsule-config.patch
similarity index 84%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-corstone1000-enable-authenticated-capsule-config.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-enable-authenticated-capsule-config.patch
index 761234e..fe48ab1 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-corstone1000-enable-authenticated-capsule-config.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0037-corstone1000-enable-authenticated-capsule-config.patch
@@ -1,7 +1,7 @@
-From 9b884d4f483474b99fcb4850197a1c8dde34147d Mon Sep 17 00:00:00 2001
+From 6a4d38a82755a8946ff8b79440550cae8032abed Mon Sep 17 00:00:00 2001
 From: Emekcan Aras <emekcan.aras@arm.com>
 Date: Wed, 13 Sep 2023 13:52:02 +0100
-Subject: [PATCH] corstone1000: enable authenticated capsule config
+Subject: [PATCH 37/38] corstone1000: enable authenticated capsule config
 
 Enables authenticated capsule update config for corstone1000.
 
@@ -24,5 +24,5 @@
  CONFIG_FWU_MULTI_BANK_UPDATE=y
  # CONFIG_TOOLS_MKEFICAPSULE is not set
 -- 
-2.17.1
+2.25.1
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-corstone1000-introduce-EFI-authenticated-capsule-upd.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-introduce-EFI-authenticated-capsule-upd.patch
similarity index 93%
rename from meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-corstone1000-introduce-EFI-authenticated-capsule-upd.patch
rename to meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-introduce-EFI-authenticated-capsule-upd.patch
index f47dd8c..6e268d4 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-corstone1000-introduce-EFI-authenticated-capsule-upd.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0038-corstone1000-introduce-EFI-authenticated-capsule-upd.patch
@@ -1,7 +1,8 @@
-From b99a39c662b9be5f940b895efa8016f5567e1c1f Mon Sep 17 00:00:00 2001
+From 0d1975369f3c483b540818cec8a088ed35116bbb Mon Sep 17 00:00:00 2001
 From: Emekcan Aras <emekcan.aras@arm.com>
 Date: Wed, 13 Sep 2023 13:55:08 +0100
-Subject: [PATCH] corstone1000: introduce EFI authenticated capsule update
+Subject: [PATCH 38/38] corstone1000: introduce EFI authenticated capsule
+ update
 
 Introduces EFI authenticated capsule update for corstone1000. Corstone1000
 implements platform-specific capsule update mechanism in u-bootdue to the SoC
@@ -15,7 +16,7 @@
  1 file changed, 39 insertions(+)
 
 diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
-index 6a06605ad9..30fb7d1dd5 100644
+index 6a06605ad9..e1c78d8c1c 100644
 --- a/lib/efi_loader/efi_capsule.c
 +++ b/lib/efi_loader/efi_capsule.c
 @@ -820,6 +820,12 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
@@ -72,5 +73,5 @@
  		efi_memcpy_runtime(corstone1000_capsule_buf, capsule, capsule->capsule_image_size);
  
 -- 
-2.17.1
+2.25.1
 
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-enables-ondisk-capsule-update-feature.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-enables-ondisk-capsule-update-feature.patch
new file mode 100644
index 0000000..cd002ac
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0039-enables-ondisk-capsule-update-feature.patch
@@ -0,0 +1,33 @@
+From e5057a10641a7c84186bcbbcd12ee904300ebc53 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Fri, 13 Oct 2023 15:19:32 +0100
+Subject: [PATCH] Enables on-disk capsule update feature
+
+Enables on-disk capsule update feature for corstone1000.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Inappropriate [Redesign of Capsule update interface is required]
+---
+ lib/efi_loader/efi_capsule.c | 5 ++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index e1c78d8c1c..63e4c06e58 100644
+--- a/lib/efi_loader/efi_capsule.c
++++ b/lib/efi_loader/efi_capsule.c
+@@ -1499,7 +1499,12 @@ efi_status_t efi_launch_capsules(void)
+			index = 0;
+		ret = efi_capsule_read_file(files[i], &capsule);
+		if (ret == EFI_SUCCESS) {
++			#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
++			/* capsule update only supports 1 image and no scatter gather list for corstone1000 */
++			efi_update_capsule(&capsule, 1, 0);
++			#elif
+			ret = efi_capsule_update_firmware(capsule);
++			#endif
+			if (ret != EFI_SUCCESS) {
+				log_err("Applying capsule %ls failed.\n",
+					files[i]);
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-fix-runtime-capsule-update-flags-checks.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-fix-runtime-capsule-update-flags-checks.patch
new file mode 100644
index 0000000..b1d400d
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0040-fix-runtime-capsule-update-flags-checks.patch
@@ -0,0 +1,56 @@
+From a83aa9e1b8f6e312da82e54614fbca498493c34d Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Thu, 19 Oct 2023 14:56:55 +0100
+Subject: [PATCH] fix runtime capsule update flags checks for corstone1000
+
+Fixes capsule update flags checks in capsule update as these checks are missing
+in the platform-specific capsule-update implementation in corstone1000.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Inappropriate [Redesign of Capsule update interface is required]
+---
+ lib/efi_loader/efi_capsule.c | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index 307bcfd73c..34507482b7 100644
+--- a/lib/efi_loader/efi_capsule.c
++++ b/lib/efi_loader/efi_capsule.c
+@@ -854,6 +854,34 @@ efi_status_t __efi_runtime EFIAPI efi_update_capsule(
+			continue;
+		}
+
++		/* According to UEFI specs when the flag is CAPSULE_FLAGS_PERSIST_ACROSS_RESET,
++		ScatterGatherList can't be NULL.*/
++		if ((capsule->flags & CAPSULE_FLAGS_PERSIST_ACROSS_RESET) &&
++		    scatter_gather_list == 0){
++			ret = EFI_INVALID_PARAMETER;
++			goto out;
++		}
++
++		/*According to UEFI specs a capsule which has the CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE
++		 * flag must have CAPSULE_FLAGS_PERSIST_ACROSS_RESET set in its
++		 * header as well.*/
++		if (capsule->flags & CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE){
++			if(!(capsule->flags & CAPSULE_FLAGS_PERSIST_ACROSS_RESET)){
++				ret = EFI_INVALID_PARAMETER;
++				goto out;
++			}
++		}
++
++		/* According to UEFI specs, a capsule which has the CAPSULE_FLAGS_INITIATE_RESET
++		 * Flag must have  CAPSULE_FLAGS_PERSIST_ACROSS_RESET set in its
++		 * header as well.*/
++		if (capsule->flags & CAPSULE_FLAGS_INITIATE_RESET){
++			if(!(capsule->flags & CAPSULE_FLAGS_PERSIST_ACROSS_RESET)){
++				ret = EFI_INVALID_PARAMETER;
++				goto out;
++			}
++		}
++
+		log_debug("Capsule[%d] (guid:%pUs)\n",
+			  i, &capsule->capsule_guid);
+
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0041-scatter-gather-flag-workaround.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0041-scatter-gather-flag-workaround.patch
new file mode 100644
index 0000000..8ce82a7
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0041-scatter-gather-flag-workaround.patch
@@ -0,0 +1,39 @@
+From abc3b43996198012498abe5777cfeedde4538a90 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Mon, 6 Nov 2023 14:52:05 +0000
+Subject: [PATCH] workaround for scatter gather flag check for corstone1000
+
+This workaround passes 1 as scatter_gather_list value to pass the NULL checks
+for scatter_gather_list while CAPSULE_FLAGS_PERSIST_ACROSS_RESET flag is set
+(which is introduced lately to align with UEFI specs). Since these flag checks
+are not implemented in u-boot properly and corstone1000 does not support
+scatter_gather_list during capsule update, this patch will skip the check only
+for on-disk capsule update.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Inappropriate [Redesign of Capsule update interface is required]
+---
+ lib/efi_loader/efi_capsule.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
+index a7d70acf2a..efbedce460 100644
+--- a/lib/efi_loader/efi_capsule.c
++++ b/lib/efi_loader/efi_capsule.c
+@@ -1530,8 +1530,11 @@ efi_status_t efi_launch_capsules(void)
+		ret = efi_capsule_read_file(files[i], &capsule);
+		if (ret == EFI_SUCCESS) {
+			#if IS_ENABLED(CONFIG_TARGET_CORSTONE1000)
+-			/* capsule update only supports 1 image and no scatter gather list for corstone1000 */
+-			efi_update_capsule(&capsule, 1, 0);
++			/* capsule update only supports 1 image and use of scatter_gather_list
++			 * is not implemented for corstone1000 passing 1 to pass
++			 * the NULL flag checks. This should will be fixed with
++			 * new capsule update design*/
++			ret = efi_update_capsule(&capsule, 1, 1);
+			#elif
+			ret = efi_capsule_update_firmware(capsule);
+			#endif
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0042-corstone1000-enable-virtio-net-support.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0042-corstone1000-enable-virtio-net-support.patch
new file mode 100644
index 0000000..d94e26a
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0042-corstone1000-enable-virtio-net-support.patch
@@ -0,0 +1,97 @@
+From 2ddd34b6838e836cf94a9da2f65cd01a21252846 Mon Sep 17 00:00:00 2001
+From: Emekcan Aras <emekcan.aras@arm.com>
+Date: Wed, 15 Nov 2023 16:04:06 +0000
+Subject: [PATCH] corstone1000: enable virtio-net support
+
+Adds virtio-net support in corstone1000-fvp.
+
+Signed-off-by: Emekcan Aras <emekcan.aras@arm.com>
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ arch/arm/dts/corstone1000-fvp.dts        |  6 ++++++
+ board/armltd/corstone1000/corstone1000.c | 24 +++++++++++++++++++++++-
+ configs/corstone1000_defconfig           |  2 ++
+ 3 files changed, 31 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/dts/corstone1000-fvp.dts b/arch/arm/dts/corstone1000-fvp.dts
+index 26b0f1b3ce..8e54a40113 100644
+--- a/arch/arm/dts/corstone1000-fvp.dts
++++ b/arch/arm/dts/corstone1000-fvp.dts
+@@ -21,6 +21,12 @@
+ 		reg-io-width = <2>;
+ 	};
+ 
++	virtio: virtio-net@40400000 {
++		compatible = "virtio,mmio";
++		reg = <0x40400000 0x10000>;
++		interrupts = <145>;
++	};
++
+ 	vmmc_v3_3d: fixed_v3_3d {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "vmmc_supply";
+diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
+index e3c0e5bf50..ef74dc9032 100644
+--- a/board/armltd/corstone1000/corstone1000.c
++++ b/board/armltd/corstone1000/corstone1000.c
+@@ -18,6 +18,7 @@
+ #include <dm/platform_data/serial_pl01x.h>
+ #include <asm/armv8/mmu.h>
+ #include <asm/global_data.h>
++#include <generated/dt.h>
+ 
+ /* remove the DT nodes not needed in Linux */
+ DT_NON_COMPLIANT_PURGE_LIST(foo) = {
+@@ -101,6 +102,14 @@ static struct mm_region corstone1000_mem_map[] = {
+ 		.size = 0x80000000UL,
+ 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ 			PTE_BLOCK_INNER_SHARE
++	}, {
++		/* ethernet */
++		.virt = 0x40400000UL,
++			.phys = 0x40400000UL,
++			.size = 0x00100000UL,
++			.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
++				PTE_BLOCK_NON_SHARE |
++				PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ 	}, {
+ 		/* List terminator */
+ 		0,
+@@ -150,10 +159,23 @@ void fwu_plat_get_bootidx(uint *boot_idx)
+ int board_late_init(void)
+ {
+ 	struct disk_partition part_info;
+-	struct udevice *dev, *bdev;
++	struct udevice *dev, *bdev,*virtio_bus, *virtio_child;;
+ 	struct nvmxip_plat *plat;
+ 	struct blk_desc *desc;
+ 	int ret;
++	const char *cmp_dtb = DEVICE_TREE;
++
++	if (!strcmp(cmp_dtb, "corstone1000-fvp")) {
++		ret = uclass_first_device_err(UCLASS_VIRTIO, &virtio_bus);
++		if (!virtio_bus){
++			log_err("Cannot find virtio device\n");
++			return ret;
++		}
++		while (virtio_bus) {
++			device_foreach_child_probe(virtio_child, virtio_bus);
++			uclass_next_device(&virtio_bus);
++		}
++	}
+ 
+ 	ret = uclass_first_device_err(UCLASS_NVMXIP, &dev);
+ 	if (ret < 0) {
+diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
+index 2de3f5d7b3..8770b474e2 100644
+--- a/configs/corstone1000_defconfig
++++ b/configs/corstone1000_defconfig
+@@ -78,3 +78,5 @@ CONFIG_DM_GPIO=y
+ CONFIG_SYSRESET_PSCI=y
+ CONFIG_EFI_SET_TIME=y
+ CONFIG_EFI_GET_TIME=y
++CONFIG_VIRTIO_NET=y
++CONFIG_VIRTIO_MMIO=y
+-- 
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-Revert-vexpress64-pick-DRAM-size-from-DT.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-Revert-vexpress64-pick-DRAM-size-from-DT.patch
deleted file mode 100644
index d551622..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-Revert-vexpress64-pick-DRAM-size-from-DT.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 4f649e0a3e0f9ed1f0d6efdff5b14cdc40d84201 Mon Sep 17 00:00:00 2001
-From: Jon Mason <jon.mason@arm.com
-Date: Thu, 2 Mar 2023 15:22:08 +0000
-Subject: [PATCH] Revert "vexpress64: pick DRAM size from DT"
-
-This reverts commit 1a1143a45457161e90ea4cd5f3b0561d924ed8fe.
-
-DRAM is determined via dtb in recent versions.  Since fvp isn't
-reading and specifying a dtb, this fails and hangs u-boot.  Remove this
-and go back to the way things were.
-
-Signed-off-by: Jon Mason <jon.mason@arm.com>
-Upstream-Status: Inappropriate
----
- board/armltd/vexpress64/vexpress64.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
-index af326dc6f453..e8ce88b22c5a 100644
---- a/board/armltd/vexpress64/vexpress64.c
-+++ b/board/armltd/vexpress64/vexpress64.c
-@@ -88,12 +88,20 @@ int board_init(void)
- 
- int dram_init(void)
- {
--	return fdtdec_setup_mem_size_base();
-+	gd->ram_size = PHYS_SDRAM_1_SIZE;
-+	return 0;
- }
- 
- int dram_init_banksize(void)
- {
--	return fdtdec_setup_memory_banksize();
-+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+#ifdef PHYS_SDRAM_2
-+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-+	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-+#endif
-+
-+	return 0;
- }
- 
- /* Assigned in lowlevel_init.S
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-virtio-rng-Workaround-for-FVP-returning-zero-size-bu.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-virtio-rng-Workaround-for-FVP-returning-zero-size-bu.patch
new file mode 100644
index 0000000..689361d
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0001-virtio-rng-Workaround-for-FVP-returning-zero-size-bu.patch
@@ -0,0 +1,49 @@
+From 3ab73b453016d91b9f942a7c12173854135530a4 Mon Sep 17 00:00:00 2001
+From: Peter Hoyes <Peter.Hoyes@arm.com>
+Date: Wed, 23 Aug 2023 21:17:17 +0100
+Subject: [PATCH] virtio: rng: Workaround for FVP returning zero-size buffer
+
+The FVP virtio-rng device is observed to always 8 fewer bytes of random
+data than requested. When 8 of fewer bytes are requested, the FVP
+returns 0 bytes. This causes U-Boot to hang upon attempting to fill the
+last 8 bytes of the input buffer.
+
+The virtio spec states than entropy devices must always return at least
+1 byte of random data.
+
+To workaround this, always request exactly 16 bytes from the virtio
+device, discarding any unused data.
+
+Upstream-Status: Inappropriate [Temporary workaround]
+Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
+---
+ drivers/virtio/virtio_rng.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c
+index b85545c2ee5..1e4fc342406 100644
+--- a/drivers/virtio/virtio_rng.c
++++ b/drivers/virtio/virtio_rng.c
+@@ -29,7 +29,7 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len)
+
+ 	while (len) {
+ 		sg.addr = buf;
+-		sg.length = min(len, sizeof(buf));
++		sg.length = sizeof(buf);
+ 		sgs[0] = &sg;
+
+ 		ret = virtqueue_add(priv->rng_vq, sgs, 0, 1);
+@@ -44,8 +44,8 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len)
+ 		if (rsize > sg.length)
+ 			return -EIO;
+
+-		memcpy(ptr, buf, rsize);
+-		len -= rsize;
++		memcpy(ptr, buf, min(len, (size_t)rsize));
++		len -= min(len, (size_t)rsize);
+ 		ptr += rsize;
+ 	}
+
+--
+2.34.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0002-vexpress64-Set-the-DM_RNG-property.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0002-vexpress64-Set-the-DM_RNG-property.patch
new file mode 100644
index 0000000..2f99eaf
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0002-vexpress64-Set-the-DM_RNG-property.patch
@@ -0,0 +1,31 @@
+From 9a28caf05b8345cd19276cf7a840599bd9e37749 Mon Sep 17 00:00:00 2001
+From: Debbie Martin <Debbie.Martin@arm.com>
+Date: Fri, 25 Aug 2023 15:09:33 +0100
+Subject: [PATCH] vexpress64: Set the DM_RNG property
+
+Enable the DM_RNG virtio random number generator driver in
+in order to consume entropy within u-boot. This is necessary
+in the case that the kernel is not configured to enable the
+virtio rng driver itself.
+
+Upstream-Status: Pending
+Signed-off-by: Debbie Martin <Debbie.Martin@arm.com>
+---
+ board/armltd/vexpress64/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
+index cf998096e4..7ae5055f59 100644
+--- a/board/armltd/vexpress64/Kconfig
++++ b/board/armltd/vexpress64/Kconfig
+@@ -21,6 +21,7 @@ config VEXPRESS64_BASE_MODEL
+ 	imply EFI_SET_TIME if DM_RTC
+ 	select LINUX_KERNEL_IMAGE_HEADER
+ 	select POSITION_INDEPENDENT
++	imply DM_RNG
+
+ choice
+ 	prompt "VExpress64 board variant"
+--
+2.25.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0003-vexpress64-Select-PSCI-RESET-by-default.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0003-vexpress64-Select-PSCI-RESET-by-default.patch
new file mode 100644
index 0000000..9d9a5bd
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0003-vexpress64-Select-PSCI-RESET-by-default.patch
@@ -0,0 +1,52 @@
+From 43881e2e9dd165a65791927b1455f4b6c8727f4c Mon Sep 17 00:00:00 2001
+Message-Id: <43881e2e9dd165a65791927b1455f4b6c8727f4c.1696397516.git.diego.sueiro@arm.com>
+In-Reply-To: <98035c418c3df58817ab678037599303842ee931.1696397516.git.diego.sueiro@arm.com>
+References: <98035c418c3df58817ab678037599303842ee931.1696397516.git.diego.sueiro@arm.com>
+From: Diego Sueiro <diego.sueiro@arm.com>
+Date: Wed, 4 Oct 2023 06:31:50 +0100
+Subject: [PATCH 2/2] vexpress64: Select PSCI RESET by default
+
+Set SYSRESET and SYSRESET_PSCI config for vexpress64 by 
+by default. This means that the reset_cpu function in
+vexpress64.c is no longer needed because it is called in
+sysreset-uclass.c instead.
+
+Upstream-Status: Pending
+Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
+---
+ board/armltd/vexpress64/Kconfig      | 2 ++
+ board/armltd/vexpress64/vexpress64.c | 5 -----
+ 2 files changed, 2 insertions(+), 5 deletions(-)
+
+diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
+index 0d161740fb..0c2e5f8759 100644
+--- a/board/armltd/vexpress64/Kconfig
++++ b/board/armltd/vexpress64/Kconfig
+@@ -31,6 +31,8 @@ config TARGET_VEXPRESS64_BASE_FVP
+ 	bool "Support Versatile Express ARMv8a FVP BASE model"
+ 	select VEXPRESS64_BASE_MODEL
+ 	imply OF_HAS_PRIOR_STAGE
++	select SYSRESET
++	select SYSRESET_PSCI
+ 
+ config TARGET_VEXPRESS64_BASER_FVP
+ 	bool "Support Versatile Express ARMv8r64 FVP BASE model"
+diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
+index ee65a59683..f73de56464 100644
+--- a/board/armltd/vexpress64/vexpress64.c
++++ b/board/armltd/vexpress64/vexpress64.c
+@@ -207,11 +207,6 @@ void *board_fdt_blob_setup(int *err)
+ }
+ #endif
+ 
+-/* Actual reset is done via PSCI. */
+-void reset_cpu(void)
+-{
+-}
+-
+ /*
+  * Board specific ethernet initialization routine.
+  */
+-- 
+2.39.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0004-vexpress64-Imply-CONFIG_ARM64_CRC32-by-default.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0004-vexpress64-Imply-CONFIG_ARM64_CRC32-by-default.patch
new file mode 100644
index 0000000..3d10994
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/0004-vexpress64-Imply-CONFIG_ARM64_CRC32-by-default.patch
@@ -0,0 +1,31 @@
+From 98035c418c3df58817ab678037599303842ee931 Mon Sep 17 00:00:00 2001
+Message-Id: <98035c418c3df58817ab678037599303842ee931.1696397516.git.diego.sueiro@arm.com>
+From: Diego Sueiro <diego.sueiro@arm.com>
+Date: Wed, 4 Oct 2023 06:29:12 +0100
+Subject: [PATCH 1/2] vexpress64: Imply CONFIG_ARM64_CRC32 by default
+
+Enable the Arm64 CRC-32 instruction by default for 
+vexpress64. The CRC-32 instruction is a required 
+feature of ARMv8.1 and newer. 
+
+Upstream-Status: Pending
+Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
+---
+ board/armltd/vexpress64/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
+index 7ae5055f59..0d161740fb 100644
+--- a/board/armltd/vexpress64/Kconfig
++++ b/board/armltd/vexpress64/Kconfig
+@@ -22,6 +22,7 @@ config VEXPRESS64_BASE_MODEL
+ 	select LINUX_KERNEL_IMAGE_HEADER
+ 	select POSITION_INDEPENDENT
+ 	imply DM_RNG
++	imply ARM64_CRC32
+ 
+ choice
+ 	prompt "VExpress64 board variant"
+-- 
+2.39.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/bootargs.cfg b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/bootargs.cfg
deleted file mode 100644
index 13f4cb4..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-base/bootargs.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 root=/dev/vda1 rw rootwait"
-CONFIG_BOOTCOMMAND="booti $kernel_addr_r - $fdt_addr_r"
-# Our FVP support CRC instructions
-CONFIG_ARM64_CRC32=y
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
index c2916a5..11f332a 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -1,83 +1,10 @@
 FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
 
-#
-# Corstone1000 64-bit machines
-#
-DEPENDS:append:corstone1000 = " gnutls-native openssl-native efitools-native"
-CORSTONE1000_DEVICE_TREE:corstone1000-mps3 = "corstone1000-mps3"
-CORSTONE1000_DEVICE_TREE:corstone1000-fvp = "corstone1000-fvp"
-EXTRA_OEMAKE:append:corstone1000 = ' DEVICE_TREE=${CORSTONE1000_DEVICE_TREE}'
+MACHINE_U-BOOT_REQUIRE ?= ""
+MACHINE_U-BOOT_REQUIRE:corstone1000 = "u-boot-corstone1000.inc"
+MACHINE_U-BOOT_REQUIRE:fvp-base = "u-boot-fvp-base.inc"
+MACHINE_U-BOOT_REQUIRE:juno = "u-boot-juno.inc"
+MACHINE_U-BOOT_REQUIRE:tc = "u-boot-tc.inc"
 
-SYSROOT_DIRS:append:corstone1000 = " /boot"
+require ${MACHINE_U-BOOT_REQUIRE}
 
-SRC_URI:append:corstone1000 = " \
-        file://0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch    \
-        file://0002-FF-A-v15-lib-uuid-introduce-uuid_str_to_le_bin-funct.patch	  \
-        file://0003-FF-A-v15-lib-uuid-introduce-testcase-for-uuid_str_to.patch	  \
-	file://0004-FF-A-v15-arm_ffa-introduce-Arm-FF-A-support.patch		  \
-	file://0005-FF-A-v15-arm_ffa-introduce-armffa-command.patch		  \
-	file://0006-FF-A-v15-arm_ffa-introduce-sandbox-FF-A-support.patch	  \
-        file://0007-FF-A-v15-arm_ffa-introduce-sandbox-test-cases-for-UC.patch	  \
-        file://0008-FF-A-v15-arm_ffa-introduce-armffa-command-Sandbox-te.patch	  \
-	file://0009-FF-A-v15-arm_ffa-efi-introduce-FF-A-MM-communication.patch	  \
-	file://0010-FF-A-v15-arm_ffa-efi-corstone1000-enable-MM-communic.patch	  \
-	file://0011-efi-corstone1000-fwu-introduce-EFI-capsule-update.patch	  \
-	file://0012-arm-corstone1000-fix-unrecognized-filesystem-type.patch	  \
-	file://0013-efi_loader-corstone1000-remove-guid-check-from-corst.patch	  \
-	file://0014-efi_loader-populate-ESRT-table-if-EFI_ESRT-config-op.patch	  \
-	file://0015-efi_firmware-add-get_image_info-for-corstone1000.patch	  \
-	file://0016-efi_loader-fix-null-pointer-exception-with-get_image.patch	  \
-	file://0017-arm-corstone1000-add-mmc-for-fvp.patch			  \
-	file://0018-corstone1000-add-compressed-kernel-support.patch		  \
-	file://0019-Introduce-external-sys-driver-to-device-tree.patch		  \
-	file://0020-Add-mhu-and-rpmsg-client-to-u-boot-device-tree.patch	  \
-	file://0021-arm-corstone1000-esrt-support.patch			  \
-	file://0022-corstone1000-enable-distro-booting-command.patch		  \
-	file://0023-corstone1000-add-fwu-metadata-store-info.patch		  \
-	file://0024-fwu_metadata-make-sure-structures-are-packed.patch		  \
-	file://0025-corstone1000-add-boot-index.patch				  \
-	file://0026-corstone1000-adjust-boot-bank-and-kernel-location.patch	  \
-	file://0027-corstone1000-add-nvmxip-fwu-mdata-and-gpt-options.patch	  \
-	file://0028-nvmxip-move-header-to-include.patch			  \
-	file://0029-corstone1000-set-kernel_addr-based-on-boot_idx.patch	  \
-	file://0030-corstone1000-boot-index-from-active.patch			  \
-	file://0031-corstone1000-enable-PSCI-reset.patch			  \
-	file://0032-Enable-EFI-set-get-time-services.patch			  \
-	file://0033-corstone1000-detect-inflated-kernel-size.patch			  \
-	file://0034-corstone1000-ESRT-add-unique-firmware-GUID.patch		\
-	file://0035-dt-Provide-a-way-to-remove-non-compliant-nodes-and-p.patch \
-	file://0036-bootefi-Call-the-EVT_FT_FIXUP-event-handler.patch \
-	file://0037-corstone1000-purge-U-Boot-specific-DT-nodes.patch \
-	file://0038-corstone1000-add-signature-device-tree-overlay.patch	  \
-	file://0039-corstone1000-enable-authenticated-capsule-config.patch	  \
-	file://0040-corstone1000-introduce-EFI-authenticated-capsule-upd.patch	  \
-        "
-
-do_configure:append:corstone1000(){
-    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=CRT/ -keyout ${B}/CRT.key -out ${B}/CRT.crt -nodes -days 365
-    cert-to-efi-sig-list ${B}/CRT.crt ${B}/corstone1000_defconfig/CRT.esl
-}
-
-do_install:append:corstone1000() {
-   install -D -p -m 0644 ${B}/CRT.crt ${DEPLOY_DIR_IMAGE}/corstone1000_capsule_cert.crt
-   install -D -p -m 0644 ${B}/CRT.key ${DEPLOY_DIR_IMAGE}/corstone1000_capsule_key.key
-}
-
-#
-# FVP BASE
-#
-SRC_URI:append:fvp-base = " file://bootargs.cfg \
-	file://0001-Revert-vexpress64-pick-DRAM-size-from-DT.patch \
-	"
-#
-# Juno Machines
-#
-SRC_URI:append:juno = " file://0001-configs-vexpress-modify-to-boot-compressed-initramfs.patch"
-
-
-#
-# TC0 and TC1 MACHINES
-#
-SRC_URI:append:tc = " \
-        file://bootargs.cfg \
-        "
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2023.01.bb b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2023.01.bb
deleted file mode 100644
index 2dd5e04..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2023.01.bb
+++ /dev/null
@@ -1,4 +0,0 @@
-require recipes-bsp/u-boot/u-boot-common.inc
-require recipes-bsp/u-boot/u-boot.inc
-
-SRCREV = "62e2ad1ceafbfdf2c44d3dc1b6efc81e768a96b9"
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc
index fcdedf8..f03e4e5 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc
@@ -21,6 +21,7 @@
     file://0006-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch;patchdir=edk2-platforms \
     file://0007-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch;patchdir=edk2-platforms \
     file://0008-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch;patchdir=edk2-platforms \
+    file://0009-Platform-ARM-N1Sdp-Reserve-OP-TEE-Region-from-UEFI.patch;patchdir=edk2-platforms \
 "
 
 do_deploy:append() {
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202211.bb b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202211.bb
deleted file mode 100644
index 378f585..0000000
--- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202211.bb
+++ /dev/null
@@ -1,4 +0,0 @@
-SRCREV_edk2           ?= "fff6d81270b57ee786ea18ad74f43149b9f03494"
-SRCREV_edk2-platforms ?= "982212662c71b6c734b7578526071d6b78da3bcc"
-
-require recipes-bsp/uefi/edk2-firmware.inc
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0009-Platform-ARM-N1Sdp-Reserve-OP-TEE-Region-from-UEFI.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0009-Platform-ARM-N1Sdp-Reserve-OP-TEE-Region-from-UEFI.patch
new file mode 100644
index 0000000..00c85eb
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0009-Platform-ARM-N1Sdp-Reserve-OP-TEE-Region-from-UEFI.patch
@@ -0,0 +1,65 @@
+From 235fabb2269a86e016bab2886b9129c77f0fea71 Wed Oct 11 16:18:22 2023
+From: Mariam Elshakfy <mariam.elshakfy@arm.com>
+Date: Wed Oct 11 16:18:22 2023 +0000
+
+Subject: [PATCH] Platform/ARM/N1Sdp: Reserve OP-TEE Region from UEFI
+
+To enable cache on N1SDP, OP-TEE has to be moved
+to run from DDR4 memory. Since this memory is
+known to application side, it must be reserved
+
+Upstream-Status: Pending (not yet submitted to upstream)
+Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
+
+diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+index 78f309c3aa..dc82d5bd87 100644
+--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
++++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+@@ -62,6 +62,9 @@
+ 
+   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ 
++  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemoryBase
++  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemorySize
++
+ [Guids]
+   gArmNeoverseN1SocPlatformInfoDescriptorGuid
+   gEfiHobListGuid          ## CONSUMES  ## SystemTable
+diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+index 8bb9407490..d8ad0f975c 100644
+--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
++++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+@@ -150,6 +150,19 @@ ArmPlatformGetVirtualMemoryMap (
+     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
+     EFI_RESOURCE_ATTRIBUTE_TESTED;
+ 
++  // Reserved OP-TEE region
++  BuildResourceDescriptorHob (
++      EFI_RESOURCE_SYSTEM_MEMORY,
++      ResourceAttributes,
++      PcdGet64 (PcdOpteeMemoryBase),
++      PcdGet64 (PcdOpteeMemorySize)
++    );
++  BuildMemoryAllocationHob (
++    PcdGet64 (PcdOpteeMemoryBase),
++    PcdGet64 (PcdOpteeMemorySize),
++    EfiReservedMemoryType
++  );
++
+   BuildResourceDescriptorHob (
+     EFI_RESOURCE_SYSTEM_MEMORY,
+     ResourceAttributes,
+diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+index 9e257ebde0..b400b94fd5 100644
+--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
++++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+@@ -86,5 +86,9 @@
+   gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050
+   gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
+ 
++  # Base Address of OP-TEE
++  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemoryBase|0xDE000000|UINT64|0x00000052
++  gArmNeoverseN1SocTokenSpaceGuid.PcdOpteeMemorySize|0x02000000|UINT64|0x00000053
++
+ [Ppis]
+   gNtFwConfigDtInfoPpiGuid =  { 0xb50dee0e, 0x577f, 0x47fb, { 0x83, 0xd0, 0x41, 0x78, 0x61, 0x8b, 0x33, 0x8a } }