commit | b13762bff0d6b44b4d39b77be27ddfd56c99878e | [log] [tgz] |
---|---|---|
author | Andrew Geissler <openbmcbump-github@yahoo.com> | Fri Feb 10 13:30:27 2023 -0600 |
committer | Andrew Geissler <openbmcbump-github@yahoo.com> | Fri Feb 10 13:30:27 2023 -0600 |
tree | b565c62d63cf47e38b22f9f928d73e91b934cd50 | |
parent | d57ca9cb0b217e4ea0bca157e9fadd207500f75e [diff] |
phosphor-dbus-interfaces: srcrev bump b013c5f869..0b2cbd32d9 Thang Tran (1): Power.Cap: add properties to control Power Limit Change-Id: Id77b665bcadb0ef79efb1f1239fd66dd8b4f64dc Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
diff --git a/meta-phosphor/recipes-phosphor/dbus/phosphor-dbus-interfaces_git.bb b/meta-phosphor/recipes-phosphor/dbus/phosphor-dbus-interfaces_git.bb index b2513a9..3bad50c 100644 --- a/meta-phosphor/recipes-phosphor/dbus/phosphor-dbus-interfaces_git.bb +++ b/meta-phosphor/recipes-phosphor/dbus/phosphor-dbus-interfaces_git.bb
@@ -7,7 +7,7 @@ sdbusplus \ systemd \ " -SRCREV = "b013c5f8691cc57d5e097c1398bd528cef8d5f4b" +SRCREV = "0b2cbd32d98bde0d88ffe98b64abb1446439cdc4" PV = "1.0+git${SRCPV}" PR = "r1"