commit | f1ade61b5994799a4cffca0c124b2ed36e640cbf | [log] [tgz] |
---|---|---|
author | Joel Stanley <joel@jms.id.au> | Tue Aug 28 11:09:10 2018 -0700 |
committer | Brad Bishop <bradleyb@fuzziesquirrel.com> | Tue Sep 04 15:39:10 2018 -0400 |
tree | a3b8ffe2a1d14071fa9131433e9cbfada5260ebe | |
parent | cb7651db75f7d9614e18de0260fc4c96e3a6cefa [diff] |
linux: Move to 4.18 based tree This rebases the OpenBMC kernel tree on a 4.18 base. There are 85 patches backported from 4.19-rc1, and the following 39 out of tree patches: Alexander Amelkin (1): mtd: spi-nor: fix options for mx66l51235f Andrew Jeffery (8): ARM: dts: aspeed: witherspoon: Update max31785 node dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation pmbus (max31785): Add support for devicetree configuration pmbus (core): One-shot retries for failure to set page pmbus (core): Use driver callbacks in pmbus_get_fan_rate() pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers soc: aspeed: Miscellaneous control interfaces ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers Benjamin Herrenschmidt (4): ARM: dts: aspeed: Romulus system can use coprocessor for FSI ARM: dts: aspeed: Palmetto system can use coprocessor for FSI ARM: dts: aspeed: Add Power8 CFAM description for use by Palmetto ARM: dts: aspeed: Add Power9 CFAM description Brad Bishop (1): ARM: configs: Remove atags from Aspeed G4 config Christopher Bostic (1): iio: dps310: Temperature measurement errata Cyril Bur (1): misc: Add ASPEED mbox driver Cédric Le Goater (6): mtd: spi-nor: aspeed: use command mode for reads mtd: spi-nor: aspeed: add support for SPI dual IO read mode mtd: spi-nor: aspeed: link controller with the ahb clock mtd: spi-nor: aspeed: optimize read mode mtd: spi-nor: aspeed: limit the maximum SPI frequency ARM: dts: aspeed: Add "spi-max-frequency" property Edward A. James (2): drivers/fsi: Add On-Chip Controller (OCC) driver hwmon: Add On-Chip Controller (OCC) hwmon driver Joel Stanley (15): ARM: dts: aspeed-palmetto: Add LPC control node ARM: dts: aspeed-palmetto: Add i2c OCC hwmon node ARM: dts: aspeed-ast2500: Update flash layout ARM: dts: aspeed: Add LPC mailbox node ARM: dts: aspeed: Enable mbox iio: Add driver for Infineon DPS310 ARM: dts: aspeed-g4: Expose SuperIO scratch registers ARM: dts: aspeed-g5: Add resets and clocks to GFX node ARM: dts: aspeed: Enable the GFX IP ARM: dts: aspeed: Enable VHUB on Romulus drm: Add ASPEED GFX driver drm: aspeed: Debugfs interface for GFX registers dt-bindings: gpu: Add ASPEED GFX bindings document ARM: config: aspeed: Add out of tree drivers ARM: dts: Add OCC description to Power9 dtsi (From meta-aspeed rev: 2f1187b1bff8d52ddd93f2c5b598eec7ddc9f4f6) Change-Id: I4035abcdcfa9a083599e27661fed5351fc6532fd Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
The OpenBMC project can be described as a Linux distribution for embedded devices that have a BMC; typically, but not limited to, things like servers, top of rack switches or RAID appliances. The OpenBMC stack uses technologies such as Yocto, OpenEmbedded, systemd, and D-Bus to allow easy customization for your server platform.
sudo apt-get install -y git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat
sudo dnf install -y git patch diffstat texinfo chrpath SDL-devel bitbake sudo dnf groupinstall "C Development Tools and Libraries"
git clone git@github.com:openbmc/openbmc.git cd openbmc
Any build requires an environment variable known as TEMPLATECONF
to be set to a hardware target. You can see all of the known targets with find meta-* -name local.conf.sample
. Choose the hardware target and then move to the next step. Additional examples can be found in the OpenBMC Cheatsheet
Machine | TEMPLATECONF |
---|---|
Palmetto | meta-ibm/meta-palmetto/conf |
Zaius | meta-ingrasys/meta-zaius/conf |
Witherspoon | meta-ibm/meta-witherspoon/conf |
As an example target Palmetto
export TEMPLATECONF=meta-ibm/meta-palmetto/conf
. openbmc-env bitbake obmc-phosphor-image
Additional details can be found in the docs repository.
Commits submitted by members of the OpenBMC GitHub community are compiled and tested via our Jenkins server. Commits are run through two levels of testing. At the repository level the makefile make check
directive is run. At the system level, the commit is built into a firmware image and run with an arm-softmmu QEMU model against a barrage of CI tests.
Commits submitted by non-members do not automatically proceed through CI testing. After visual inspection of the commit, a CI run can be manually performed by the reviewer.
Automated testing against the QEMU model along with supported systems are performed. The OpenBMC project uses the Robot Framework for all automation. Our complete test repository can be found here.
Support of additional hardware and software packages is always welcome. Please follow the contributing guidelines when making a submission. It is expected that contributions contain test cases.
Issues are managed on GitHub. It is recommended you search through the issues before opening a new one.
Feature List
Features In Progress
Features Requested but need help
Dive deeper in to OpenBMC by opening the docs repository.