u-boot-nuvoton: bump srcrev 78bb108e...eade1250
Jim Liu (4):
clk: npcm7xx: fix bug for calculate pll clock
pinctrl: npcm: add reset type detect
npcm8xx: fix reset reason issue for bootup
npcm8xx: Add PORST detect and remove workaround
Joseph Liu (1):
dts: nuvoton-npcm845: eanble ftpm and optee support
Judy Wang (1):
drivers:optee:rpmb: initialize drivers of mmc devices in UCLASS_BLK for rpmb access
Marvin Lin (2):
dts: nuvoton-npcm845: enable RMII1 pins
board: nuvoton: arbel: Correct CONFIG_SYS_MEM_TOP_HIDE value
Stanley Chu (19):
npcm_otp: correct the return value of fuse read
npcm845-evb: configure rgmii2 phy voltage by dts
npcm845-evb: set spix frequency to 50MHz
dts: nuvoton-npcm845: set default uart clock rate
dts: npcm8xx: add fm0 pinctrl
misc: npcm_host_intf: change initialization sequence
spi: npcm_fiu: do not change fiu clock
clk: nuvoton: npcm8xx: set ahb/apb/fiu clock divider as read-only
Revert "npcm845-evb: set spix frequency to 50MHz"
spi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hz
npcm845-evb: support TPM spi device
arbel: add CONFIG_EXT_TPM2_SPI for external tpm2 device
phy: add dt-bindig for npcm usb phy
npcm8xx: support 4Gb ram
gpio: npcm: set output state before enabling the output
spi: npcm_pspi: update dts and debug log
npcm_otp: read fuse bytes with byte offset
arbel: update configs
npcm8xx: add A2 CPU version
Tim Lee (3):
tools: env: use /run to store lockfile
drivers: spi: fix compiler warnings from npcm_fiu_spi_probe
configs: arbel: enable CONFIG_SPI_FLASH_GOOGLE
Tyrone Ting (1):
dts: nuvoton-npcm845: enable FIU3 voltage configuration
Change-Id: I178cfe008b962a48ff1a6b3eb8a0c80d1f0fd34a
Signed-off-by: Brian Ma <chma0@nuvoton.com>
diff --git a/meta-nuvoton/recipes-bsp/u-boot/u-boot-common-nuvoton.inc b/meta-nuvoton/recipes-bsp/u-boot/u-boot-common-nuvoton.inc
index 1a9eee4..226a934 100644
--- a/meta-nuvoton/recipes-bsp/u-boot/u-boot-common-nuvoton.inc
+++ b/meta-nuvoton/recipes-bsp/u-boot/u-boot-common-nuvoton.inc
@@ -7,7 +7,7 @@
UBRANCH = "npcm-v2021.04"
SRC_URI = "git://github.com/Nuvoton-Israel/u-boot.git;branch=${UBRANCH};protocol=https"
-SRCREV = "78bb108e000987cb6d6004a3e2164fdec07bb308"
+SRCREV = "eade12503eebb561f334b730a8068f2420f7f1eb"
S = "${WORKDIR}/git"