diff --git a/include/InternalMode.h b/include/InternalMode.h
new file mode 100644
index 0000000..1a75b91
--- /dev/null
+++ b/include/InternalMode.h
@@ -0,0 +1,26 @@
+#include "regs-video.h"
+
+INTERNAL_MODE Internal_Mode[] = {
+// 1024x768
+  {1024, 768, 0, 65.000},
+  {1024, 768, 1, 65.000},
+  {1024, 768, 2, 75.000},
+  {1024, 768, 3, 78.750},
+  {1024, 768, 4, 94.500},
+// 1280x1024
+  {1280, 1024, 0, 108.000},
+  {1280, 1024, 1, 108.000},
+  {1280, 1024, 2, 135.000},
+  {1280, 1024, 3, 157.500},      
+// 1600x1200
+  {1600, 1200, 0, 162.000},
+  {1600, 1200, 1, 162.000},
+  {1600, 1200, 2, 175.500},
+  {1600, 1200, 3, 189.000},
+  {1600, 1200, 4, 202.500},
+  {1600, 1200, 5, 229.500},
+// 1920x1200 reduce blank
+  {1920, 1200, 0, 157.000},
+  {1920, 1200, 1, 157.000},
+};
+uint16_t  InternalEnhanceModeNumberCount = sizeof (Internal_Mode) / sizeof (INTERNAL_MODE);
diff --git a/include/app_type.hpp b/include/app_type.hpp
new file mode 100644
index 0000000..e88d728
--- /dev/null
+++ b/include/app_type.hpp
@@ -0,0 +1,6 @@
+#pragma once
+
+#include <crow/app.h>
+#include <token_authorization_middleware.hpp>
+
+using BmcAppType = crow::App<crow::TokenAuthorizationMiddleware>;
\ No newline at end of file
diff --git a/include/ioaccess.h b/include/ioaccess.h
new file mode 100644
index 0000000..98bb63d
--- /dev/null
+++ b/include/ioaccess.h
@@ -0,0 +1,32 @@
+#define  IOCTL_IO_READ    0x1103
+#define  IOCTL_IO_WRITE   0x1104
+#define  IOCTL_REAL_IO_READ    0x1106
+#define  IOCTL_REAL_IO_WRITE   0x1107
+#define  IOCTL_BIT_STREAM_BASE 0x1108
+#define  IOCTL_TX_BIT_STREAM   0x1109
+#define  IOCTL_GET_SOCKET      0x1110
+#define  IOCTL_AUTOMODE_TRIGGER         0x1111
+#define  IOCTL_PASS3_TRIGGER   0x1112
+#define  IOCTL_I2C_READ        0x1113
+#define  IOCTL_I2C_WRITE       0x1114
+#define  IOCTL_FLAG_BUFFER_CLEAR       0x1115
+#define  IOCTL_REMAP      0x1105
+#define  RELOCATE_OFFSET  0x380
+
+typedef struct _IO_ACCESS_DATA {
+    unsigned char Type;
+    unsigned long Address;
+    unsigned long Data;
+    unsigned long Value;
+    unsigned long I2CValue;
+    int      kernel_socket;
+//    struct sockaddr_in address_svr;
+} IO_ACCESS_DATA, *PIO_ACCESS_DATA;
+/*
+typedef struct _MAP_DATA {
+    unsigned long virt_add;
+    unsigned long phys_add;
+    unsigned long size;
+    pgprot_t      prot;
+} MAP_DATA;
+*/
diff --git a/include/regs-video.h b/include/regs-video.h
new file mode 100644
index 0000000..379fa9c
--- /dev/null
+++ b/include/regs-video.h
@@ -0,0 +1,264 @@
+#pragma once
+
+
+#define PASS 0
+#define TRUE 0
+#define FALSE 1
+#define FAIL 1
+#define FIX 0
+#define STEP 1
+#define SEQ_ADDRESS_REGISTER 0x3C4
+#define SEQ_DATA_REGISTER 0x3C5
+#define CRTC_ADDRESS_REGISTER 0x3D4
+#define CRTC_DATA_REGISTER 0x3D5
+#define DAC_INDEX_REGISTER 0x3C8
+#define DAC_DATA_REGISTER 0x3C9
+
+#define VIDEOBASE_OFFSET 0x1E700000
+#define KEY_CONTROL 0x00 + VIDEOBASE_OFFSET
+#define VIDEOENGINE_SEQUENCE_CONTROL 0x04 + VIDEOBASE_OFFSET
+#define VIDEOENGINE_PASS1_CONTROL 0x08 + VIDEOBASE_OFFSET
+#define VIDEOENGINE_MODEDETECTIONSETTING_H 0x0C + VIDEOBASE_OFFSET
+#define VIDEOENGINE_MODEDETECTIONSETTING_V 0x10 + VIDEOBASE_OFFSET
+#define SCALE_FACTOR_REGISTER 0x14 + VIDEOBASE_OFFSET
+#define SCALING_FILTER_PARAMETERS_1 0x18 + VIDEOBASE_OFFSET
+#define SCALING_FILTER_PARAMETERS_2 0x1C + VIDEOBASE_OFFSET
+#define SCALING_FILTER_PARAMETERS_3 0x20 + VIDEOBASE_OFFSET
+#define SCALING_FILTER_PARAMETERS_4 0x24 + VIDEOBASE_OFFSET
+#define MODEDETECTION_STATUS_READBACK 0x98 + VIDEOBASE_OFFSET
+#define VIDEOPROCESSING_CONTROL 0x2C + VIDEOBASE_OFFSET
+#define VIDEO_CAPTURE_WINDOW_SETTING 0x30 + VIDEOBASE_OFFSET
+#define VIDEO_COMPRESS_WINDOW_SETTING 0x34 + VIDEOBASE_OFFSET
+#define VIDEO_COMPRESS_READ 0x3C + VIDEOBASE_OFFSET
+#define VIDEO_IN_BUFFER_BASEADDRESS 0x44 + VIDEOBASE_OFFSET
+#define VIDEO_IN_BUFFER_OFFSET 0x48 + VIDEOBASE_OFFSET
+#define VIDEOPROCESS_BUFFER_BASEADDRESS 0x4C + VIDEOBASE_OFFSET
+#define VIDEOCOMPRESS_SOURCE_BUFFER_BASEADDRESS 0x44 + VIDEOBASE_OFFSET
+#define VIDEOPROCESS_OFFSET 0x48 + VIDEOBASE_OFFSET
+#define VIDEOPROCESS_REFERENCE_BUFFER_BASEADDRESS 0x4C + VIDEOBASE_OFFSET
+#define FLAG_BUFFER_BASEADDRESS 0x50 + VIDEOBASE_OFFSET
+#define VIDEO_COMPRESS_DESTINATION_BASEADDRESS 0x54 + VIDEOBASE_OFFSET
+#define STREAM_BUFFER_SIZE_REGISTER 0x58 + VIDEOBASE_OFFSET
+#define VIDEO_CAPTURE_BOUND_REGISTER 0x5C + VIDEOBASE_OFFSET
+#define VIDEO_COMPRESS_CONTROL 0x60 + VIDEOBASE_OFFSET
+#define VIDEO_QUANTIZATION_TABLE_REGISTER 0x64 + VIDEOBASE_OFFSET
+#define BLOCK_SHARPNESS_DETECTION_CONTROL 0x6C + VIDEOBASE_OFFSET
+#define POST_WRITE_BUFFER_DRAM_THRESHOLD 0x68 + VIDEOBASE_OFFSET
+#define DETECTION_STATUS_REGISTER 0x98 + VIDEOBASE_OFFSET
+#define H_DETECTION_STATUS 0x90 + VIDEOBASE_OFFSET
+#define V_DETECTION_STATUS 0x94 + VIDEOBASE_OFFSET
+#define VIDEO_CONTROL_REGISTER 0x300 + VIDEOBASE_OFFSET
+#define VIDEO_INTERRUPT_CONTROL 0x304 + VIDEOBASE_OFFSET
+#define VIDEO_INTERRUPT_STATUS 0x308 + VIDEOBASE_OFFSET
+#define MODE_DETECTION_REGISTER 0x30C + VIDEOBASE_OFFSET
+
+#define FRONT_BOUND_REGISTER 0x310 + VIDEOBASE_OFFSET
+#define END_BOUND_REGISTER 0x314 + VIDEOBASE_OFFSET
+#define CRC_1_REGISTER 0x320 + VIDEOBASE_OFFSET
+#define CRC_2_REGISTER 0x324 + VIDEOBASE_OFFSET
+#define REDUCE_BIT_REGISTER 0x328 + VIDEOBASE_OFFSET
+#define BIOS_SCRATCH_REGISTER 0x34C + VIDEOBASE_OFFSET
+#define COMPRESS_DATA_COUNT_REGISTER 0x70 + VIDEOBASE_OFFSET
+#define COMPRESS_BLOCK_COUNT_REGISTER 0x74 + VIDEOBASE_OFFSET
+#define VIDEO_SCRATCH_REGISTER_34C 0x34C + VIDEOBASE_OFFSET
+#define VIDEO_SCRATCH_REGISTER_35C 0x35C + VIDEOBASE_OFFSET
+#define RC4KEYS_REGISTER 0x400 + VIDEOBASE_OFFSET
+#define VQHUFFMAN_TABLE_REGISTER 0x300 + VIDEOBASE_OFFSET
+
+//  Parameters
+#define SAMPLE_RATE 24000000.0
+#define MODEDETECTION_VERTICAL_STABLE_MAXIMUM 0x6
+#define MODEDETECTION_HORIZONTAL_STABLE_MAXIMUM 0x6
+#define MODEDETECTION_VERTICAL_STABLE_THRESHOLD 0x2
+#define MODEDETECTION_HORIZONTAL_STABLE_THRESHOLD 0x2
+#define HORIZONTAL_SCALING_FILTER_PARAMETERS_LOW 0xFFFFFFFF
+#define HORIZONTAL_SCALING_FILTER_PARAMETERS_HIGH 0xFFFFFFFF
+#define VIDEO_WRITE_BACK_BUFFER_THRESHOLD_LOW 0x08
+#define VIDEO_WRITE_BACK_BUFFER_THRESHOLD_HIGH 0x04
+#define VQ_Y_LEVELS 0x10
+#define VQ_UV_LEVELS 0x05
+#define EXTERNAL_VIDEO_HSYNC_POLARITY 0x01
+#define EXTERNAL_VIDEO_VSYNC_POLARITY 0x01
+#define VIDEO_SOURCE_FROM 0x01
+#define EXTERNAL_ANALOG_SOURCE 0x01
+#define USE_intERNAL_TIMING_GENERATOR 0x01
+#define WRITE_DATA_FORMAT 0x00
+#define SET_BCD_TO_WHOLE_FRAME 0x01
+#define ENABLE_VERTICAL_DOWN_SCALING 0x01
+#define BCD_TOLERENCE 0xFF
+#define BCD_START_BLOCK_XY 0x0
+#define BCD_END_BLOCK_XY 0x3FFF
+#define COLOR_DEPTH 16
+#define BLOCK_SHARPNESS_DETECTION_HIGH_THRESHOLD 0xFF
+#define BLOCK_SHARPNESS_DETECTION_LOE_THRESHOLD 0xFF
+#define BLOCK_SHARPNESS_DETECTION_HIGH_COUNTS_THRESHOLD 0x3F
+#define BLOCK_SHARPNESS_DETECTION_LOW_COUNTS_THRESHOLD 0x1F
+#define VQTABLE_AUTO_GENERATE_BY_HARDWARE 0x0
+#define VQTABLE_SELECTION 0x0
+#define JPEG_COMPRESS_ONLY 0x0
+#define DUAL_MODE_COMPRESS 0x1
+#define BSD_H_AND_V 0x0
+#define ENABLE_RC4_ENCRYPTION 0x1
+#define BSD_ENABLE_HIGH_THRESHOLD_CHECK 0x0
+#define VIDEO_PROCESS_AUTO_TRIGGER 0x0
+#define VIDEO_COMPRESS_AUTO_TRIGGER 0x0
+#define DIGITAL_SIGNAL 0x0
+#define ANALOG_SIGNAL 0x1
+
+/* AST_VIDEO_SCRATCH_35C	0x35C		Video Scratch Remap Read Back */
+#define SCRATCH_VGA_PWR_STS_HSYNC (1 << 31)
+#define SCRATCH_VGA_PWR_STS_VSYNC (1 << 30)
+#define SCRATCH_VGA_ATTRIBTE_INDEX_BIT5 (1 << 29)
+#define SCRATCH_VGA_MASK_REG (1 << 28)
+#define SCRATCH_VGA_CRT_RST (1 << 27)
+#define SCRATCH_VGA_SCREEN_OFF (1 << 26)
+#define SCRATCH_VGA_RESET (1 << 25)
+#define SCRATCH_VGA_ENABLE (1 << 24)
+
+typedef struct _VIDEO_MODE_INFO {
+  unsigned short X;
+  unsigned short Y;
+  unsigned short ColorDepth;
+  unsigned short RefreshRate;
+  unsigned char ModeIndex;
+} VIDEO_MODE_INFO, *PVIDEO_MODE_INFO;
+
+typedef struct _VQ_INFO {
+  unsigned char Y[16];
+  unsigned char U[32];
+  unsigned char V[32];
+  unsigned char NumberOfY;
+  unsigned char NumberOfUV;
+  unsigned char NumberOfInner;
+  unsigned char NumberOfOuter;
+} VQ_INFO, *PVQ_INFO;
+
+typedef struct _HUFFMAN_TABLE {
+  unsigned long HuffmanCode[32];
+} HUFFMAN_TABLE, *PHUFFMAN_TABLE;
+
+typedef struct _FRAME_HEADER {
+  unsigned long StartCode;   // 0
+  unsigned long FrameNumber; /// 4
+  unsigned short HSize;      // 8
+  unsigned short VSize;
+  unsigned long Reserved[2];         // 12 13 14
+  unsigned char DirectMode;          // 15
+  unsigned char CompressionMode;     // 15
+  unsigned char JPEGScaleFactor;     // 16
+  unsigned char Y_JPEGTableSelector; // 18 [[[[
+  unsigned char JPEGYUVTableMapping;
+  unsigned char SharpModeSelection;
+  unsigned char AdvanceTableSelector;
+  unsigned char AdvanceScaleFactor;
+  unsigned long NumberOfMB;
+  unsigned char VQ_YLevel;
+  unsigned char VQ_UVLevel;
+  VQ_INFO VQVectors;
+  unsigned char Mode420;
+  unsigned char Visual_Lossless;
+} FRAME_HEADER, *PFRAME_HEADER;
+
+typedef struct _INF_DATA {
+  unsigned char AST2500;
+  unsigned char Input_Signale; // 0: internel vga, 1, ext digital, 2, ext analog
+  unsigned char Trigger_Mode;  // 0: capture, 1, ext digital, 2, ext analog
+  unsigned char DownScalingEnable;
+  unsigned char DifferentialSetting;
+  unsigned short AnalogDifferentialThreshold;
+  unsigned short DigitalDifferentialThreshold;
+  unsigned char AutoMode;
+  unsigned char DirectMode; // 0: force sync mode 1: auto direct mode
+  unsigned short DelayControl;
+  unsigned char VQMode;
+  unsigned char JPEG_FILE;
+} INF_DATA, *PINF_DATA;
+
+typedef struct _COMPRESS_DATA {
+  unsigned long SourceFrameSize;
+  unsigned long CompressSize;
+  unsigned long HDebug;
+  unsigned long VDebug;
+} COMPRESS_DATA, *PCOMPRESS_DATA;
+
+// VIDEO Engine Info
+typedef struct _VIDEO_ENGINE_INFO {
+  INF_DATA INFData;
+  VIDEO_MODE_INFO SourceModeInfo;
+  VIDEO_MODE_INFO DestinationModeInfo;
+  VQ_INFO VQInfo;
+  FRAME_HEADER FrameHeader;
+  COMPRESS_DATA CompressData;
+  unsigned char ChipVersion;
+  unsigned char NoSignal;
+} VIDEO_ENGINE_INFO, *PVIDEO_ENGINE_INFO;
+
+typedef struct {
+  unsigned short HorizontalActive;
+  unsigned short VerticalActive;
+  unsigned short RefreshRate;
+  unsigned char ADCIndex1;
+  unsigned char ADCIndex2;
+  unsigned char ADCIndex3;
+  unsigned char ADCIndex5;
+  unsigned char ADCIndex6;
+  unsigned char ADCIndex7;
+  unsigned char ADCIndex8;
+  unsigned char ADCIndex9;
+  unsigned char ADCIndexA;
+  unsigned char ADCIndexF;
+  unsigned char ADCIndex15;
+  int HorizontalShift;
+  int VerticalShift;
+} ADC_MODE;
+
+typedef struct {
+  unsigned short HorizontalTotal;
+  unsigned short VerticalTotal;
+  unsigned short HorizontalActive;
+  unsigned short VerticalActive;
+  unsigned char RefreshRate;
+  double HorizontalFrequency;
+  unsigned short HSyncTime;
+  unsigned short HBackPorch;
+  unsigned short VSyncTime;
+  unsigned short VBackPorch;
+  unsigned short HLeftBorder;
+  unsigned short HRightBorder;
+  unsigned short VBottomBorder;
+  unsigned short VTopBorder;
+  ADC_MODE AdcMode;
+} VESA_MODE;
+
+
+
+typedef struct {
+  unsigned short HorizontalActive;
+  unsigned short VerticalActive;
+  unsigned short RefreshRateIndex;
+  double PixelClock;
+} INTERNAL_MODE;
+
+typedef struct _TRANSFER_HEADER {
+  unsigned long Data_Length;
+  unsigned long Blocks_Changed;
+  unsigned short User_Width;
+  unsigned short User_Height;
+  unsigned char Frist_frame;   // 1: first frame
+  unsigned char Compress_type; // 0:aspeed mode, 1:jpeg mode
+  unsigned char Trigger_mode;  // 0:capture, 1: compression, 2: buffer
+  unsigned char Data_format;   // 0:DCT, 1:DCTwVQ2 color, 2:DCTwVQ4 color
+  unsigned char RC4_Enable;
+  unsigned char RC4_Reset; // no use
+  unsigned char Y_Table;
+  unsigned char UV_Table;
+  unsigned char Mode_420;
+  unsigned char Direct_Mode;
+  unsigned char VQ_Mode;
+  unsigned char Disable_VGA;
+  unsigned char Differential_Enable;
+  unsigned char Auto_Mode;
+  unsigned char VGA_Status;
+  unsigned char RC4State;
+  unsigned char Advance_Table;
+} TRANSFER_HEADER, *PTRANSFER_HEADER;
diff --git a/include/ssl_key_handler.hpp b/include/ssl_key_handler.hpp
index 6e09cbe..d53c239 100644
--- a/include/ssl_key_handler.hpp
+++ b/include/ssl_key_handler.hpp
@@ -1,5 +1,7 @@
 #pragma once
 
+#include <random>
+
 #include <openssl/bio.h>
 #include <openssl/dh.h>
 #include <openssl/dsa.h>
@@ -22,7 +24,6 @@
 static EVP_PKEY *create_ec_key(void);
 static void handle_openssl_error(void);
 
-
 inline bool verify_openssl_key_cert(const std::string &filepath) {
   bool private_key_valid = false;
   bool cert_valid = false;
@@ -40,9 +41,9 @@
         case EVP_PKEY_RSA2: {
           LOG(DEBUG) << "Found an RSA key";
           RSA *rsa = EVP_PKEY_get1_RSA(pkey);
-          if (rsa){
+          if (rsa) {
             if (RSA_check_key(rsa) == 1) {
-              //private_key_valid = true;
+              // private_key_valid = true;
             } else {
               LOG(WARNING) << "Key not valid error number " << ERR_get_error();
             }
@@ -50,10 +51,10 @@
           }
           break;
         }
-        case EVP_PKEY_EC:{
+        case EVP_PKEY_EC: {
           LOG(DEBUG) << "Found an EC key";
-          EC_KEY* ec = EVP_PKEY_get1_EC_KEY(pkey);
-          if (ec){
+          EC_KEY *ec = EVP_PKEY_get1_EC_KEY(pkey);
+          if (ec) {
             if (EC_KEY_check_key(ec) == 1) {
               private_key_valid = true;
             } else {
@@ -70,14 +71,15 @@
 
       if (private_key_valid) {
         X509 *x509 = PEM_read_X509(file, NULL, NULL, NULL);
-        if (!x509){
+        if (!x509) {
           LOG(DEBUG) << "error getting x509 cert " << ERR_get_error();
         } else {
           rc = X509_verify(x509, pkey);
           if (rc == 1) {
             cert_valid = true;
           } else {
-             LOG(WARNING) << "Error in verifying private key signature " << ERR_get_error();
+            LOG(WARNING) << "Error in verifying private key signature "
+                         << ERR_get_error();
           }
         }
       }
@@ -94,64 +96,65 @@
   LOG(WARNING) << "Generating new keys";
   init_openssl();
 
-  //LOG(WARNING) << "Generating RSA key";
-  //EVP_PKEY *pRsaPrivKey = create_rsa_key();
+  // LOG(WARNING) << "Generating RSA key";
+  // EVP_PKEY *pRsaPrivKey = create_rsa_key();
 
   LOG(WARNING) << "Generating EC key";
   EVP_PKEY *pRsaPrivKey = create_ec_key();
+  if (pRsaPrivKey) {
+    LOG(WARNING) << "Generating x509 Certificate";
+    // Use this code to directly generate a certificate
+    X509 *x509;
+    x509 = X509_new();
+    if (x509) {
+      // Get a random number from the RNG for the certificate serial number
+      // If this is not random, regenerating certs throws broswer errors
+      std::random_device rd;
+      int serial = rd();
 
-  LOG(WARNING) << "Generating x509 Certificate";
-  // Use this code to directly generate a certificate
-  X509 *x509;
-  x509 = X509_new();
-  if (x509) {
+      ASN1_INTEGER_set(X509_get_serialNumber(x509), serial);
 
-    // Get a random number from the RNG for the certificate serial number
-    // If this is not random, regenerating certs throws broswer errors
-    std::random_device rd;
-    int serial = rd();
+      // not before this moment
+      X509_gmtime_adj(X509_get_notBefore(x509), 0);
+      // Cert is valid for 10 years
+      X509_gmtime_adj(X509_get_notAfter(x509), 60L * 60L * 24L * 365L * 10L);
 
-    ASN1_INTEGER_set(X509_get_serialNumber(x509), serial);
+      // set the public key to the key we just generated
+      X509_set_pubkey(x509, pRsaPrivKey);
 
-    // not before this moment
-    X509_gmtime_adj(X509_get_notBefore(x509), 0);
-    // Cert is valid for 10 years
-    X509_gmtime_adj(X509_get_notAfter(x509), 60L * 60L * 24L * 365L * 10L);
+      // Get the subject name
+      X509_NAME *name;
+      name = X509_get_subject_name(x509);
 
-    // set the public key to the key we just generated
-    X509_set_pubkey(x509, pRsaPrivKey);
+      X509_NAME_add_entry_by_txt(name, "C", MBSTRING_ASC, (unsigned char *)"US",
+                                -1, -1, 0);
+      X509_NAME_add_entry_by_txt(name, "O", MBSTRING_ASC,
+                                (unsigned char *)"Intel BMC", -1, -1, 0);
+      X509_NAME_add_entry_by_txt(name, "CN", MBSTRING_ASC,
+                                (unsigned char *)"testhost", -1, -1, 0);
+      // set the CSR options
+      X509_set_issuer_name(x509, name);
 
-    // Get the subject name
-    X509_NAME *name;
-    name = X509_get_subject_name(x509);
+      // Sign the certificate with our private key
+      X509_sign(x509, pRsaPrivKey, EVP_sha256());
 
-    X509_NAME_add_entry_by_txt(name, "C", MBSTRING_ASC, (unsigned char *)"US", -1, -1, 0);
-    X509_NAME_add_entry_by_txt(name, "O", MBSTRING_ASC, (unsigned char *)"Intel BMC", -1, -1, 0);
-    X509_NAME_add_entry_by_txt(name, "CN", MBSTRING_ASC, (unsigned char *)"testhost", -1, -1, 0);
-    // set the CSR options
-    X509_set_issuer_name(x509, name);
+      pFile = fopen(filepath.c_str(), "wt");
 
-    // Sign the certificate with our private key
-    X509_sign(x509, pRsaPrivKey, EVP_sha256());
+      if (pFile) {
+        PEM_write_PrivateKey(pFile, pRsaPrivKey, NULL, NULL, 0, 0, NULL);
 
-    pFile = fopen(filepath.c_str(), "wt");
+        PEM_write_X509(pFile, x509);
+        fclose(pFile);
+        pFile = NULL;
+      }
 
-    if (pFile) {
-      PEM_write_PrivateKey(pFile, pRsaPrivKey, NULL, NULL, 0, 0, NULL);
-      
-      PEM_write_X509(pFile, x509);
-      fclose(pFile);
-      pFile = NULL;
+      X509_free(x509);
     }
 
-    X509_free(x509);
-  }
-
-  if (pRsaPrivKey) {
     EVP_PKEY_free(pRsaPrivKey);
     pRsaPrivKey = NULL;
   }
-  
+
   // cleanup_openssl();
 }
 
@@ -183,35 +186,27 @@
 }
 
 EVP_PKEY *create_ec_key(void) {
-  EC_KEY *myecc = NULL;
   EVP_PKEY *pKey = NULL;
   int eccgrp = 0;
   eccgrp = OBJ_txt2nid("prime256v1");
 
-  // TODO handle errors
-  myecc = EC_KEY_new_by_curve_name(eccgrp);
-  EC_KEY_set_asn1_flag(myecc, OPENSSL_EC_NAMED_CURVE);
-  EC_KEY_generate_key(myecc);
-  pKey = EVP_PKEY_new();
-
-  if (myecc && pKey && EVP_PKEY_assign_EC_KEY(pKey, myecc)) {
-    /* pKey owns pRSA from now */
-    if (EC_KEY_check_key(myecc) <= 0) {
-      fprintf(stderr, "EC_check_key failed.\n");
-      handle_openssl_error();
-      EVP_PKEY_free(pKey);
-      pKey = NULL;
-    }
-  } else {
-    handle_openssl_error();
-    if (myecc) {
-      EC_KEY_free(myecc);
-      myecc = NULL;
-    }
+  EC_KEY *myecc = EC_KEY_new_by_curve_name(eccgrp);
+  if (myecc) {
+    EC_KEY_set_asn1_flag(myecc, OPENSSL_EC_NAMED_CURVE);
+    EC_KEY_generate_key(myecc);
+    EVP_PKEY *pKey = EVP_PKEY_new();
     if (pKey) {
+      if (EVP_PKEY_assign_EC_KEY(pKey, myecc)) {
+        /* pKey owns pRSA from now */
+        if (EC_KEY_check_key(myecc) <= 0) {
+          fprintf(stderr, "EC_check_key failed.\n");
+        }
+      }
       EVP_PKEY_free(pKey);
       pKey = NULL;
     }
+    EC_KEY_free(myecc);
+    myecc = NULL;
   }
   return pKey;
 }
@@ -237,25 +232,31 @@
   bool pem_file_valid = false;
 
   pem_file_valid = verify_openssl_key_cert(filepath);
-  
+
   if (!pem_file_valid) {
     LOG(WARNING) << "Error in verifying signature, regenerating";
     generate_ssl_certificate(filepath);
   }
 }
 
-
-boost::asio::ssl::context get_ssl_context(std::string ssl_pem_file){
+boost::asio::ssl::context get_ssl_context(std::string ssl_pem_file) {
   boost::asio::ssl::context m_ssl_context{boost::asio::ssl::context::sslv23};
-  m_ssl_context.set_options(boost::asio::ssl::context::default_workarounds | boost::asio::ssl::context::no_sslv2 | boost::asio::ssl::context::no_sslv3 |
-                            boost::asio::ssl::context::single_dh_use | boost::asio::ssl::context::no_tlsv1 | boost::asio::ssl::context::no_tlsv1_1);
+  m_ssl_context.set_options(boost::asio::ssl::context::default_workarounds |
+                            boost::asio::ssl::context::no_sslv2 |
+                            boost::asio::ssl::context::no_sslv3 |
+                            boost::asio::ssl::context::single_dh_use |
+                            boost::asio::ssl::context::no_tlsv1 |
+                            boost::asio::ssl::context::no_tlsv1_1);
 
   // m_ssl_context.set_verify_mode(boost::asio::ssl::verify_peer);
-  m_ssl_context.use_certificate_file(ssl_pem_file, boost::asio::ssl::context::pem);
-  m_ssl_context.use_private_key_file(ssl_pem_file, boost::asio::ssl::context::pem);
+  m_ssl_context.use_certificate_file(ssl_pem_file,
+                                     boost::asio::ssl::context::pem);
+  m_ssl_context.use_private_key_file(ssl_pem_file,
+                                     boost::asio::ssl::context::pem);
 
   // Set up EC curves to auto (boost asio doesn't have a method for this)
-  // There is a pull request to add this.  Once this is included in an asio drop, use the right way
+  // There is a pull request to add this.  Once this is included in an asio
+  // drop, use the right way
   // http://stackoverflow.com/questions/18929049/boost-asio-with-ecdsa-certificate-issue
   if (SSL_CTX_set_ecdh_auto(m_ssl_context.native_handle(), 1) != 1) {
     CROW_LOG_ERROR << "Error setting tmp ecdh list\n";
@@ -310,7 +311,8 @@
 
   std::string lighttp_ciphers = "AES128+EECDH:AES128+EDH:!aNULL:!eNULL";
 
-  if (SSL_CTX_set_cipher_list(m_ssl_context.native_handle(), ciphers.c_str()) != 1) {
+  if (SSL_CTX_set_cipher_list(m_ssl_context.native_handle(), ciphers.c_str()) !=
+      1) {
     CROW_LOG_ERROR << "Error setting cipher list\n";
   }
   return m_ssl_context;
diff --git a/include/vesa.hpp b/include/vesa.hpp
new file mode 100644
index 0000000..a9de246
--- /dev/null
+++ b/include/vesa.hpp
@@ -0,0 +1,59 @@
+//  Note: Modified for modes which have border issue
+
+std::array<VESA_MODE, 38> ModeTable{
+    {////////////////////////// 60Hz mode
+     // 720x480 done
+     {1056, 497, 720, 480, 60, 29.900, 88, 104, 3, 13, 0, 0, 0, 0, {720,480,60,	0x41,	0xF0,	0x48,	0x05,	0x20,	0x58,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	2}},
+     // 848x480 done
+     {1064, 517, 848, 480, 60, 31.160, 88, 91, 3, 26, 0, 0, 0, 0, {848,480,60,	0x42,	0x70,	0x48,	0x05,	0x20,	0x58,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	2}},
+     {800, 525, 640, 480, 60, 31.469, 96, 40, 2, 25, 8, 8, 8, 8, {640,480,60,	0x31,	0xF0,	0x48,	0x05,	0x20,	0x60,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	2}},
+     // 720x576
+     {912, 597, 720, 576, 60, 35.920, 72, 88, 3, 17, 0, 0, 0, 0, {720,576,60,	0x38,	0xF0,	0x48,	0x05,	0x20,	0x48,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	2}},
+     // 960x600 GTF done
+     {1232, 622, 960, 600, 60, 37.320, 96, 136, 3, 18, 0, 0, 0, 0, {960,600,60,	0x4C,	0xF0,	0x60,	0x05,	0x20,	0x60,	0x60,	0x60,	0x60,	0x5E,	0xFE,   -1,	0}},
+     {1056, 628, 800, 600, 60, 37.879, 128, 88, 4, 23, 0, 0, 0, 0, {800,600,60,	0x41,	0xF0,	0x60,	0x05,	0x20,	0x80,	0x60,	0x60,	0x60,	0x5E,	0xFE,   -1,	0}},
+     // 1088x612 GTF done
+     {1392, 634, 1088, 612, 60, 38.04, 112, 152, 3, 18, 0, 0, 0, 0, {1088,612,60,   0x56,   0xF0,   0x60,   0x05,   0x20,   0x70,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     // 1280x720 GTF done
+     {1664, 746, 1280, 720, 60, 44.760, 136, 192, 3, 22, 0, 0, 0, 0, {1280,720,60,   0x67,   0xF0,   0xA8,   0x05,   0x20,   0x88,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     // 1360x768 GTF done
+     {1776, 795, 1360, 768, 60, 47.700, 144, 208, 3, 23, 0, 0, 0, 0, {1360,768,60,   0x6E,   0xF0,   0xA8,   0x05,   0x20,   0x90,   0x60,   0x60,   0x60,   0x5E,   0xFE,    7, 1}},
+     // 1280x768 done
+     {1664, 798, 1280, 768, 60, 47.700, 128, 184, 7, 20, 0, 0, 0, 0, {1280,768,60,   0x67,   0xF0,   0xA8,   0x05,   0x20,   0x80,   0x60,   0x60,   0x60,   0x5E,   0xFE,    7, 1}},
+     {1344, 806, 1024, 768, 60, 48.363, 136, 160, 6, 29, 0, 0, 0, 0, {1024,768,60,	0x53,	0xF0,	0xA8,	0x05,	0x20,	0x88,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	7}},
+     // 1280x800 GTF done
+     {1680, 828, 1280, 800, 60, 49.680, 136, 200, 3, 24, 0, 0, 0, 0, {1280,800,60,   0x68,   0xF0,   0xA8,   0x05,   0x20,   0x88,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     // 1152x864 GTF done
+     {1520, 895, 1152, 864, 60, 53.700, 120, 184, 3, 27, 0, 0, 0, 0, {1152,864,60,   0x5E,   0xF0,   0xA8,   0x05,   0x20,   0x78,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     // 1600x900 GTF done
+     {2128, 932, 1600, 900, 60, 55.920, 168, 264, 3, 28, 0, 0, 0, 0, {1600,900,60,   0x84,   0xF0,   0xA8,   0x05,   0x20,   0xA8,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     {1800, 1000, 1280, 960, 60, 60.000, 112, 312, 3, 36, 0, 0, 0, 0, {1280,960,60,   0x70,   0x70,   0xA8,   0x05,   0x20,   0x70,   0x60,   0x60,   0x60,   0x5E,   0xFE,   -1, 0}},
+     // 1600x1024 GTF done
+     {2144, 1060, 1600, 1024, 60, 63.600, 168, 272, 3, 32, 0, 0, 0, 0, {1600,1024,60,	0x85,	0xF0,	0xE8,	0x05,	0x20,	0xA8,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1688, 1066, 1280, 1024, 60, 63.981, 112, 248, 3, 38, 0, 0, 0, 0, {1280,1024,60,	0x69,	0x70,	0xA8,	0x05,	0x20,	0x70,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {2160, 1250, 1600, 1200, 60, 75.000, 192, 304, 3, 46, 0, 0, 0, 0, {1600,1200,60,	0x86,	0xF0,	0xE8,	0x05,	0x20,	0xC0,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     //////////////////////  Not 60Hz mode
+     {900, 449, 720, 400, 70, 31.469, 108, 45, 2, 25, 8, 8, 8, 8, {720,400,70,	0x38,	0x30,	0x48,	0x05,	0x20,	0x6C,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	1}},
+     {832, 520, 640, 480, 72, 37.861, 40, 120, 3, 20, 8, 8, 8, 8, {640,480,72,	0x33,	0xF0,	0x48,	0x05,	0x20,	0x28,	0x60,	0x60,	0x60,	0x5E,	0xFE,	 6,	3}},
+     {840, 500, 640, 480, 75, 37.500, 64, 120, 3, 16, 0, 0, 0, 0, {640,480,75,	0x34,	0x70,	0x48,	0x05,	0x20,	0x40,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	3}},
+     {832, 509, 640, 480, 85, 43.269, 56, 80, 3, 25, 0, 0, 0, 0, {640,480,85,	0x33,	0xF0,	0x48,	0x05,	0x20,	0x38,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	3}},
+     {1024, 625, 800, 600, 56, 35.156, 72, 128, 2, 22, 0, 0, 0, 0, {800,600,56,	0x3F,	0xF0,	0x60,	0x05,	0x20,	0x48,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1040, 666, 800, 600, 72, 48.077, 120, 64, 6, 23, 0, 0, 0, 0, {800,600,72,	0x40,	0xF0,	0x60,	0x05,	0x20,	0x78,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1056, 625, 800, 600, 75, 46.875, 80, 160, 3, 21, 0, 0, 0, 0, {800,600,75,	0x41,	0xF0,	0x60,	0x05,	0x20,	0x50,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1048, 631, 800, 600, 85, 53.674, 64, 152, 3, 27, 0, 0, 0, 0, {800,600,85,	0x41,	0x70,	0x60,	0x05,	0x20,	0x40,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1328, 806, 1024, 768, 70, 56.476, 136, 144, 6, 29, 0, 0, 0, 0, {1024,768,70,	0x52,	0xF0,	0xA8,	0x05,	0x20,	0x88,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	7}},
+     {1312, 800, 1024, 768, 75, 60.023, 96, 176, 3, 28, 0, 0, 0, 0, {1024,768,75,	0x51,	0xF0,	0xA8,	0x05,	0x20,	0x60,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	1}},
+     {1376, 808, 1024, 768, 85, 68.677, 96, 208, 3, 36, 0, 0, 0, 0, {1024,768,85,	0x55,	0xF0,	0xA8,	0x05,	0x20,	0x60,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	1}},
+     {1600, 900, 1152, 864, 75, 67.500, 128, 256, 3, 32, 0, 0, 0, 0, {1152,864,75,	0x63,	0xF0,	0xA8,	0x05,	0x20,	0x80,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1728, 1011, 1280, 960, 85, 85.938, 160, 224, 3, 47, 0, 0, 0, 0, {1280,960,85,	0x6B,	0xF0,	0xE8,	0x05,	0x20,	0xA0,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}},
+     {1688, 1066, 1280, 1024, 75, 79.976, 144, 248, 3, 38, 0, 0, 0, 0, {1280,1024,75,	0x69,	0x70,	0xE8,	0x05,	0x20,	0x90,	0x60,	0x60,	0x60,	0x5E,	0xFE,	-1,	0}}
+     // VESA modes below did not include any ADC values...  TODO< figure it out
+     //{1728, 1072, 1280, 1024, 85, 91.146, 160, 224, 3, 44, 0, 0, 0, 0},
+     //{2160, 1250, 1600, 1200, 65, 81.250, 192, 304, 3, 46, 0, 0, 0, 0},
+     //{2160, 1250, 1600, 1200, 70, 87.500, 192, 304, 3, 46, 0, 0, 0, 0},
+     //{2160, 1250, 1600, 1200, 75, 93.750, 192, 304, 3, 46, 0, 0, 0, 0},
+     //{2160, 1250, 1600, 1200, 85, 106.250, 192, 304, 3, 46, 0, 0, 0, 0},
+     //{2080, 1235, 1920, 1200, 60, 74.038, 32, 80, 6, 26, 0, 0, 0, 0}
+     }};
+
+	
\ No newline at end of file
diff --git a/include/video.h b/include/video.h
new file mode 100644
index 0000000..7662c9c
--- /dev/null
+++ b/include/video.h
@@ -0,0 +1,378 @@
+/*
+* The definition and structure for AST 2500 Video Capture Driver
+* Portions Copyright (C) 2015 Insyde Software Corp.
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms and conditions of the GNU General Public License,
+* version 2, as published by the Free Software Foundation.
+*
+* This program is distributed in the hope it will be useful, but WITHOUT
+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+* FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+* more details.
+*/
+
+#ifndef _VIDEO_H_
+#define _VIDEO_H_
+
+#define DEF_Y_TBL             4
+#define DEF_UV_TBL            (7 | 0x10)
+
+#define VIDEO_IOC_MAGIC       'i'
+#define VIDIOCMCAPTURE        _IOW(VIDEO_IOC_MAGIC,  1, struct video_mmap*)
+#define VIDIOCGFBUF           _IOR(VIDEO_IOC_MAGIC,  2, struct video_buffer*)
+#define VIDIOCCAPTURE         _IOW(VIDEO_IOC_MAGIC,  3, unsigned long )
+#define VIDIOCGCAPTURE        _IOR(VIDEO_IOC_MAGIC,  4, subcapture_info*)
+#define VIDIOCSCAPTURE        _IOW(VIDEO_IOC_MAGIC,  5, subcapture_info*)
+#define VIDIOCGSEQ            _IOR(VIDEO_IOC_MAGIC,  6, vseq_info*)
+#define VIDIOCSSEQ            _IOW(VIDEO_IOC_MAGIC,  7, vseq_info*)
+#define VIDIOCGVIN            _IOR(VIDEO_IOC_MAGIC,  8, vin_info*)
+#define VIDIOCSVIN            _IOW(VIDEO_IOC_MAGIC,  9, vin_info*)
+#define VIDIOCGPROC           _IOR(VIDEO_IOC_MAGIC, 10, vproc_info*)
+#define VIDIOCSPROC           _IOW(VIDEO_IOC_MAGIC, 11, vproc_info*)
+#define VIDIOCGCOMP           _IOR(VIDEO_IOC_MAGIC, 12, vcomp_info*)
+#define VIDIOCSCOMP           _IOW(VIDEO_IOC_MAGIC, 13, vcomp_info*)
+#define VIDIOCDBG             _IOR(VIDEO_IOC_MAGIC, 14, unsigned int*)
+#define VIDIOCIMGREFRESH      _IOW(VIDEO_IOC_MAGIC, 15, unsigned int*)
+
+#define VIDEO_IOC_MAXNR       15
+
+#define DUAL_COMP_BUFFER
+#define V_MASK
+
+#define AST2500_DEVICEID      0x25032402
+#define AST2400_DEVICEID      0x00002402
+
+// FLAG_FRAME_SIZE = (x/8) * (y/8) * 4
+// 144K:(1920/8)*(1200/8)*4 (current set 1M)
+#define FLAG_FRAME_SIZE       0x100000 // 1*1024*1024
+// PROC_FRAME_SIZE = X * Y * 4
+// 9M:1920*1200*4,  8M:1600*1200*4,  5M:1280*1024*4,  3M:1024*768*4
+#define PROC_FRAME_SIZE       0x900000 // 9*1024*1024
+// According to VREG(VR_STREAM_BUF_SZ) Video Stream Buffer Size Register
+// bit[2:0] = 7 (128KB), bit[4:3] = 3 (32 packets), So max compression data
+// will be 128KB * 32 = 4 MB,
+// 4M: (128*1024)*32
+#define COMP_FRAME_SIZE       0x400000 // 4*1024*1024
+// Total Video Mem Buffer Size
+// 2 PROC + 2 COMP + 1 FLAG for Capture Eng, 1 PROC + 1 COMP + 1 FLAG for Jpeg Capture Eng
+#define VIDEO_MEM_BUF_SIZE    0x2900000
+// Define Video Memory Start Address According to Memory & Kernel Size
+// Total:128M, 80M for Kernel
+#define SDRAM_MEM_OFFSET_ADDR 0x80000000
+
+#define SYS_MEM_SZ_128M       0
+#define SYS_MEM_SZ_256M       1
+#define SYS_MEM_SZ_512M       2
+#define SYS_MEM_SZ_1024M      3
+
+#define V_MEM_SZ_8M           0
+#define V_MEM_SZ_16M          1
+#define V_MEM_SZ_32M          2
+#define V_MEM_SZ_64M          3
+
+#define MODE_DETECT           0
+#define MODE_CHANGE           1
+#define MAX_NO_SYNC_CNT       100
+#define V_BUSY_TIME_OUT       6           //time tick
+
+// Register Offset
+#define SDRAM_PHY_BASE        0x1E6E0000  //1E6E:0000-1E6E:1FFF
+#define SCU_PHY_BASE          0x1E6E2000  //1E6E:2000-1E6E:2FFF
+#define VIDEO_PHY_BASE        0x1E700000  //1E70:0000-1E7F:FFFF
+
+// IRQ NUMBER
+#define VIDEO_IRQ             7           // for video
+#define CURSOR_IRQ            21          // for quick cursor
+
+// Register Definition
+#define VREG(x)               (*(volatile unsigned int *)(IO_ADDRESS(x + VIDEO_PHY_BASE)))
+#define SDRAMREG(x)           (*(volatile unsigned int *)(IO_ADDRESS(x + SDRAM_PHY_BASE)))
+#define SCUREG(x)             (*(volatile unsigned int *)(IO_ADDRESS(x + SCU_PHY_BASE)))
+
+// Register Protection Key
+#define SCU_UNLOCK_KEY        0x1688A8A8
+#define MCR_UNLOCK_KEY        0xFC600309
+#define VR_UNLOCK_KEY         0x1A038AA8
+
+// SDRAM Memory Controller Register Offset
+#define MCR_PROTECTION_KEY    0x000
+#define MCR_CONFIGURATION     0x004
+#define BACKWARD_SCU_MPLL     0x120
+
+// System Control Unit Register Offset
+#define SCU_PROTECTION_KEY    0x00
+#define SCU_SYSTEM_RESET_CTL  0x04
+#define SCU_CLOCK_SELECTION   0x08
+#define SCU_CLK_STOP_CTL      0x0C
+#define SCU_INTERRUPT_CTL     0x18
+#define SCU_MPLL_PARAMETER    0x20
+#define SCU_MISC1_CTL         0x2C
+#define SCU_SOC_SCRATCH1      0x40
+#define SCU_VGA_SCRATCH1      0x50
+#define SCU_VGA_SCRATCH2      0x54
+#define SCU_HW_STRAPPING      0x70
+#define SCU_SILICON_REV_ID    0x7C
+#define SCU_DEVICE_ID         0x1A4
+
+// Video Register Offset
+#define VR_PROTECT_KEY                0x000
+#define VIDEO_SEQ_CTL                 0x004
+#define VIDEO_PASS1_CTL               0x008
+#define TIMING_GEN_SETTING1           0x00C // if VIDEO_CTL1[5] = 0
+#define TIMING_GEN_SETTING2           0x010 // if VIDEO_CTL1[5] = 0
+#define SCALING_FACTOR                0x014
+#define SCALING_FILTER_PARAMETER0     0x018
+#define SCALING_FILTER_PARAMETER1     0x01C
+#define SCALING_FILTER_PARAMETER2     0x020
+#define SCALING_FILTER_PARAMETER3     0x024
+#define BCD_CTL                       0x02C
+#define CAPTURING_WINDOW_SETTING      0x030
+#define COMP_WINDOW_SETTING           0x034
+#define COMP_STREAM_BUF_PROC_OFFSET   0x038
+#define COMP_STREAM_BUF_READ_OFFSET   0x03C
+#define CRC_BUF_BASE_ADDR             0x040
+#define VIDEO_SOURCE_BUF1_BASE_ADDR   0x044
+#define SOURCE_BUF_SCANLINE_OFFSET    0x048
+#define VIDEO_SOURCE_BUF2_BASE_ADDR   0x04C
+#define BCD_FLAG_BUF_BASE_ADDR        0x050
+#define COMP_STREAM_BUF_BASE_ADDR     0x054
+#define VIDEO_STREAM_BUF_SIZE         0x058
+#define COMP_STREAM_BUF_WRITE_OFFSET  0x05C
+#define VIDEO_COMP_CTL                0x060
+#define JPEG_BIT_CTRL                 0x064
+#define QUANTIZATION_VALUE            0x068
+#define COPY_BUF_BASE_ADDR            0x06C
+#define COMP_STREAM_SIZE              0x070
+#define COMP_BLOCK_NUM                0x074
+#define COMP_STREAM_BUF_END_OFFSET    0x078
+#define COMP_FRAME_COUNTER            0x07C
+#define USER_HDR_PARAM                0x080
+#define SOURCE_L_R_EDGE_DETECT        0x090
+#define SOURCE_T_B_EDGE_DETECT        0x094
+#define MODE_DETECT_STATUS            0x098
+
+/* Video Management Engine, i.e. 2nd Set Video Engine */
+#define VM_SEQ_CTRL                   0x204
+#define VM_PASS_CTRL                  0x208
+#define VM_SCALING_FACTOR             0x214
+#define VM_CAP_WINDOW_SETTING         0x230
+#define VM_COMP_WINDOW_SETTING        0x234
+#define VM_COMP_BUF_PROC_OFFSET       0x238
+#define VM_COMP_BUF_READ_OFFSET       0x23C
+#define VM_JPEG_HEADER_BUFF           0x240
+#define VM_SOURCE_BUFF0               0x244
+#define VM_SRC_BUF_SCANLINE_OFFSET    0x248
+#define VM_COMPRESS_BUFF              0x254
+#define VM_STREAM_SIZE                0x258
+#define VM_COMPRESS_CTRL              0x260
+#define VM_JPEG_BIT_CTRL              0x264
+#define VM_QUANTIZATION_VALUE         0x268
+#define VM_COPY_BUF_BASE_ADDR         0x26C
+#define VM_COMP_STREAM_SIZE           0x070
+#define VM_COMP_BLOCK_NUM             0x074
+#define VM_COMP_STREAM_BUF_END_OFFSET 0x278
+#define VM_USER_HDR_PARAM             0x280
+
+#define VIDEO_PASS3_CTRL              0x300
+#define INTERRUPT_CTL                 0x304
+#define INTERRUPT_STATUS              0x308
+#define MODE_DETECT_PARAMETER         0x30C
+#define MEM_RESTRICT_START_ADDR       0x310
+#define MEM_RESTRICT_END_ADDR         0x314
+#define PRI_CRC_PARAMETER             0x320
+#define SEC_CRC_PARAMETER             0x324
+#define DATA_TRUNCATION               0x328
+#define VGA_SCRATCH_REMAP1            0x340
+#define VGA_SCRATCH_REMAP2            0x344
+#define VGA_SCRATCH_REMAP3            0x348
+#define VGA_SCRATCH_REMAP4            0x34C
+#define VGA_SCRATCH_REMAP5            0x350
+#define VGA_SCRATCH_REMAP6            0x354
+#define VGA_SCRATCH_REMAP7            0x358
+#define VGA_SCRATCH_REMAP8            0x35C
+#define RC4KEYS_REGISTER              0x400 //0x400~0x4FC  RC4 Encryption Key Register #0~#63
+
+//
+// Cursor struct is used in User Mode
+//
+typedef struct _cursor_attribution_tag {
+  unsigned int posX;
+  unsigned int posY;
+  unsigned int cur_width;
+  unsigned int cur_height;
+  unsigned int cur_type;      //0:mono 1:color 2:disappear cursor
+  unsigned int cur_change_flag;
+} AST_CUR_ATTRIBUTION_TAG;
+
+//
+// For storing Cursor Information
+//
+typedef struct _cursor_tag {
+  AST_CUR_ATTRIBUTION_TAG attr;
+  //unsigned char     icon[MAX_CUR_OFFSETX*MAX_CUR_OFFSETY*2];
+  unsigned char *icon;       //[64*64*2];
+} AST_CURSOR_TAG;
+
+//
+// For select image format, i.e. 422 JPG420, 444 JPG444, lumin/chrom table, 0 ~ 11, low to high
+//
+typedef struct _video_features {
+  short jpg_fmt;             //422:JPG420, 444:JPG444
+  short lumin_tbl;
+  short chrom_tbl;
+  short tolerance_noise;
+  int w;
+  int h;
+  unsigned char *buf;
+} FEATURES_TAG;
+
+//
+// For configure video engine control registers
+//
+typedef struct _image_info {
+  short do_image_refresh;    // Action 0:motion 1:fullframe 2:quick cursor
+  char qc_valid;             // quick cursor enable/disable
+  unsigned int len;
+  int crypttype;
+  char cryptkey[16];
+  union {
+    FEATURES_TAG features;
+    AST_CURSOR_TAG cursor_info;
+  } parameter;
+} IMAGE_INFO;
+
+typedef struct _video_set_chk {
+  short get_qc_info;         // Quick Cursor Info
+  short do_image_refresh;
+  FEATURES_TAG features;
+} video_set_chk;
+
+struct video_buffer {
+  void *base;
+  int height, width;
+  int depth;
+  int bytesperline;
+};
+
+//
+// Data Structure for Video Buffer Layout
+// kept information about video buffer layout, used in memory initialization.
+//
+typedef struct _buf_layout {
+  int c_proc;
+  int c_comp;
+  unsigned int in;           // video in buffer
+  unsigned int proc [2];     // old and current proc buffer
+  unsigned int comp [2];     // compressed data buffer
+  unsigned int flag;         // flag buffer
+  unsigned int jpgproc;       // old and current proc buffer for jpeg
+  unsigned int jpgcomp;       // compressed data buffer for jpeg
+  unsigned int jpgflag;       // flag buffer for jpeg
+} buf_layout;
+
+//
+// subcapture_info:
+// linestep - byte per line after scaling, but 32 byte align
+// step - scaling step, decrease 8 pixels a step after scaling.
+// scaled_h - height after scaling.
+// scaled_w - width after scaling.
+// hor_factor, ver_factor - horizontal and vertical scaling factor
+// init - initialized = 0, not initialized = 1, set by mode_detect
+//
+typedef struct _subcature_info {
+  int linestep;
+  short x, y, width, height, scaled_h, scaled_w;
+  unsigned short hor_factor, ver_factor;
+  short step, init;
+} subcapture_info;
+
+//
+// video_hw_info:
+// cap_seq - capture orders, CAP_PASSX and CAP_INIT_FRAME
+// cap_int - interrupt to enable
+// cur_idx - current idx of resolution table content.
+//
+// mode_change must be
+// set by interrupt handler, and clear
+// when capture start.
+//
+
+//FK Comment :
+//interrupt handler for mode_chage
+//capture start, mode_chage, clear
+//cur_idx resolution state, Ex: 800x600 80Hz, ...
+//cap_int interrupt enable
+//cap_seq captor orders i.e. CAP_PASS1, CAP_PASS2..., or CAP_INIT_FRAME
+#define MCAP_FRAME  2
+typedef struct _mcap_info {
+  int offset;
+  int size;
+} mcap_info;
+
+typedef struct _video_hw_info {
+  int cap_seq;
+  mcap_info mcap [MCAP_FRAME];       // record each frame size of mcapture
+  //volatile short width, height, fix_x, fix_y, cur_idx;
+  short width, height, fix_x, fix_y, cur_idx;
+  short max_h, max_w, min_h, min_w;
+  short cap_int;
+
+  char mode_changed;                 //1130 modify
+  //volatile char mode_changed;      //1130 modify
+  char cap_done, capturing, disconnect;  //, mode_changed; //, cur_idx;
+  char can_capture;                  // prevent hardware error.
+  subcapture_info subcap;
+//  VIDEO_ENGINE_INFO ve_info;
+} video_hw_info;
+
+struct video_mmap {
+  unsigned int frame; // Frame (0 - n) for double buffer
+  int height, width;
+  unsigned int format; // should be VIDEO_PALETTE_*
+};
+
+// Internal_Mode Table for resolution checking
+typedef struct {
+  unsigned short HorizontalActive;
+  unsigned short VerticalActive;
+  unsigned short RefreshRateIndex;
+  unsigned int PixelClock;
+} INTERNAL_MODE;
+
+INTERNAL_MODE Internal_Mode [] = {
+    // 1024x768
+    { 1024, 768, 0, 65 },
+    { 1024, 768, 1, 65 },
+    { 1024, 768, 2, 75 },
+    { 1024, 768, 3, 79 },
+    { 1024, 768, 4, 95 },
+
+    // 1280x1024
+    { 1280, 1024, 0, 108 },
+    { 1280, 1024, 1, 108 },
+    { 1280, 1024, 2, 135 },
+    { 1280, 1024, 3, 158 },
+
+    // 1600x1200
+    { 1600, 1200, 0, 162 },
+    { 1600, 1200, 1, 162 },
+    { 1600, 1200, 2, 176 },
+    { 1600, 1200, 3, 189 },
+    { 1600, 1200, 4, 203 },
+    { 1600, 1200, 5, 230 },
+
+    // 1920x1200 reduce blank
+    { 1920, 1200, 0, 157 },
+    { 1920, 1200, 1, 157 },
+};
+
+typedef enum vga_color_mode {
+  VGA_NO_SIGNAL = 0,
+  EGA_MODE,
+  VGA_MODE,
+  VGA_15BPP_MODE,
+  VGA_16BPP_MODE,
+  VGA_32BPP_MODE,
+} color_mode;
+#endif //_VIDEO_H_
diff --git a/include/webassets.hpp b/include/webassets.hpp
index b2bda68..924b1d5 100644
--- a/include/webassets.hpp
+++ b/include/webassets.hpp
@@ -6,12 +6,11 @@
 #include <crow/http_request.h>
 #include <crow/http_response.h>
 
-// TODO this is wrong.  file handler shouldn't care about middlewares
 #include <crow/routing.h>
-#include "token_authorization_middleware.hpp"
+#include <app_type.hpp>
 
 namespace crow {
 namespace webassets {
-void request_routes(crow::App<crow::TokenAuthorizationMiddleware>& app);
+void request_routes(BmcAppType& app);
 }
 }
\ No newline at end of file