designs: firmware_update_via_blobs: add configuration details
Add the details on how one has to configure a platform to use it.
Although these details are less about the design, they are becoming
relevant.
Change-Id: I11ee48dc768aa424fe6fb5886e030ee172a5c8de
Signed-off-by: Patrick Venture <venture@google.com>
diff --git a/designs/firmware_update_via_blobs.md b/designs/firmware_update_via_blobs.md
index d587d61..4ef91ef 100644
--- a/designs/firmware_update_via_blobs.md
+++ b/designs/firmware_update_via_blobs.md
@@ -425,3 +425,59 @@
A required functional test is one whereby an image is sent down to the BMC with
a valid signature. The expected result is that the verification step will return
success.
+
+## Configuration
+
+To use `phosphor-ipmi-flash` a platform must provide a configuration. A
+platform can configure multiple interfaces, such as both lpc and pci. However,
+a platform should only configure either static layout updates, or ubi. If
+enabling lpc, the platform must specify either aspeed or nuvoton.
+
+The following are the two primary configuration options, which control how the
+update is treated.
+
+Option | Meaning
+------------------------ | -------
+`--enable-static-layout` | Enable treating the update as a static layout update.
+`--enable-tarball-ubi` | Enable treating the update as a tarball for UBI update.
+
+The following are configuration options for how the host and BMC are meant to
+transfer the data. By default, the data-in-IPMI mechanism is enabled.
+
+There are two configurable data transport mechanisms, either staging the bytes
+via the LPC memory region, or the PCI-to-AHB memory region. Because there is
+only one `MAPPED_ADDRESS` variable at present, a platform should only configure
+one. The platform's device-tree may have the region locked to a specific
+driver (lpc-aspeed-ctrl), preventing the region from other use.
+
+***NOTE:*** It will likely be possible to configure both in the near future.
+
+Variable | Default | Meaning
+--------------------- | ------- | -------
+`MAPPED_ADDRESS` | 0 | The address used for mapping P2A or LPC into the BMC's memory-space.
+
+Option | Meaning
+--------------------- | -------
+`--enable-pci-bridge` | Enable the PCI-to-AHB transport option.
+`--enable-lpc-bridge` | Enable the LPC-to-AHB transport option.
+
+If a platform enables lpc as the transport mechanism, a specific vendor must be
+selected via the following configuration option. Currently, only two are
+supported.
+
+Option | Meaning
+---------------------- | -------
+`--enable-aspeed-lpc` | Use with ASPEED parts.
+`--enable-nuvoton-lpc` | Use with Nuvoton parts.
+
+### Internal Configuration Details
+
+The following variables can be set to whatever you wish, however they have
+usable default values.
+
+Variable | Default | Meaning
+---------------------------- | -------------------------- | -------------------------------------------------------------------------
+`STATIC_HANDLER_STAGED_NAME` | `/run/initramfs/bmc-image` | The filename where to write the staged firmware image for static updates.
+`TARBALL_STAGED_NAME` | `/tmp/image-update.tar` | The filename where to write the UBI update tarball.
+`HASH_FILENAME` | `/tmp/bmc.sig` | The file to use for the hash provided.
+