commit 441c7a86749b2331863b115e141033e735bd6ffc
author Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Fri Jul 26 11:32:49 2019 -0700
committer Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Fri Jul 26 11:38:21 2019 -0700
tree afd1e03e7890300490c0576589b7b85a688c51de
parent 08058c77648e8953c545cd232b3d3163f9770635

Fix BridgeGpio polarity of p3vbat adc sensor

Reviewed schematic and checked that the bridge gate control gpio's
polarity is active high so this commit fixes the setting.

Tested: Reading value of my WFT was 3.0483v. Worked correctly.

Change-Id: I1d2b86bbc6da7b7234e5dfebcfd8d1097234fd0c
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>

configurations/WFT Baseboard.json

diff --git a/configurations/WFT Baseboard.json b/configurations/WFT Baseboard.json
index a65dbe3..33404bb 100644
--- a/configurations/WFT Baseboard.json
+++ b/configurations/WFT Baseboard.json
@@ -196,7 +196,7 @@
             "BridgeGpio": [
                 {
                     "Name": "P3VBAT_BRIDGE_EN",
-                    "Polarity": "Low"
+                    "Polarity": "High"
                 }
             ],
             "Index": 7,