configurations: yosemite4: Unify sensor names to uppercase letters
Unify the fru name in the sensor name into uppercase letters
Change-Id: I5588c03f6d60816b6f5d7b6df8bd00f824ac3caa
Signed-off-by: Lora Lin <lora.lin.wiwynn@gmail.com>
diff --git a/configurations/yosemite4_sentineldome_t1.json b/configurations/yosemite4_sentineldome_t1.json
index 21b93eb..87ec79a 100644
--- a/configurations/yosemite4_sentineldome_t1.json
+++ b/configurations/yosemite4_sentineldome_t1.json
@@ -11,16 +11,16 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "PID_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -47,7 +47,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "PID_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -74,7 +74,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -101,11 +101,11 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "PID_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -125,8 +125,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
],
"Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
"NegativeHysteresis": 0,
@@ -146,7 +146,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
+ "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
],
"Name": "Stepwise_MB_FIO_Slot $bus % 15",
"NegativeHysteresis": 1,
@@ -204,16 +204,16 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "Stepwise_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -243,7 +243,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "Stepwise_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -279,7 +279,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -309,11 +309,11 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "Stepwise_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3,
diff --git a/configurations/yosemite4_sentineldome_t1_retimer.json b/configurations/yosemite4_sentineldome_t1_retimer.json
index 2ee102d..ff436d4 100644
--- a/configurations/yosemite4_sentineldome_t1_retimer.json
+++ b/configurations/yosemite4_sentineldome_t1_retimer.json
@@ -10,7 +10,7 @@
"ILimitMax": 100,
"ILimitMin": -50,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_X8_RETIMER_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C"
],
"Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -37,16 +37,16 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "PID_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -73,7 +73,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "PID_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -100,7 +100,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -127,11 +127,11 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "PID_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -151,8 +151,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
],
"Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
"NegativeHysteresis": 0,
@@ -172,7 +172,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_X8_RETIMER_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C"
],
"Name": "Stepwise_MB_RETIMER_TEMP_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -206,7 +206,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
+ "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
],
"Name": "Stepwise_MB_FIO_Slot $bus % 15",
"NegativeHysteresis": 1,
@@ -264,16 +264,16 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "Stepwise_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -303,7 +303,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "Stepwise_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -339,7 +339,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -369,11 +369,11 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "Stepwise_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3,
diff --git a/configurations/yosemite4_sentineldome_t2.json b/configurations/yosemite4_sentineldome_t2.json
index 2244d36..d7cc83f 100644
--- a/configurations/yosemite4_sentineldome_t2.json
+++ b/configurations/yosemite4_sentineldome_t2.json
@@ -11,18 +11,18 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C"
],
"Name": "PID_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -49,7 +49,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "PID_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -76,7 +76,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -103,7 +103,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
],
"Name": "PID_MB_SSD_DATA_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -130,11 +130,11 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "PID_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -154,8 +154,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
],
"Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
"NegativeHysteresis": 0,
@@ -175,7 +175,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
+ "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
],
"Name": "Stepwise_MB_FIO_Slot $bus % 15",
"NegativeHysteresis": 1,
@@ -233,18 +233,18 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C"
],
"Name": "Stepwise_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -274,7 +274,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "Stepwise_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -310,7 +310,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -340,7 +340,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
],
"Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -370,11 +370,11 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "Stepwise_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3,
diff --git a/configurations/yosemite4_sentineldome_t2_retimer.json b/configurations/yosemite4_sentineldome_t2_retimer.json
index 75bae2c..7a3d54e 100644
--- a/configurations/yosemite4_sentineldome_t2_retimer.json
+++ b/configurations/yosemite4_sentineldome_t2_retimer.json
@@ -10,7 +10,7 @@
"ILimitMax": 100,
"ILimitMin": -50,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_X8_RETIMER_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C"
],
"Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -37,18 +37,18 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C"
],
"Name": "PID_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -75,7 +75,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "PID_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -102,7 +102,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -129,7 +129,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
],
"Name": "PID_MB_SSD_DATA_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -156,11 +156,11 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "PID_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -180,8 +180,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
],
"Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
"NegativeHysteresis": 0,
@@ -201,7 +201,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_X8_RETIMER_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C"
],
"Name": "Stepwise_MB_RETIMER_TEMP_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -235,7 +235,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
+ "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
],
"Name": "Stepwise_MB_FIO_Slot $bus % 15",
"NegativeHysteresis": 1,
@@ -293,18 +293,18 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C"
],
"Name": "Stepwise_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -334,7 +334,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "Stepwise_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -370,7 +370,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -400,7 +400,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
],
"Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -430,11 +430,11 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "Stepwise_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3,
diff --git a/configurations/yosemite4_wailuafalls.json b/configurations/yosemite4_wailuafalls.json
index 0c1045b..b345e29 100644
--- a/configurations/yosemite4_wailuafalls.json
+++ b/configurations/yosemite4_wailuafalls.json
@@ -11,14 +11,14 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V8_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_CD_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V85_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_AB_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V8_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_CD_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V85_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_AB_ASIC2_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V8_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_CD_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V85_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_AB_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V8_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_CD_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V85_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_AB_ASIC2_TEMP_C"
],
"Name": "PID_WF_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -45,14 +45,14 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_A_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_B_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_C_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_D_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_A_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_B_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_C_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_D_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_A_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_B_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_C_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_D_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_A_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_B_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_C_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_D_TEMP_C"
],
"Name": "PID_WF_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -79,7 +79,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_E1S_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_E1S_TEMP_C"
],
"Name": "PID_WF_E1S_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -106,8 +106,8 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_CXL1_CNTR_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_CXL2_CNTR_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_CXL1_CNTR_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_CXL2_CNTR_TEMP_C"
],
"Name": "PID_WF_CXL_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -127,14 +127,14 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V8_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_CD_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V85_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_AB_ASIC1_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V8_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_CD_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_P0V85_ASIC2_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_VR_PVDDQ_AB_ASIC2_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V8_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_CD_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V85_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_AB_ASIC1_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V8_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_CD_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_P0V85_ASIC2_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_VR_PVDDQ_AB_ASIC2_TEMP_C"
],
"Name": "Stepwise_WF_VR_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -164,14 +164,14 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_A_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_B_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_C_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC1_DIMM_D_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_A_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_B_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_C_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_ASIC2_DIMM_D_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_A_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_B_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_C_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC1_DIMM_D_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_A_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_B_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_C_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_ASIC2_DIMM_D_TEMP_C"
],
"Name": "Stepwise_WF_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -201,7 +201,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_E1S_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_E1S_TEMP_C"
],
"Name": "Stepwise_WF_E1S_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -231,8 +231,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Wailua_Falls_Slot $bus % 15 WF_CXL1_CNTR_TEMP_C",
- "Wailua_Falls_Slot $bus % 15 WF_CXL2_CNTR_TEMP_C"
+ "WAILUA_FALLS_SLOT $bus % 15 WF_CXL1_CNTR_TEMP_C",
+ "WAILUA_FALLS_SLOT $bus % 15 WF_CXL2_CNTR_TEMP_C"
],
"Name": "Stepwise_WF_CXL_Slot $bus % 15",
"NegativeHysteresis": 2,