configurations: yosemite4: Unify sensor names to uppercase letters
Unify the fru name in the sensor name into uppercase letters
Change-Id: I5588c03f6d60816b6f5d7b6df8bd00f824ac3caa
Signed-off-by: Lora Lin <lora.lin.wiwynn@gmail.com>
diff --git a/configurations/yosemite4_sentineldome_t1.json b/configurations/yosemite4_sentineldome_t1.json
index 21b93eb..87ec79a 100644
--- a/configurations/yosemite4_sentineldome_t1.json
+++ b/configurations/yosemite4_sentineldome_t1.json
@@ -11,16 +11,16 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "PID_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -47,7 +47,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "PID_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -74,7 +74,7 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2.0,
@@ -101,11 +101,11 @@
"ILimitMin": -50,
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "PID_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3.0,
@@ -125,8 +125,8 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
],
"Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
"NegativeHysteresis": 0,
@@ -146,7 +146,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
+ "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
],
"Name": "Stepwise_MB_FIO_Slot $bus % 15",
"NegativeHysteresis": 1,
@@ -204,16 +204,16 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C"
],
"Name": "Stepwise_MB_DIMM_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -243,7 +243,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
],
"Name": "Stepwise_MB_CPU_Slot $bus % 15",
"NegativeHysteresis": 3,
@@ -279,7 +279,7 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
],
"Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
"NegativeHysteresis": 2,
@@ -309,11 +309,11 @@
"Class": "temp",
"InputUnavailableAsFailed": false,
"Inputs": [
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
- "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
+ "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
],
"Name": "Stepwise_MB_VR_Slot $bus % 15",
"NegativeHysteresis": 3,