romed8hm3: Add nct6779 Super I/O device
The kernel patches adding i2c support to the nct6775 driver are now on
their way upstream and have been backported into the OpenBMC kernel as
well, so add the nct6779 chip to the romed8hm3 config. This is
necessary for the BMC to be able to monitor host CPU temperatures, since
we have to go through the Super I/O chip to get readings from the CPU's
TSI interface.
Tested: on romed8hm3 entity-manager instantiates the nct6779 driver and
we can read CPU temperatures, though it currently requires a bit of
manual handholding since the logic to handle host power-state
transitions isn't implemented yet (the nct6779 is in the same power
domain as the host, and the driver needs to get unbound when it shuts
down and only re-bound when it's powered on).
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Change-Id: I2cb69a9f35886ce4c62f9ef2808aeca6c1045e9a
diff --git a/configurations/ASRock_ROMED8HM3.json b/configurations/ASRock_ROMED8HM3.json
index 0b106f4..8dcbbf2 100644
--- a/configurations/ASRock_ROMED8HM3.json
+++ b/configurations/ASRock_ROMED8HM3.json
@@ -525,6 +525,53 @@
"Type": "LM25066"
},
{
+ "Address": "0x2d",
+ "Bus": 1,
+ "Name": "SYSTIN",
+ "Name1": "CPUTIN",
+ "Name10": "TSI0_TEMP",
+ "Name2": "AUXTIN0",
+ "Name3": "AUXTIN1",
+ "Name4": "AUXTIN2",
+ "Name5": "AUXTIN3",
+ "Name6": "PCH_CHIP_CPU_MAX_TEMP",
+ "Name7": "PCH_CHIP_TEMP",
+ "Name8": "PCH_CPU_TEMP",
+ "Name9": "PCH_MCH_TEMP",
+ "PowerState": "On",
+ "Thresholds": [
+ {
+ "Direction": "greater than",
+ "Index": 11,
+ "Name": "upper critical",
+ "Severity": 1,
+ "Value": 90
+ },
+ {
+ "Direction": "greater than",
+ "Index": 11,
+ "Name": "upper non critical",
+ "Severity": 0,
+ "Value": 80
+ },
+ {
+ "Direction": "less than",
+ "Index": 11,
+ "Name": "lower non critical",
+ "Severity": 0,
+ "Value": 5
+ },
+ {
+ "Direction": "less than",
+ "Index": 11,
+ "Name": "lower critical",
+ "Severity": 1,
+ "Value": 0
+ }
+ ],
+ "Type": "NCT6779"
+ },
+ {
"Address": "0x4c",
"Bus": 0,
"Name": "Inlet",