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gerrit.openbmc.org / openbmc / entity-manager / 38cbbaf66854de6ec2adbf0c0c7b121fbbe9fb91 / . / configurations / system1_baseboard.json
blob: 3f02e38d524547fa3174790d662479f82c07ebab [file] [log] [blame]
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]1{
2 "Exposes": [
3 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]4 "Index": 0,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]5 "Name": "P12V",
6 "PowerState": "Always",
7 "ScaleFactor": 1.0,
8 "Thresholds": [
9 {
10 "Direction": "greater than",
11 "Name": "upper critical",
12 "Severity": 1,
13 "Value": 13.0
14 },
15 {
16 "Direction": "greater than",
17 "Name": "upper non critical",
18 "Severity": 0,
19 "Value": 12.8
20 },
21 {
22 "Direction": "less than",
23 "Name": "lower non critical",
24 "Severity": 0,
25 "Value": 11.2
26 },
27 {
28 "Direction": "less than",
29 "Name": "lower critical",
30 "Severity": 1,
31 "Value": 11.0
32 }
33 ],
34 "Type": "ADC"
35 },
36 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]37 "Index": 1,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]38 "Name": "P5V_AUX_ADC",
39 "PowerState": "Always",
40 "ScaleFactor": 1.0,
41 "Thresholds": [
42 {
43 "Direction": "greater than",
44 "Name": "upper critical",
45 "Severity": 1,
46 "Value": 5.25
47 },
48 {
49 "Direction": "greater than",
50 "Name": "upper non critical",
51 "Severity": 0,
52 "Value": 5.15
53 },
54 {
55 "Direction": "less than",
56 "Name": "lower non critical",
57 "Severity": 0,
58 "Value": 4.85
59 },
60 {
61 "Direction": "less than",
62 "Name": "lower critical",
63 "Severity": 1,
64 "Value": 4.75
65 }
66 ],
67 "Type": "ADC"
68 },
69 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]70 "Index": 2,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]71 "Name": "P5V_BMC_AUX_ADC",
72 "PowerState": "Always",
73 "ScaleFactor": 1.0,
74 "Thresholds": [
75 {
76 "Direction": "greater than",
77 "Name": "upper critical",
78 "Severity": 1,
79 "Value": 5.25
80 },
81 {
82 "Direction": "greater than",
83 "Name": "upper non critical",
84 "Severity": 0,
85 "Value": 5.15
86 },
87 {
88 "Direction": "less than",
89 "Name": "lower non critical",
90 "Severity": 0,
91 "Value": 4.85
92 },
93 {
94 "Direction": "less than",
95 "Name": "lower critical",
96 "Severity": 1,
97 "Value": 4.75
98 }
99 ],
100 "Type": "ADC"
101 },
102 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]103 "Index": 3,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]104 "Name": "P3V3_AUX_ADC",
105 "PowerState": "Always",
106 "ScaleFactor": 1.0,
107 "Thresholds": [
108 {
109 "Direction": "greater than",
110 "Name": "upper critical",
111 "Severity": 1,
112 "Value": 3.465
113 },
114 {
115 "Direction": "greater than",
116 "Name": "upper non critical",
117 "Severity": 0,
118 "Value": 3.399
119 },
120 {
121 "Direction": "less than",
122 "Name": "lower non critical",
123 "Severity": 0,
124 "Value": 3.201
125 },
126 {
127 "Direction": "less than",
128 "Name": "lower critical",
129 "Severity": 1,
130 "Value": 3.135
131 }
132 ],
133 "Type": "ADC"
134 },
135 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]136 "Index": 4,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]137 "Name": "P3V3_BMC_AUX",
138 "PowerState": "Always",
139 "ScaleFactor": 1.0,
140 "Thresholds": [
141 {
142 "Direction": "greater than",
143 "Name": "upper critical",
144 "Severity": 1,
145 "Value": 3.465
146 },
147 {
148 "Direction": "greater than",
149 "Name": "upper non critical",
150 "Severity": 0,
151 "Value": 3.399
152 },
153 {
154 "Direction": "less than",
155 "Name": "lower non critical",
156 "Severity": 0,
157 "Value": 3.201
158 },
159 {
160 "Direction": "less than",
161 "Name": "lower critical",
162 "Severity": 1,
163 "Value": 3.135
164 }
165 ],
166 "Type": "ADC"
167 },
168 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]169 "Index": 5,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]170 "Name": "P1V8_BMC_AUX",
171 "PowerState": "Always",
172 "ScaleFactor": 1.0,
173 "Thresholds": [
174 {
175 "Direction": "greater than",
176 "Name": "upper critical",
177 "Severity": 1,
178 "Value": 1.89
179 },
180 {
181 "Direction": "greater than",
182 "Name": "upper non critical",
183 "Severity": 0,
184 "Value": 1.854
185 },
186 {
187 "Direction": "less than",
188 "Name": "lower non critical",
189 "Severity": 0,
190 "Value": 1.746
191 },
192 {
193 "Direction": "less than",
194 "Name": "lower critical",
195 "Severity": 1,
196 "Value": 1.71
197 }
198 ],
199 "Type": "ADC"
200 },
201 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]202 "Index": 6,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]203 "Name": "P1V2_BMC_AUX",
204 "PowerState": "Always",
205 "ScaleFactor": 1.0,
206 "Thresholds": [
207 {
208 "Direction": "greater than",
209 "Name": "upper critical",
210 "Severity": 1,
211 "Value": 1.26
212 },
213 {
214 "Direction": "greater than",
215 "Name": "upper non critical",
216 "Severity": 0,
217 "Value": 1.236
218 },
219 {
220 "Direction": "less than",
221 "Name": "lower non critical",
222 "Severity": 0,
223 "Value": 1.164
224 },
225 {
226 "Direction": "less than",
227 "Name": "lower critical",
228 "Severity": 1,
229 "Value": 1.14
230 }
231 ],
232 "Type": "ADC"
233 },
234 {
Andrew Geissler2271cd62024-05-03 10:10:01 -0500[diff] [blame]235 "Index": 7,
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]236 "Name": "P1V2_PHY1_LDO",
237 "PowerState": "Always",
238 "ScaleFactor": 1.0,
239 "Thresholds": [
240 {
241 "Direction": "greater than",
242 "Name": "upper critical",
243 "Severity": 1,
244 "Value": 1.26
245 },
246 {
247 "Direction": "greater than",
248 "Name": "upper non critical",
249 "Severity": 0,
250 "Value": 1.236
251 },
252 {
253 "Direction": "less than",
254 "Name": "lower non critical",
255 "Severity": 0,
256 "Value": 1.164
257 },
258 {
259 "Direction": "less than",
260 "Name": "lower critical",
261 "Severity": 1,
262 "Value": 1.14
263 }
264 ],
265 "Type": "ADC"
266 },
267 {
268 "Index": 8,
269 "Name": "P1V2_PHY2_LDO",
270 "PowerState": "Always",
271 "ScaleFactor": 1.0,
272 "Thresholds": [
273 {
274 "Direction": "greater than",
275 "Name": "upper critical",
276 "Severity": 1,
277 "Value": 1.26
278 },
279 {
280 "Direction": "greater than",
281 "Name": "upper non critical",
282 "Severity": 0,
283 "Value": 1.236
284 },
285 {
286 "Direction": "less than",
287 "Name": "lower non critical",
288 "Severity": 0,
289 "Value": 1.164
290 },
291 {
292 "Direction": "less than",
293 "Name": "lower critical",
294 "Severity": 1,
295 "Value": 1.14
296 }
297 ],
298 "Type": "ADC"
299 },
300 {
301 "Index": 9,
302 "Name": "P2V5_AUX",
303 "PowerState": "Always",
304 "ScaleFactor": 1.0,
305 "Thresholds": [
306 {
307 "Direction": "greater than",
308 "Name": "upper critical",
309 "Severity": 1,
310 "Value": 2.625
311 },
312 {
313 "Direction": "greater than",
314 "Name": "upper non critical",
315 "Severity": 0,
316 "Value": 2.575
317 },
318 {
319 "Direction": "less than",
320 "Name": "lower non critical",
321 "Severity": 0,
322 "Value": 2.425
323 },
324 {
325 "Direction": "less than",
326 "Name": "lower critical",
327 "Severity": 1,
328 "Value": 2.375
329 }
330 ],
331 "Type": "ADC"
Andrew Geisslerf5c45642023-10-26 13:53:17 -0600[diff] [blame]332 },
333 {
Andrew Geissler88b2aba2024-05-03 10:17:32 -0500[diff] [blame]334 "BridgeGpio": [
335 {
336 "Name": "rtc-battery-voltage-read-enable",
337 "Polarity": "High"
338 }
339 ],
340 "Index": 10,
341 "Name": "Battery Voltage",
342 "PollRate": 86400,
343 "ScaleFactor": 0.4348,
344 "Thresholds": [
345 {
346 "Direction": "less than",
347 "Name": "lower critical",
348 "Severity": 1,
349 "Value": 2.45
350 }
351 ],
352 "Type": "ADC"
353 },
354 {
Chris Caincb47a832023-11-17 12:19:20 -0600[diff] [blame]355 "Name": "Fan1 connector",
356 "Pwm": 0,
357 "PwmName": "Fan1_Pwm",
358 "Status": "disabled",
359 "Tachs": [
360 0,
361 1
362 ],
363 "Type": "IntelFanConnector"
364 },
365 {
366 "Name": "Fan2 connector",
367 "Pwm": 1,
368 "PwmName": "Fan2_Pwm",
369 "Status": "disabled",
370 "Tachs": [
371 2,
372 3
373 ],
374 "Type": "IntelFanConnector"
375 },
376 {
377 "Name": "Fan3 connector",
378 "Pwm": 2,
379 "PwmName": "Fan3_Pwm",
380 "Status": "disabled",
381 "Tachs": [
382 4,
383 5
384 ],
385 "Type": "IntelFanConnector"
386 },
387 {
388 "Name": "Fan4 connector",
389 "Pwm": 3,
390 "PwmName": "Fan4_Pwm",
391 "Status": "disabled",
392 "Tachs": [
393 6,
394 7
395 ],
396 "Type": "IntelFanConnector"
397 },
398 {
399 "Name": "Fan5 connector",
400 "Pwm": 4,
401 "PwmName": "Fan5_Pwm",
402 "Status": "disabled",
403 "Tachs": [
404 8,
405 9
406 ],
407 "Type": "IntelFanConnector"
408 },
409 {
410 "Name": "Fan6 connector",
411 "Pwm": 0,
412 "PwmName": "Fan6_Pwm",
413 "Status": "disabled",
414 "Tachs": [
415 0
416 ],
417 "Type": "IntelFanConnector"
418 },
419 {
420 "Name": "Fan7 connector",
421 "Pwm": 1,
422 "PwmName": "Fan7_Pwm",
423 "Status": "disabled",
424 "Tachs": [
425 1
426 ],
427 "Type": "IntelFanConnector"
Andrew Geisslerfe44b6a2024-07-23 17:21:02 -0300[diff] [blame]428 },
429 {
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]430 "Class": "temp",
431 "FFGainCoefficient": 0.0,
432 "FFOffCoefficient": 0.0,
433 "ICoefficient": -4.64,
434 "ILimitMax": 100,
435 "ILimitMin": 30,
436 "Inputs": [
437 "PCIE_SWITCH1_TEMP",
438 "PCIE_SWITCH2_TEMP",
439 "PCIE_SWITCH3_TEMP",
440 "PCIE_SWITCH4_TEMP",
441 "PCIE_SWITCH5_TEMP",
442 "PCIE_SWITCH6_TEMP"
443 ],
444 "Name": "PCIE Switch Temperature",
445 "NegativeHysteresis": 5.0,
446 "OutLimitMax": 100,
447 "OutLimitMin": 30,
448 "Outputs": [],
449 "PCoefficient": -0.15,
450 "PositiveHysteresis": 0.0,
451 "SetPoint": 75.0,
452 "SlewNeg": -1,
453 "SlewPos": 0.0,
454 "Type": "Pid",
455 "Zones": [
456 "CECIO"
457 ]
458 },
459 {
460 "Class": "temp",
461 "FFGainCoefficient": 0,
462 "FFOffCoefficient": 0,
463 "ICoefficient": -5,
464 "ILimitMax": 100,
465 "ILimitMin": 20,
466 "Inputs": [
467 "SPYRE1_TEMP1",
468 "SPYRE1_TEMP2",
469 "SPYRE2_TEMP1",
470 "SPYRE2_TEMP2",
471 "SPYRE3_TEMP1",
472 "SPYRE3_TEMP2",
473 "SPYRE4_TEMP1",
474 "SPYRE4_TEMP2",
475 "SPYRE5_TEMP1",
476 "SPYRE5_TEMP2",
477 "SPYRE6_TEMP1",
478 "SPYRE6_TEMP2",
479 "SPYRE7_TEMP1",
480 "SPYRE7_TEMP2",
481 "SPYRE8_TEMP1",
482 "SPYRE8_TEMP2",
483 "SPYRE9_TEMP1",
484 "SPYRE9_TEMP2",
485 "SPYRE10_TEMP1",
486 "SPYRE10_TEMP2",
487 "SPYRE11_TEMP1",
488 "SPYRE11_TEMP2",
489 "SPYRE12_TEMP1",
490 "SPYRE12_TEMP2",
491 "SPYRE13_TEMP1",
492 "SPYRE13_TEMP2",
493 "SPYRE14_TEMP1",
494 "SPYRE14_TEMP2",
495 "SPYRE15_TEMP1",
496 "SPYRE15_TEMP2",
497 "SPYRE16_TEMP1",
498 "SPYRE16_TEMP2"
499 ],
500 "Name": "Spyre Temperature",
501 "NegativeHysteresis": 0,
502 "OutLimitMax": 100,
503 "OutLimitMin": 20,
504 "Outputs": [],
505 "PCoefficient": -500,
506 "PositiveHysteresis": 0,
507 "SetPoint": 85,
508 "SlewNeg": 0,
509 "SlewPos": 0,
510 "Type": "Pid",
511 "Zones": [
512 "CECIO"
513 ]
514 },
515 {
516 "Address": "0x4b",
517 "Bus": 72,
518 "Name": "SPYRE9_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]519 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]520 "Type": "TMP112"
521 },
522 {
523 "Address": "0x48",
524 "Bus": 73,
525 "Name": "SPYRE9_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]526 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]527 "Type": "TMP112"
528 },
529 {
530 "Address": "0x4b",
531 "Bus": 74,
532 "Name": "SPYRE10_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]533 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]534 "Type": "TMP112"
535 },
536 {
537 "Address": "0x48",
538 "Bus": 75,
539 "Name": "SPYRE10_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]540 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]541 "Type": "TMP112"
542 },
543 {
544 "Address": "0x4b",
545 "Bus": 76,
546 "Name": "SPYRE11_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]547 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]548 "Type": "TMP112"
549 },
550 {
551 "Address": "0x48",
552 "Bus": 77,
553 "Name": "SPYRE11_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]554 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]555 "Type": "TMP112"
556 },
557 {
558 "Address": "0x4b",
559 "Bus": 78,
560 "Name": "SPYRE12_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]561 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]562 "Type": "TMP112"
563 },
564 {
565 "Address": "0x48",
566 "Bus": 79,
567 "Name": "SPYRE12_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]568 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]569 "Type": "TMP112"
570 },
571 {
572 "Address": "0x4b",
573 "Bus": 80,
574 "Name": "SPYRE13_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]575 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]576 "Type": "TMP112"
577 },
578 {
579 "Address": "0x48",
580 "Bus": 81,
581 "Name": "SPYRE13_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]582 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]583 "Type": "TMP112"
584 },
585 {
586 "Address": "0x4b",
587 "Bus": 82,
588 "Name": "SPYRE14_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]589 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]590 "Type": "TMP112"
591 },
592 {
593 "Address": "0x48",
594 "Bus": 83,
595 "Name": "SPYRE14_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]596 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]597 "Type": "TMP112"
598 },
599 {
600 "Address": "0x4b",
601 "Bus": 84,
602 "Name": "SPYRE15_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]603 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]604 "Type": "TMP112"
605 },
606 {
607 "Address": "0x48",
608 "Bus": 85,
609 "Name": "SPYRE15_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]610 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]611 "Type": "TMP112"
612 },
613 {
614 "Address": "0x4b",
615 "Bus": 86,
616 "Name": "SPYRE16_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]617 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]618 "Type": "TMP112"
619 },
620 {
621 "Address": "0x48",
622 "Bus": 87,
623 "Name": "SPYRE16_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]624 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]625 "Type": "TMP112"
626 },
627 {
628 "Address": "0x4b",
629 "Bus": 88,
630 "Name": "SPYRE1_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]631 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]632 "Type": "TMP112"
633 },
634 {
635 "Address": "0x48",
636 "Bus": 89,
637 "Name": "SPYRE1_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]638 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]639 "Type": "TMP112"
640 },
641 {
642 "Address": "0x4b",
643 "Bus": 90,
644 "Name": "SPYRE2_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]645 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]646 "Type": "TMP112"
647 },
648 {
649 "Address": "0x48",
650 "Bus": 91,
651 "Name": "SPYRE2_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]652 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]653 "Type": "TMP112"
654 },
655 {
656 "Address": "0x4b",
657 "Bus": 92,
658 "Name": "SPYRE3_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]659 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]660 "Type": "TMP112"
661 },
662 {
663 "Address": "0x48",
664 "Bus": 93,
665 "Name": "SPYRE3_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]666 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]667 "Type": "TMP112"
668 },
669 {
670 "Address": "0x4b",
671 "Bus": 94,
672 "Name": "SPYRE4_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]673 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]674 "Type": "TMP112"
675 },
676 {
677 "Address": "0x48",
678 "Bus": 95,
679 "Name": "SPYRE4_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]680 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]681 "Type": "TMP112"
682 },
683 {
684 "Address": "0x4b",
685 "Bus": 96,
686 "Name": "SPYRE5_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]687 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]688 "Type": "TMP112"
689 },
690 {
691 "Address": "0x48",
692 "Bus": 97,
693 "Name": "SPYRE5_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]694 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]695 "Type": "TMP112"
696 },
697 {
698 "Address": "0x4b",
699 "Bus": 98,
700 "Name": "SPYRE6_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]701 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]702 "Type": "TMP112"
703 },
704 {
705 "Address": "0x48",
706 "Bus": 99,
707 "Name": "SPYRE6_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]708 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]709 "Type": "TMP112"
710 },
711 {
712 "Address": "0x4b",
713 "Bus": 100,
714 "Name": "SPYRE7_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]715 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]716 "Type": "TMP112"
717 },
718 {
719 "Address": "0x48",
720 "Bus": 101,
721 "Name": "SPYRE7_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]722 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]723 "Type": "TMP112"
724 },
725 {
726 "Address": "0x4b",
727 "Bus": 102,
728 "Name": "SPYRE8_TEMP1",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]729 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]730 "Type": "TMP112"
731 },
732 {
733 "Address": "0x48",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]734 "Bus": 103,
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]735 "Name": "SPYRE8_TEMP2",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]736 "PowerState": "On",
Chris Cain9611c522025-02-06 14:35:48 -0600[diff] [blame]737 "Type": "TMP112"
738 },
739 {
Andrew Geisslerfe44b6a2024-07-23 17:21:02 -0300[diff] [blame]740 "Address": "0x4c",
741 "Bus": 70,
Andrew Geissler568e0ea2024-08-06 16:33:39 -0300[diff] [blame]742 "Name": "PCIE_SWITCH1_TEMP",
743 "Name1": "PCIE_SWITCH3_TEMP",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]744 "PowerState": "On",
Andrew Geisslerfe44b6a2024-07-23 17:21:02 -0300[diff] [blame]745 "Type": "TMP432"
Andrew Geissler0899a492024-08-06 16:57:06 -0300[diff] [blame]746 },
747 {
748 "Address": "0x4c",
749 "Bus": 71,
750 "Name": "PCIE_SWITCH4_TEMP",
751 "Name1": "PCIE_SWITCH5_TEMP",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]752 "PowerState": "On",
Andrew Geissler0899a492024-08-06 16:57:06 -0300[diff] [blame]753 "Type": "TMP432"
754 },
755 {
756 "Address": "0x4c",
757 "Bus": 54,
758 "Name": "PCIE_SWITCH2_TEMP",
759 "Name1": "PCIE_SWITCH6_TEMP",
Chris Cain48c21ce2025-02-20 14:22:17 -0600[diff] [blame]760 "PowerState": "On",
Andrew Geissler0899a492024-08-06 16:57:06 -0300[diff] [blame]761 "Type": "TMP432"
Andrew Geissleraaf77e02024-11-12 14:55:59 -0600[diff] [blame]762 },
763 {
764 "Address": "0x30",
765 "Bus": 0,
766 "CpuID": 0,
767 "Name": "CPU 0",
768 "Type": "XeonCPU"
769 },
770 {
771 "Address": "0x31",
772 "Bus": 0,
773 "CpuID": 1,
774 "Name": "CPU 1",
775 "Type": "XeonCPU"
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]776 }
777 ],
778 "Name": "IBM System1 Baseboard",
779 "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': '.*SYS1', 'BOARD_MANUFACTURER': 'IBM'})",
Andrew Geissler35215e92023-10-02 06:48:05 -0500[diff] [blame]780 "Type": "Board",
781 "xyz.openbmc_project.Inventory.Decorator.Asset": {
782 "Manufacturer": "$BOARD_MANUFACTURER",
783 "Model": "$BOARD_PRODUCT_NAME",
784 "PartNumber": "$BOARD_PART_NUMBER",
785 "SerialNumber": "$BOARD_SERIAL_NUMBER"
786 },
787 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
788 "AssetTag": "$PRODUCT_ASSET_TAG"
789 },
790 "xyz.openbmc_project.Inventory.Item.System": {}
791}