| commit | 0e06b84dba361b1d76a12e4b6b8b56dadc3abba3 | [log] [tgz] |
|---|---|---|
| author | Jason M. Bills <jason.m.bills@intel.com> | Fri Oct 02 16:30:06 2020 -0700 |
| committer | Jason M. Bills <jason.m.bills@linux.intel.com> | Fri Feb 19 14:35:21 2021 -0800 |
| tree | 9d2a523e37682d6f747d556ec8d789b96a06fb72 | |
| parent | a92735d25756730e8e90502567a0e544939079a0 [diff] |
Move ERR0 and ERR1 monitor to the new architecture Add an error monitor for CPU_ERR0 and CPU_ERR1 that polls to check if it is asserted through the timeout and logs the event. If it is ever not asserted, it will wait for an interrupt to start polling again. Change-Id: I16eb5500f4c08226b7e4e879eb7732caa5262db1 Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>