commit 51cf3110bc18981129b62748dd7dd6df0970e66d
author Jason M. Bills <jason.m.bills@intel.com> Thu Sep 07 15:50:23 2023 -0700
committer Jason Bills <jason.m.bills@linux.intel.com> Tue Sep 12 20:41:43 2023 +0000
tree 1c10bfb7da8778d50817f3e3c4ae847ced9f3227
parent f284f855158315a41afefc11ff0764d95eaf5da6

Add a configuration option to allow reset on MCERR

MCERR is another type of error that can be recovered by a reset. This
adds a configuration option to control if the BMC will allow that
recovery.

Tested:
Injected an MCERR and confirmed that when this option is true, recovery
is enabled. When this option is false, recovery is blocked.

Change-Id: I435af50acc41061e3a5036c84d12a99ffeee8969
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>

src/oemcommands.cpp

diff --git a/src/oemcommands.cpp b/src/oemcommands.cpp
index c14907b..05661fc 100644
--- a/src/oemcommands.cpp
+++ b/src/oemcommands.cpp
@@ -941,7 +941,8 @@
 
 ipmi::RspType<bool,    // IERR Reset Enabled
               bool,    // ERR2 Reset Enabled
-              uint6_t, // reserved
+              bool,    // MCERR Reset Enabled
+              uint5_t, // reserved
               uint8_t, // reserved, returns 0x3F
               uint6_t, // CPU1 IERR Count
               uint2_t, // CPU1 Status
@@ -957,6 +958,7 @@
 {
     bool resetOnIERR = false;
     bool resetOnERR2 = false;
+    bool allowResetOnMCERR = false;
     uint6_t cpu1IERRCount = 0;
     uint6_t cpu2IERRCount = 0;
     uint6_t cpu3IERRCount = 0;
@@ -985,6 +987,7 @@
             *busp, service, processorErrConfigObjPath, processorErrConfigIntf);
         resetOnIERR = std::get<bool>(result.at("ResetOnIERR"));
         resetOnERR2 = std::get<bool>(result.at("ResetOnERR2"));
+        allowResetOnMCERR = std::get<bool>(result.at("AllowResetOnMCERR"));
         cpu1IERRCount = std::get<uint8_t>(result.at("ErrorCountCPU1"));
         cpu2IERRCount = std::get<uint8_t>(result.at("ErrorCountCPU2"));
         cpu3IERRCount = std::get<uint8_t>(result.at("ErrorCountCPU3"));
@@ -999,14 +1002,15 @@
         return ipmi::responseUnspecifiedError();
     }
 
-    return ipmi::responseSuccess(resetOnIERR, resetOnERR2, 0, 0x3F,
-                                 cpu1IERRCount, cpu1Status, cpu2IERRCount,
+    return ipmi::responseSuccess(resetOnIERR, resetOnERR2, allowResetOnMCERR, 0,
+                                 0x3F, cpu1IERRCount, cpu1Status, cpu2IERRCount,
                                  cpu2Status, cpu3IERRCount, cpu3Status,
                                  cpu4IERRCount, cpu4Status, crashdumpCount);
 }
 
 ipmi::RspType<> ipmiOEMSetProcessorErrConfig(
-    bool resetOnIERR, bool resetOnERR2, uint6_t reserved1, uint8_t reserved2,
+    bool resetOnIERR, bool resetOnERR2, bool allowResetOnMCERR,
+    uint5_t reserved1, uint8_t reserved2,
     std::optional<bool> clearCPUErrorCount,
     std::optional<bool> clearCrashdumpCount, std::optional<uint6_t> reserved3)
 {
@@ -1031,6 +1035,9 @@
         ipmi::setDbusProperty(*busp, service, processorErrConfigObjPath,
                               processorErrConfigIntf, "ResetOnERR2",
                               resetOnERR2);
+        ipmi::setDbusProperty(*busp, service, processorErrConfigObjPath,
+                              processorErrConfigIntf, "AllowResetOnMCERR",
+                              allowResetOnMCERR);
         if (clearCPUErrorCount.value_or(false))
         {
             ipmi::setDbusProperty(*busp, service, processorErrConfigObjPath,