| commit | 7acb2d27bcb04030f63da02d33873634343a1bfb | [log] [tgz] |
|---|---|---|
| author | V-Sanjana <sanjana.v@intel.com> | Tue Nov 15 11:13:54 2022 +0530 |
| committer | V-Sanjana <sanjana.v@intel.com> | Mon Dec 05 10:08:25 2022 +0000 |
| tree | a11abbc6a9d4f8893883708882c4c195fdcff9f4 | |
| parent | 8b7c156e5e092ca22c83f755bcb4d1aecbd1d703 [diff] |
The slot i2c master read write command is updated The update is to perform read-write operation on the devices behind MUX in various components like RISER, HSBP and PCIe slots present in baseboard. Tested: The slot i2c command was tested for reading data from HSBP CPLD present behind baseboard MUX and found to be successful Signed-off-by: V-Sanjana <sanjana.v@intel.com> Change-Id: I25ce882fda50f5946ca2acec0290d1c769ab019a
This component is intended to provide Intel-specific IPMI[3] command handlers for OpenBMC. These handlers are intended to integrate BMC with servers based on Intel architecture.
intel-ipmi-oem serves as an extension[1] to OpenBMC IPMI daemon[2]. It is compiled as a shared library and intended to both:
Related features provided by the library are grouped in separate source files. Main extensions to vanilla OpenBMC IPMI stack are the following:
[4]