diff --git a/edk/Cper.h b/edk/Cper.h
index 0fcc967..201bbfe 100644
--- a/edk/Cper.h
+++ b/edk/Cper.h
@@ -721,6 +721,7 @@
   UINT64    Cr2;
   UINT64    Cr3;
   UINT64    Cr4;
+  UINT64    Cr8;
   UINT64    Gdtr[2];
   UINT64    Idtr[2];
   UINT16    Ldtr;
diff --git a/sections/cper-section-ia32x64.c b/sections/cper-section-ia32x64.c
index 9b38341..a9531d0 100644
--- a/sections/cper-section-ia32x64.c
+++ b/sections/cper-section-ia32x64.c
@@ -336,8 +336,7 @@
     json_object_object_add(x64_registers, "cr2", json_object_new_uint64(registers->Cr2));
     json_object_object_add(x64_registers, "cr3", json_object_new_uint64(registers->Cr3));
     json_object_object_add(x64_registers, "cr4", json_object_new_uint64(registers->Cr4));
-    //todo: Where is CR8? On the specification, not in the headers.
-    //json_object_object_add(x64_registers, "cr8", json_object_new_uint64(registers->));
+    json_object_object_add(x64_registers, "cr8", json_object_new_uint64(registers->Cr8));
     json_object_object_add(x64_registers, "gdtr_0", json_object_new_uint64(registers->Gdtr[0]));
     json_object_object_add(x64_registers, "gdtr_1", json_object_new_uint64(registers->Gdtr[1]));
     json_object_object_add(x64_registers, "idtr_0", json_object_new_uint64(registers->Idtr[0]));
diff --git a/sections/cper-section-ipf.c b/sections/cper-section-ipf.c
index c0781f8..0c065cc 100644
--- a/sections/cper-section-ipf.c
+++ b/sections/cper-section-ipf.c
@@ -50,7 +50,7 @@
     
     //CPU ID information.
     EFI_IPF_CPU_INFO* cpu_info = (EFI_IPF_CPU_INFO*)cur_error;
-    //todo: find out how this is represented
+    //stretch: find out how this is represented
 
     //Processor static information.
     EFI_IPF_PSI_STATIC* psi_static = (EFI_IPF_PSI_STATIC*)(cpu_info + 1);
@@ -61,7 +61,7 @@
     json_object_object_add(psi_static_ir, "validationBits", psi_validation);
 
     //PSI minimal state save info.
-    //todo: structure min save state area as in Intel Itanium Architecture Software Developer's Manual.
+    //stretch: structure min save state area as in Intel Itanium Architecture Software Developer's Manual.
 
     //BRs, CRs, ARs, RRs, FRs.
     json_object_object_add(psi_static_ir, "brs", uint64_array_to_ir_array(psi_static->Brs, 8));