clang-format: re-format for clang-19
clang-format-19 isn't compatible with the clang-format-18 output, so we
need to reformat the code with the latest version. A few parameters
in clang-tidy have been deprecated, so adjust the style file
accordingly.
See Ie2f6eb3b043f2d655c9df806815afd7971fd0947 for updated style.
See I88192b41ab7a95599a90915013579608af7bc56f for clang-19 enablement.
Change-Id: I32c52522ee18311ac09500950f82832102ccb5c0
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
diff --git a/generator/sections/gen-section-pcie.c b/generator/sections/gen-section-pcie.c
index 1e1beb7..eaf050c 100644
--- a/generator/sections/gen-section-pcie.c
+++ b/generator/sections/gen-section-pcie.c
@@ -9,11 +9,7 @@
#include <libcper/generator/gen-utils.h>
#include <libcper/generator/sections/gen-section.h>
-#define PCIE_PORT_TYPES \
- (int[]) \
- { \
- 0, 1, 4, 5, 6, 7, 8, 9, 10 \
- }
+#define PCIE_PORT_TYPES (int[]){ 0, 1, 4, 5, 6, 7, 8, 9, 10 }
//Generates a single pseudo-random PCIe error section, saving the resulting address to the given
//location. Returns the size of the newly created section.
diff --git a/include/libcper/Cper.h b/include/libcper/Cper.h
index 82f68c1..0dc3c12 100644
--- a/include/libcper/Cper.h
+++ b/include/libcper/Cper.h
@@ -77,82 +77,60 @@
/// GUID value indicating the record association with an error event notification type.
///@{
#define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \
- { \
- 0x2DCE8BB1, 0xBDD7, 0x450e, \
- { \
- 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 \
- } \
- }
+ { 0x2DCE8BB1, \
+ 0xBDD7, \
+ 0x450e, \
+ { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } }
#define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \
- { \
- 0x4E292F96, 0xD843, 0x4a55, \
- { \
- 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE \
- } \
- }
+ { 0x4E292F96, \
+ 0xD843, \
+ 0x4a55, \
+ { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } }
#define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \
- { \
- 0xE8F56FFE, 0x919C, 0x4cc5, \
- { \
- 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB \
- } \
- }
+ { 0xE8F56FFE, \
+ 0x919C, \
+ 0x4cc5, \
+ { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } }
#define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \
- { \
- 0xCF93C01F, 0x1A16, 0x4dfc, \
- { \
- 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 \
- } \
- }
+ { 0xCF93C01F, \
+ 0x1A16, \
+ 0x4dfc, \
+ { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } }
#define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \
- { \
- 0xCC5263E8, 0x9308, 0x454a, \
- { \
- 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E \
- } \
- }
+ { 0xCC5263E8, \
+ 0x9308, \
+ 0x454a, \
+ { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } }
#define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \
- { \
- 0x5BAD89FF, 0xB7E6, 0x42c9, \
- { \
- 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A \
- } \
- }
+ { 0x5BAD89FF, \
+ 0xB7E6, \
+ 0x42c9, \
+ { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } }
#define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \
- { \
- 0x3D61A466, 0xAB40, 0x409a, \
- { \
- 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F \
- } \
- }
+ { 0x3D61A466, \
+ 0xAB40, \
+ 0x409a, \
+ { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } }
#define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \
- { \
- 0x667DD791, 0xC6B3, 0x4c27, \
- { \
- 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 \
- } \
- }
+ { 0x667DD791, \
+ 0xC6B3, \
+ 0x4c27, \
+ { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } }
#define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \
- { \
- 0x9A78788A, 0xBBE8, 0x11E4, \
- { \
- 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 \
- } \
- }
+ { 0x9A78788A, \
+ 0xBBE8, \
+ 0x11E4, \
+ { 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 } }
#define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \
- { \
- 0x5C284C81, 0xB0AE, 0x4E87, \
- { \
- 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 \
- } \
- }
+ { 0x5C284C81, \
+ 0xB0AE, \
+ 0x4E87, \
+ { 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 } }
#define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \
- { \
- 0x09A9D5AC, 0x5204, 0x4214, \
- { \
- 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD \
- } \
- }
+ { 0x09A9D5AC, \
+ 0x5204, \
+ 0x4214, \
+ { 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD } }
///@}
///
@@ -215,103 +193,75 @@
/// Error Sectition Type GUIDs in Error Section Descriptor
///@{
#define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \
- { \
- 0x9876ccad, 0x47b4, 0x4bdb, \
- { \
- 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb \
- } \
- }
+ { 0x9876ccad, \
+ 0x47b4, \
+ 0x4bdb, \
+ { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } }
#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \
- { \
- 0xdc3ea0b0, 0xa144, 0x4797, \
- { \
- 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d \
- } \
- }
+ { 0xdc3ea0b0, \
+ 0xa144, \
+ 0x4797, \
+ { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } }
#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \
- { \
- 0xdc3ea0b0, 0xa144, 0x4797, \
- { \
- 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d \
- } \
- }
+ { 0xdc3ea0b0, \
+ 0xa144, \
+ 0x4797, \
+ { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } }
#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \
- { \
- 0xe19e3d16, 0xbc11, 0x11e4, \
- { \
- 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 \
- } \
- }
+ { 0xe19e3d16, \
+ 0xbc11, \
+ 0x11e4, \
+ { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } }
#define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \
- { \
- 0xa5bc1114, 0x6f64, 0x4ede, \
- { \
- 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 \
- } \
- }
+ { 0xa5bc1114, \
+ 0x6f64, \
+ 0x4ede, \
+ { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } }
#define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \
- { \
- 0x61EC04FC, 0x48E6, 0xD813, \
- { \
- 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 \
- } \
- }
+ { 0x61EC04FC, \
+ 0x48E6, \
+ 0xD813, \
+ { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } }
#define EFI_ERROR_SECTION_PCIE_GUID \
- { \
- 0xd995e954, 0xbbc1, 0x430f, \
- { \
- 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 \
- } \
- }
+ { 0xd995e954, \
+ 0xbbc1, \
+ 0x430f, \
+ { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } }
#define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \
- { \
- 0x81212a96, 0x09ed, 0x4996, \
- { \
- 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed \
- } \
- }
+ { 0x81212a96, \
+ 0x09ed, \
+ 0x4996, \
+ { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } }
#define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \
- { \
- 0xc5753963, 0x3b84, 0x4095, \
- { \
- 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd \
- } \
- }
+ { 0xc5753963, \
+ 0x3b84, \
+ 0x4095, \
+ { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } }
#define EFI_ERROR_SECTION_PCI_DEVICE_GUID \
- { \
- 0xeb5e4685, 0xca66, 0x4769, \
- { \
- 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 \
- } \
- }
+ { 0xeb5e4685, \
+ 0xca66, \
+ 0x4769, \
+ { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } }
#define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \
- { \
- 0x5b51fef7, 0xc79d, 0x4434, \
- { \
- 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 \
- } \
- }
+ { 0x5b51fef7, \
+ 0xc79d, \
+ 0x4434, \
+ { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } }
#define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \
- { \
- 0x71761d37, 0x32b2, 0x45cd, \
- { \
- 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf \
- } \
- }
+ { 0x71761d37, \
+ 0x32b2, \
+ 0x45cd, \
+ { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } }
#define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \
- { \
- 0x036f84e1, 0x7f37, 0x428c, \
- { \
- 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec \
- } \
- }
+ { 0x036f84e1, \
+ 0x7f37, \
+ 0x428c, \
+ { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } }
#define EFI_ERROR_SECTION_AMPERE_SPECIFIC_GUID \
- { \
- 0x2826cc9f, 0x448c, 0x4c2b, \
- { \
- 0x86, 0xb6, 0xa9, 0x53, 0x94, 0xb7, 0xef, 0x33 \
- } \
- }
+ { 0x2826cc9f, \
+ 0x448c, \
+ 0x4c2b, \
+ { 0x86, 0xb6, 0xa9, 0x53, 0x94, 0xb7, 0xef, 0x33 } }
///@}
///
@@ -428,33 +378,25 @@
/// in IA32/X64 Processor Error Information Structure.
///@{
#define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \
- { \
- 0xA55701F5, 0xE3EF, 0x43de, \
- { \
- 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C \
- } \
- }
+ { 0xA55701F5, \
+ 0xE3EF, \
+ 0x43de, \
+ { 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } }
#define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \
- { \
- 0xFC06B535, 0x5E1F, 0x4562, \
- { \
- 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 \
- } \
- }
+ { 0xFC06B535, \
+ 0x5E1F, \
+ 0x4562, \
+ { 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } }
#define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \
- { \
- 0x1CF3F8B3, 0xC5B1, 0x49a2, \
- { \
- 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C \
- } \
- }
+ { 0x1CF3F8B3, \
+ 0xC5B1, \
+ 0x49a2, \
+ { 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } }
#define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \
- { \
- 0x48AB7F57, 0xDC34, 0x4f6c, \
- { \
- 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 \
- } \
- }
+ { 0x48AB7F57, \
+ 0xDC34, \
+ 0x4f6c, \
+ { 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } }
extern EFI_GUID gEfiIa32x64ErrorTypeCacheCheckGuid;
extern EFI_GUID gEfiIa32x64ErrorTypeTlbCheckGuid;
extern EFI_GUID gEfiIa32x64ErrorTypeBusCheckGuid;
@@ -863,40 +805,36 @@
/// CPER Generic Error Codes
///
#define CPER_GENERIC_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 1, 16, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, \
- 26 \
- }
+ ( \
+ int[]){ 1, 16, 4, 5, 6, 7, 8, 9, 17, \
+ 18, 19, 20, 21, 22, 23, 24, 25, 26 }
#define CPER_GENERIC_ERROR_TYPES_VALUES \
- (const char *[]) \
- { \
- "ERR_INTERNAL", "ERR_BUS", "ERR_MEM", "ERR_TLB", "ERR_CACHE", \
- "ERR_FUNCTION", "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", \
- "ERR_IMPROPER", "ERR_UNIMPL", "ERR_LOL", \
- "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", \
- "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED" \
- }
-#define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS \
- (const char *[]) \
- { \
- "Error detected internal to the component.", \
- "Error detected in the bus.", \
- "Storage error in memory (DRAM).", \
- "Storage error in TLB.", "Storage error in cache.", \
- "Error in one or more functional units.", \
- "Component failed self test.", \
- "Overflow or underflow of internal queue.", \
- "Virtual address not found on IO-TLB or IO-PDIR.", \
- "Improper access error.", \
- "Access to a memory address which is not mapped to any component.", \
- "Loss of Lockstep error.", \
- "Response not associated with a request.", \
- "Bus parity error (must also set the A, C, or D bits).", \
- "Detection of a protocol error.", \
- "Detection of a PATH_ERROR.", \
- "Bus operation timeout.", \
- "A read was issued to data that has been poisoned." \
+ (const char *[]){ "ERR_INTERNAL", "ERR_BUS", "ERR_MEM", \
+ "ERR_TLB", "ERR_CACHE", "ERR_FUNCTION", \
+ "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", \
+ "ERR_IMPROPER", "ERR_UNIMPL", "ERR_LOL", \
+ "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", \
+ "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED" }
+#define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS \
+ (const char *[]){ \
+ "Error detected internal to the component.", \
+ "Error detected in the bus.", \
+ "Storage error in memory (DRAM).", \
+ "Storage error in TLB.", \
+ "Storage error in cache.", \
+ "Error in one or more functional units.", \
+ "Component failed self test.", \
+ "Overflow or underflow of internal queue.", \
+ "Virtual address not found on IO-TLB or IO-PDIR.", \
+ "Improper access error.", \
+ "Access to a memory address which is not mapped to any component.", \
+ "Loss of Lockstep error.", \
+ "Response not associated with a request.", \
+ "Bus parity error (must also set the A, C, or D bits).", \
+ "Detection of a protocol error.", \
+ "Detection of a PATH_ERROR.", \
+ "Bus operation timeout.", \
+ "A read was issued to data that has been poisoned." \
}
///
diff --git a/include/libcper/cper-parse.h b/include/libcper/cper-parse.h
index 4b966f1..123c83e 100644
--- a/include/libcper/cper-parse.h
+++ b/include/libcper/cper-parse.h
@@ -9,33 +9,24 @@
#include <stdio.h>
#define CPER_HEADER_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "platformIDValid", "timestampValid", "partitionIDValid" \
- }
+ (const char *[]){ "platformIDValid", "timestampValid", \
+ "partitionIDValid" }
#define CPER_SECTION_DESCRIPTOR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "fruIDValid", "fruStringValid" \
- }
+ (const char *[]){ "fruIDValid", "fruStringValid" }
#define CPER_SECTION_DESCRIPTOR_FLAGS_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "primary", "containmentWarning", "reset", \
- "errorThresholdExceeded", "resourceNotAccessible", \
- "latentError", "propagated", "overflow" \
- }
-#define CPER_HEADER_FLAG_TYPES_KEYS \
- (int[]) \
- { \
- 1, 2, 4 \
- }
+ (const char *[]){ "primary", \
+ "containmentWarning", \
+ "reset", \
+ "errorThresholdExceeded", \
+ "resourceNotAccessible", \
+ "latentError", \
+ "propagated", \
+ "overflow" }
+#define CPER_HEADER_FLAG_TYPES_KEYS (int[]){ 1, 2, 4 }
#define CPER_HEADER_FLAG_TYPES_VALUES \
- (const char *[]) \
- { \
- "HW_ERROR_FLAGS_RECOVERED", "HW_ERROR_FLAGS_PREVERR", \
- "HW_ERROR_FLAGS_SIMULATED" \
- }
+ (const char *[]){ "HW_ERROR_FLAGS_RECOVERED", \
+ "HW_ERROR_FLAGS_PREVERR", \
+ "HW_ERROR_FLAGS_SIMULATED" }
json_object *cper_to_ir(FILE *cper_file);
json_object *cper_single_section_to_ir(FILE *cper_section_file);
diff --git a/include/libcper/generator/gen-utils.h b/include/libcper/generator/gen-utils.h
index 8588cc1..7a015fa 100644
--- a/include/libcper/generator/gen-utils.h
+++ b/include/libcper/generator/gen-utils.h
@@ -10,11 +10,9 @@
#include <libcper/common-utils.h>
#define CPER_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 1, 16, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, \
- 26 \
- }
+ ( \
+ int[]){ 1, 16, 4, 5, 6, 7, 8, 9, 17, \
+ 18, 19, 20, 21, 22, 23, 24, 25, 26 }
size_t generate_random_section(void **location, size_t size);
UINT8 *generate_random_bytes(size_t size);
diff --git a/include/libcper/sections/cper-section-arm.h b/include/libcper/sections/cper-section-arm.h
index 173d0bc..8242f6c 100644
--- a/include/libcper/sections/cper-section-arm.h
+++ b/include/libcper/sections/cper-section-arm.h
@@ -11,186 +11,122 @@
#define ARM_SOCK_MASK 0xFF00000000
#define ARM_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "mpidrValid", "errorAffinityLevelValid", "runningStateValid", \
- "vendorSpecificInfoValid" \
- }
+ (const char *[]){ "mpidrValid", "errorAffinityLevelValid", \
+ "runningStateValid", "vendorSpecificInfoValid" }
#define ARM_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "multipleErrorValid", "flagsValid", "errorInformationValid", \
- "virtualFaultAddressValid", \
- "physicalFaultAddressValid" \
- }
+ (const char *[]){ "multipleErrorValid", "flagsValid", \
+ "errorInformationValid", "virtualFaultAddressValid", \
+ "physicalFaultAddressValid" }
#define ARM_ERROR_INFO_ENTRY_FLAGS_NAMES \
- (const char *[]) \
- { \
- "firstErrorCaptured", "lastErrorCaptured", "propagated", \
- "overflow" \
- }
+ (const char *[]){ "firstErrorCaptured", "lastErrorCaptured", \
+ "propagated", "overflow" }
#define ARM_CACHE_TLB_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "transactionTypeValid", "operationValid", "levelValid", \
- "processorContextCorruptValid", "correctedValid", \
- "precisePCValid", "restartablePCValid" \
+ (const char *[]){ \
+ "transactionTypeValid", "operationValid", \
+ "levelValid", "processorContextCorruptValid", \
+ "correctedValid", "precisePCValid", \
+ "restartablePCValid" \
}
#define ARM_BUS_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "transactionTypeValid", "operationValid", "levelValid", \
- "processorContextCorruptValid", "correctedValid", \
- "precisePCValid", "restartablePCValid", \
- "participationTypeValid", "timedOutValid", \
- "addressSpaceValid", "memoryAttributesValid", \
- "accessModeValid" \
- }
-#define ARM_ERROR_TRANSACTION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2 \
- }
+ (const char *[]){ "transactionTypeValid", \
+ "operationValid", \
+ "levelValid", \
+ "processorContextCorruptValid", \
+ "correctedValid", \
+ "precisePCValid", \
+ "restartablePCValid", \
+ "participationTypeValid", \
+ "timedOutValid", \
+ "addressSpaceValid", \
+ "memoryAttributesValid", \
+ "accessModeValid" }
+#define ARM_ERROR_TRANSACTION_TYPES_KEYS (int[]){ 0, 1, 2 }
#define ARM_ERROR_TRANSACTION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Instruction", "Data Access", "Generic" \
- }
-#define ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3 \
- }
+ (const char *[]){ "Instruction", "Data Access", "Generic" }
+#define ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS (int[]){ 0, 1, 2, 3 }
#define ARM_ERROR_INFO_ENTRY_INFO_TYPES_VALUES \
- (const char *[]) \
- { \
- "Cache Error", "TLB Error", "Bus Error", \
- "Micro-Architectural Error" \
- }
+ (const char *[]){ "Cache Error", "TLB Error", "Bus Error", \
+ "Micro-Architectural Error" }
#define ARM_CACHE_BUS_OPERATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 \
- }
-#define ARM_CACHE_BUS_OPERATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Generic Error", "Generic Read", "Generic Write", "Data Read", \
- "Data Write", "Instruction Fetch", "Prefetch", \
- "Eviction", "Snooping", "Snooped", "Management" \
- }
-#define ARM_TLB_OPERATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7, 8 \
- }
+ (int[]){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }
+#define ARM_CACHE_BUS_OPERATION_TYPES_VALUES \
+ (const char *[]){ "Generic Error", "Generic Read", "Generic Write", \
+ "Data Read", "Data Write", "Instruction Fetch", \
+ "Prefetch", "Eviction", "Snooping", \
+ "Snooped", "Management" }
+#define ARM_TLB_OPERATION_TYPES_KEYS (int[]){ 0, 1, 2, 3, 4, 5, 6, 7, 8 }
#define ARM_TLB_OPERATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Generic Error", "Generic Read", "Generic Write", "Data Read", \
- "Data Write", "Instruction Fetch", "Prefetch", \
- "Local Management Operation", \
- "External Management Operation" \
- }
-#define ARM_BUS_PARTICIPATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3 \
- }
+ (const char *[]){ "Generic Error", \
+ "Generic Read", \
+ "Generic Write", \
+ "Data Read", \
+ "Data Write", \
+ "Instruction Fetch", \
+ "Prefetch", \
+ "Local Management Operation", \
+ "External Management Operation" }
+#define ARM_BUS_PARTICIPATION_TYPES_KEYS (int[]){ 0, 1, 2, 3 }
#define ARM_BUS_PARTICIPATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Local Processor Originated Request", \
- "Local Processor Responded to Request", \
- "Local Processor Observed", "Generic" \
- }
-#define ARM_BUS_ADDRESS_SPACE_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 3 \
- }
+ (const char *[]){ "Local Processor Originated Request", \
+ "Local Processor Responded to Request", \
+ "Local Processor Observed", "Generic" }
+#define ARM_BUS_ADDRESS_SPACE_TYPES_KEYS (int[]){ 0, 1, 3 }
#define ARM_BUS_ADDRESS_SPACE_TYPES_VALUES \
- (const char *[]) \
- { \
- "External Memory Access", "Internal Memory Access", \
- "Device Memory Access" \
- }
+ (const char *[]){ "External Memory Access", "Internal Memory Access", \
+ "Device Memory Access" }
#define ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7, 8 \
- }
+ (int[]){ 0, 1, 2, 3, 4, 5, 6, 7, 8 }
#define ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_VALUES \
- (const char *[]) \
- { \
- "AArch32 General Purpose Registers", \
- "AArch32 EL1 Context Registers", \
- "AArch32 EL2 Context Registers", \
- "AArch32 Secure Context Registers", \
- "AArch64 General Purpose Registers", \
- "AArch64 EL1 Context Registers", \
- "AArch64 EL2 Context Registers", \
- "AArch64 EL3 Context Registers", \
- "Miscellaneous System Register Structure" \
- }
+ (const char *[]){ "AArch32 General Purpose Registers", \
+ "AArch32 EL1 Context Registers", \
+ "AArch32 EL2 Context Registers", \
+ "AArch32 Secure Context Registers", \
+ "AArch64 General Purpose Registers", \
+ "AArch64 EL1 Context Registers", \
+ "AArch64 EL2 Context Registers", \
+ "AArch64 EL3 Context Registers", \
+ "Miscellaneous System Register Structure" }
#define ARM_AARCH32_GPR_NAMES \
- (const char *[]) \
- { \
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
- "r10", "r11", "r12", "r13_sp", "r14_lr", "r15_pc" \
- }
+ (const char *[]){ "r0", "r1", "r2", "r3", "r4", "r5", \
+ "r6", "r7", "r8", "r9", "r10", "r11", \
+ "r12", "r13_sp", "r14_lr", "r15_pc" }
#define ARM_AARCH32_EL1_REGISTER_NAMES \
- (const char *[]) \
- { \
- "dfar", "dfsr", "ifar", "isr", "mair0", "mair1", "midr", \
- "mpidr", "nmrr", "prrr", "sctlr_ns", "spsr", \
- "spsr_abt", "spsr_fiq", "spsr_irq", "spsr_svc", \
- "spsr_und", "tpidrprw", "tpidruro", "tpidrurw", \
- "ttbcr", "ttbr0", "ttbr1", "dacr" \
- }
+ (const char *[]){ "dfar", "dfsr", "ifar", "isr", \
+ "mair0", "mair1", "midr", "mpidr", \
+ "nmrr", "prrr", "sctlr_ns", "spsr", \
+ "spsr_abt", "spsr_fiq", "spsr_irq", "spsr_svc", \
+ "spsr_und", "tpidrprw", "tpidruro", "tpidrurw", \
+ "ttbcr", "ttbr0", "ttbr1", "dacr" }
#define ARM_AARCH32_EL2_REGISTER_NAMES \
- (const char *[]) \
- { \
- "elr_hyp", "hamair0", "hamair1", "hcr", "hcr2", "hdfar", \
- "hifar", "hpfar", "hsr", "htcr", "htpidr", "httbr", \
- "spsr_hyp", "vtcr", "vttbr", "dacr32_el2" \
- }
+ (const char *[]){ "elr_hyp", "hamair0", "hamair1", "hcr", \
+ "hcr2", "hdfar", "hifar", "hpfar", \
+ "hsr", "htcr", "htpidr", "httbr", \
+ "spsr_hyp", "vtcr", "vttbr", "dacr32_el2" }
#define ARM_AARCH32_SECURE_REGISTER_NAMES \
- (const char *[]) \
- { \
- "sctlr_s", "spsr_mon" \
- }
+ (const char *[]){ "sctlr_s", "spsr_mon" }
#define ARM_AARCH64_GPR_NAMES \
- (const char *[]) \
- { \
- "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", \
- "x10", "x11", "x12", "x13", "x14", "x15", "x16", \
- "x17", "x18", "x19", "x20", "x21", "x22", "x23", \
- "x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp" \
- }
+ (const char *[]){ "x0", "x1", "x2", "x3", "x4", "x5", "x6", \
+ "x7", "x8", "x9", "x10", "x11", "x12", "x13", \
+ "x14", "x15", "x16", "x17", "x18", "x19", "x20", \
+ "x21", "x22", "x23", "x24", "x25", "x26", "x27", \
+ "x28", "x29", "x30", "sp" }
#define ARM_AARCH64_EL1_REGISTER_NAMES \
- (const char *[]) \
- { \
- "elr_el1", "esr_el1", "far_el1", "isr_el1", "mair_el1", \
- "midr_el1", "mpidr_el1", "sctlr_el1", "sp_el0", \
- "sp_el1", "spsr_el1", "tcr_el1", "tpidr_el0", \
- "tpidr_el1", "tpidrro_el0", "ttbr0_el1", "ttbr1_el1" \
+ (const char *[]){ \
+ "elr_el1", "esr_el1", "far_el1", "isr_el1", \
+ "mair_el1", "midr_el1", "mpidr_el1", "sctlr_el1", \
+ "sp_el0", "sp_el1", "spsr_el1", "tcr_el1", \
+ "tpidr_el0", "tpidr_el1", "tpidrro_el0", "ttbr0_el1", \
+ "ttbr1_el1" \
}
#define ARM_AARCH64_EL2_REGISTER_NAMES \
- (const char *[]) \
- { \
- "elr_el2", "esr_el2", "far_el2", "hacr_el2", "hcr_el2", \
- "hpfar_el2", "mair_el2", "sctlr_el2", "sp_el2", \
- "spsr_el2", "tcr_el2", "tpidr_el2", "ttbr0_el2", \
- "vtcr_el2", "vttbr_el2" \
- }
+ (const char *[]){ "elr_el2", "esr_el2", "far_el2", "hacr_el2", \
+ "hcr_el2", "hpfar_el2", "mair_el2", "sctlr_el2", \
+ "sp_el2", "spsr_el2", "tcr_el2", "tpidr_el2", \
+ "ttbr0_el2", "vtcr_el2", "vttbr_el2" }
#define ARM_AARCH64_EL3_REGISTER_NAMES \
- (const char *[]) \
- { \
- "elr_el3", "esr_el3", "far_el3", "mair_el3", "sctlr_el3", \
- "sp_el3", "spsr_el3", "tcr_el3", "tpidr_el3", \
- "ttbr0_el3" \
- }
+ (const char *[]){ "elr_el3", "esr_el3", "far_el3", "mair_el3", \
+ "sctlr_el3", "sp_el3", "spsr_el3", "tcr_el3", \
+ "tpidr_el3", "ttbr0_el3" }
json_object *cper_section_arm_to_ir(void *section);
void ir_section_arm_to_cper(json_object *section, FILE *out);
diff --git a/include/libcper/sections/cper-section-ccix-per.h b/include/libcper/sections/cper-section-ccix-per.h
index 80f7ae4..6246554 100644
--- a/include/libcper/sections/cper-section-ccix-per.h
+++ b/include/libcper/sections/cper-section-ccix-per.h
@@ -9,10 +9,8 @@
#include <libcper/Cper.h>
#define CCIX_PER_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "ccixSourceIDValid", "ccixPortIDValid", "ccixPERLogValid" \
- }
+ (const char *[]){ "ccixSourceIDValid", "ccixPortIDValid", \
+ "ccixPERLogValid" }
///
/// CCIX PER Log Error Section
diff --git a/include/libcper/sections/cper-section-cxl-component.h b/include/libcper/sections/cper-section-cxl-component.h
index 2e60294..d5fa315 100644
--- a/include/libcper/sections/cper-section-cxl-component.h
+++ b/include/libcper/sections/cper-section-cxl-component.h
@@ -9,11 +9,8 @@
#include <libcper/Cper.h>
#define CXL_COMPONENT_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "deviceIDValid", "deviceSerialValid", \
- "cxlComponentEventLogValid" \
- }
+ (const char *[]){ "deviceIDValid", "deviceSerialValid", \
+ "cxlComponentEventLogValid" }
///
/// CXL Generic Component Error Section
diff --git a/include/libcper/sections/cper-section-cxl-protocol.h b/include/libcper/sections/cper-section-cxl-protocol.h
index 28e745b..ed37d96 100644
--- a/include/libcper/sections/cper-section-cxl-protocol.h
+++ b/include/libcper/sections/cper-section-cxl-protocol.h
@@ -9,22 +9,16 @@
#include <libcper/Cper.h>
#define CXL_PROTOCOL_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "cxlAgentTypeValid", "cxlAgentAddressValid", "deviceIDValid", \
- "deviceSerialValid", "capabilityStructureValid", \
- "cxlDVSECValid", "cxlErrorLogValid" \
- }
-#define CXL_PROTOCOL_ERROR_AGENT_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1 \
- }
+ (const char *[]){ "cxlAgentTypeValid", \
+ "cxlAgentAddressValid", \
+ "deviceIDValid", \
+ "deviceSerialValid", \
+ "capabilityStructureValid", \
+ "cxlDVSECValid", \
+ "cxlErrorLogValid" }
+#define CXL_PROTOCOL_ERROR_AGENT_TYPES_KEYS (int[]){ 0, 1 }
#define CXL_PROTOCOL_ERROR_AGENT_TYPES_VALUES \
- (const char *[]) \
- { \
- "CXL 1.1 Device", "CXL 1.1 Host Downstream Port" \
- }
+ (const char *[]){ "CXL 1.1 Device", "CXL 1.1 Host Downstream Port" }
#define CXL_PROTOCOL_ERROR_DEVICE_AGENT 0
#define CXL_PROTOCOL_ERROR_HOST_DOWNSTREAM_PORT_AGENT 1
diff --git a/include/libcper/sections/cper-section-dmar-generic.h b/include/libcper/sections/cper-section-dmar-generic.h
index 5a6dd4f..5c1cadf 100644
--- a/include/libcper/sections/cper-section-dmar-generic.h
+++ b/include/libcper/sections/cper-section-dmar-generic.h
@@ -9,65 +9,38 @@
#include <libcper/Cper.h>
#define DMAR_GENERIC_ERROR_FAULT_REASON_TYPES_KEYS \
- (int[]) \
- { \
- 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xA, 0xB \
- }
+ (int[]){ 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xA, 0xB }
#define DMAR_GENERIC_ERROR_FAULT_REASON_TYPES_VALUES \
- (const char *[]) \
- { \
- "DMT Entry Missing", "DMT Entry Invalid", "DMT Access Error", \
- "DMT Reserved Bit Invalid", \
- "DMA Address Out of Bounds", "Invalid Read/Write", \
- "Invalid Device Request", "ATT Access Error", \
- "ATT Reserved Bit Invalid", "Illegal Command", \
- "Command Buffer Access Error" \
+ (const char *[]){ \
+ "DMT Entry Missing", "DMT Entry Invalid", \
+ "DMT Access Error", "DMT Reserved Bit Invalid", \
+ "DMA Address Out of Bounds", "Invalid Read/Write", \
+ "Invalid Device Request", "ATT Access Error", \
+ "ATT Reserved Bit Invalid", "Illegal Command", \
+ "Command Buffer Access Error" \
}
-#define DMAR_GENERIC_ERROR_FAULT_REASON_TYPES_DESCRIPTIONS \
- (const char *[]) \
- { \
- "Domain mapping table entry is not present.", \
- "Invalid domain mapping table entry.", \
- "DMAr unit's attempt to access the domain mapping table resulted in an error.", \
- "Reserved bit set to non-zero value in the domain mapping table.", \
- "DMA request to access an address beyond the device address width.", \
- "Invalid read or write access.", \
- "Invalid device request.", \
- "DMAr unit's attempt to access the address translation table resulted in an error.", \
- "Reserved bit set to non-zero value in the address translation table.", \
- "Illegal command error.", \
- "DMAr unit's attempt to access the command buffer resulted in an error." \
+#define DMAR_GENERIC_ERROR_FAULT_REASON_TYPES_DESCRIPTIONS \
+ (const char *[]){ \
+ "Domain mapping table entry is not present.", \
+ "Invalid domain mapping table entry.", \
+ "DMAr unit's attempt to access the domain mapping table resulted in an error.", \
+ "Reserved bit set to non-zero value in the domain mapping table.", \
+ "DMA request to access an address beyond the device address width.", \
+ "Invalid read or write access.", \
+ "Invalid device request.", \
+ "DMAr unit's attempt to access the address translation table resulted in an error.", \
+ "Reserved bit set to non-zero value in the address translation table.", \
+ "Illegal command error.", \
+ "DMAr unit's attempt to access the command buffer resulted in an error." \
}
-#define DMAR_GENERIC_ERROR_ACCESS_TYPES_KEYS \
- (int[]) \
- { \
- 0x0, 0x1 \
- }
+#define DMAR_GENERIC_ERROR_ACCESS_TYPES_KEYS (int[]){ 0x0, 0x1 }
#define DMAR_GENERIC_ERROR_ACCESS_TYPES_VALUES \
- (const char *[]) \
- { \
- "DMA Write", "DMA Read" \
- }
-#define DMAR_GENERIC_ERROR_ADDRESS_TYPES_KEYS \
- (int[]) \
- { \
- 0x0, 0x1 \
- }
+ (const char *[]){ "DMA Write", "DMA Read" }
+#define DMAR_GENERIC_ERROR_ADDRESS_TYPES_KEYS (int[]){ 0x0, 0x1 }
#define DMAR_GENERIC_ERROR_ADDRESS_TYPES_VALUES \
- (const char *[]) \
- { \
- "Untranslated Request", "Translation Request" \
- }
-#define DMAR_GENERIC_ERROR_ARCH_TYPES_KEYS \
- (int[]) \
- { \
- 0x0, 0x1 \
- }
-#define DMAR_GENERIC_ERROR_ARCH_TYPES_VALUES \
- (const char *[]) \
- { \
- "VT-d", "IOMMU" \
- }
+ (const char *[]){ "Untranslated Request", "Translation Request" }
+#define DMAR_GENERIC_ERROR_ARCH_TYPES_KEYS (int[]){ 0x0, 0x1 }
+#define DMAR_GENERIC_ERROR_ARCH_TYPES_VALUES (const char *[]){ "VT-d", "IOMMU" }
json_object *cper_section_dmar_generic_to_ir(void *section);
void ir_section_dmar_generic_to_cper(json_object *section, FILE *out);
diff --git a/include/libcper/sections/cper-section-dmar-vtd.h b/include/libcper/sections/cper-section-dmar-vtd.h
index 5c3c876..907bba8 100644
--- a/include/libcper/sections/cper-section-dmar-vtd.h
+++ b/include/libcper/sections/cper-section-dmar-vtd.h
@@ -8,16 +8,9 @@
#include <json.h>
#include <libcper/Cper.h>
-#define VTD_FAULT_RECORD_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1 \
- }
+#define VTD_FAULT_RECORD_TYPES_KEYS (int[]){ 0, 1 }
#define VTD_FAULT_RECORD_TYPES_VALUES \
- (const char *[]) \
- { \
- "Write Request", "Read/AtomicOp Request" \
- }
+ (const char *[]){ "Write Request", "Read/AtomicOp Request" }
typedef struct {
UINT64 Resv1 : 12;
diff --git a/include/libcper/sections/cper-section-firmware.h b/include/libcper/sections/cper-section-firmware.h
index ea1e19a..8f7f0e9 100644
--- a/include/libcper/sections/cper-section-firmware.h
+++ b/include/libcper/sections/cper-section-firmware.h
@@ -8,18 +8,11 @@
#include <json.h>
#include <libcper/Cper.h>
-#define FIRMWARE_ERROR_RECORD_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2 \
- }
+#define FIRMWARE_ERROR_RECORD_TYPES_KEYS (int[]){ 0, 1, 2 }
#define FIRMWARE_ERROR_RECORD_TYPES_VALUES \
- (const char *[]) \
- { \
- "IPF SAL Error Record", \
- "SOC Firmware Error Record (Type1 Legacy)", \
- "SOC Firmware Error Record (Type2)" \
- }
+ (const char *[]){ "IPF SAL Error Record", \
+ "SOC Firmware Error Record (Type1 Legacy)", \
+ "SOC Firmware Error Record (Type2)" }
json_object *cper_section_firmware_to_ir(void *section);
void ir_section_firmware_to_cper(json_object *section, FILE *out);
diff --git a/include/libcper/sections/cper-section-generic.h b/include/libcper/sections/cper-section-generic.h
index 6ec3ba4..dce583d 100644
--- a/include/libcper/sections/cper-section-generic.h
+++ b/include/libcper/sections/cper-section-generic.h
@@ -8,63 +8,35 @@
#include <json.h>
#include <libcper/Cper.h>
-#define GENERIC_PROC_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2 \
- }
-#define GENERIC_PROC_TYPES_VALUES \
- (const char *[]) \
- { \
- "IA32/X64", "IA64", "ARM" \
- }
-#define GENERIC_ISA_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4 \
- }
+#define GENERIC_PROC_TYPES_KEYS (int[]){ 0, 1, 2 }
+#define GENERIC_PROC_TYPES_VALUES (const char *[]){ "IA32/X64", "IA64", "ARM" }
+#define GENERIC_ISA_TYPES_KEYS (int[]){ 0, 1, 2, 3, 4 }
#define GENERIC_ISA_TYPES_VALUES \
- (const char *[]) \
- { \
- "IA32", "IA64", "X64", "ARM A32/T32", "ARM A64" \
- }
-#define GENERIC_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 4, 8 \
- }
+ (const char *[]){ "IA32", "IA64", "X64", "ARM A32/T32", "ARM A64" }
+#define GENERIC_ERROR_TYPES_KEYS (int[]){ 0, 1, 2, 4, 8 }
#define GENERIC_ERROR_TYPES_VALUES \
- (const char *[]) \
- { \
- "Unknown", "Cache Error", "TLB Error", "Bus Error", \
- "Micro-Architectural Error" \
- }
-#define GENERIC_OPERATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3 \
- }
+ (const char *[]){ "Unknown", "Cache Error", "TLB Error", "Bus Error", \
+ "Micro-Architectural Error" }
+#define GENERIC_OPERATION_TYPES_KEYS (int[]){ 0, 1, 2, 3 }
#define GENERIC_OPERATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Unknown or Generic", "Data Read", "Data Write", \
- "Instruction Execution" \
- }
+ (const char *[]){ "Unknown or Generic", "Data Read", "Data Write", \
+ "Instruction Execution" }
#define GENERIC_VALIDATION_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "processorTypeValid", "processorISAValid", \
- "processorErrorTypeValid", "operationValid", \
- "flagsValid", "levelValid", "cpuVersionValid", \
- "cpuBrandInfoValid", "cpuIDValid", \
- "targetAddressValid", "requestorIDValid", \
- "responderIDValid", "instructionIPValid" \
- }
+ (const char *[]){ "processorTypeValid", \
+ "processorISAValid", \
+ "processorErrorTypeValid", \
+ "operationValid", \
+ "flagsValid", \
+ "levelValid", \
+ "cpuVersionValid", \
+ "cpuBrandInfoValid", \
+ "cpuIDValid", \
+ "targetAddressValid", \
+ "requestorIDValid", \
+ "responderIDValid", \
+ "instructionIPValid" }
#define GENERIC_FLAGS_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "restartable", "preciseIP", "overflow", "corrected" \
- }
+ (const char *[]){ "restartable", "preciseIP", "overflow", "corrected" }
json_object *cper_section_generic_to_ir(void *section);
void ir_section_generic_to_cper(json_object *section, FILE *out);
diff --git a/include/libcper/sections/cper-section-ia32x64.h b/include/libcper/sections/cper-section-ia32x64.h
index 4da2517..77dd331 100644
--- a/include/libcper/sections/cper-section-ia32x64.h
+++ b/include/libcper/sections/cper-section-ia32x64.h
@@ -9,97 +9,61 @@
#include <libcper/Cper.h>
#define IA32X64_PROCESSOR_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "checkInfoValid", "targetAddressIDValid", "requestorIDValid", \
- "responderIDValid", "instructionPointerValid" \
- }
+ (const char *[]){ "checkInfoValid", "targetAddressIDValid", \
+ "requestorIDValid", "responderIDValid", \
+ "instructionPointerValid" }
#define IA32X64_CHECK_INFO_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "transactionTypeValid", "operationValid", "levelValid", \
- "processorContextCorruptValid", "uncorrectedValid", \
- "preciseIPValid", "restartableIPValid", \
- "overflowValid", "participationTypeValid", \
- "timedOutValid", "addressSpaceValid" \
- }
-#define IA32X64_CHECK_INFO_MS_CHECK_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "errorTypeValid", "processorContextCorruptValid", \
- "uncorrectedValid", "preciseIPValid", \
- "restartableIPValid", "overflowValid" \
- }
-#define IA32X64_CHECK_INFO_TRANSACTION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2 \
- }
+ (const char *[]){ "transactionTypeValid", \
+ "operationValid", \
+ "levelValid", \
+ "processorContextCorruptValid", \
+ "uncorrectedValid", \
+ "preciseIPValid", \
+ "restartableIPValid", \
+ "overflowValid", \
+ "participationTypeValid", \
+ "timedOutValid", \
+ "addressSpaceValid" }
+#define IA32X64_CHECK_INFO_MS_CHECK_VALID_BITFIELD_NAMES \
+ (const char *[]){ "errorTypeValid", "processorContextCorruptValid", \
+ "uncorrectedValid", "preciseIPValid", \
+ "restartableIPValid", "overflowValid" }
+#define IA32X64_CHECK_INFO_TRANSACTION_TYPES_KEYS (int[]){ 0, 1, 2 }
#define IA32X64_CHECK_INFO_TRANSACTION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Instruction", "Data Access", "Generic" \
- }
+ (const char *[]){ "Instruction", "Data Access", "Generic" }
#define IA32X64_CHECK_INFO_OPERATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7, 8 \
- }
-#define IA32X64_CHECK_INFO_OPERATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Generic Error", "Generic Read", "Generic Write", "Data Read", \
- "Data Write", "Instruction Fetch", "Prefetch", \
- "Eviction", "Snoop" \
- }
-#define IA32X64_BUS_CHECK_INFO_PARTICIPATION_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3 \
- }
+ (int[]){ 0, 1, 2, 3, 4, 5, 6, 7, 8 }
+#define IA32X64_CHECK_INFO_OPERATION_TYPES_VALUES \
+ (const char *[]){ "Generic Error", "Generic Read", "Generic Write", \
+ "Data Read", "Data Write", "Instruction Fetch", \
+ "Prefetch", "Eviction", "Snoop" }
+#define IA32X64_BUS_CHECK_INFO_PARTICIPATION_TYPES_KEYS (int[]){ 0, 1, 2, 3 }
#define IA32X64_BUS_CHECK_INFO_PARTICIPATION_TYPES_VALUES \
- (const char *[]) \
- { \
- "Local processor originated request", \
- "Local processor responded to request", \
- "Local processor observed", "Generic" \
- }
-#define IA32X64_BUS_CHECK_INFO_ADDRESS_SPACE_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3 \
- }
+ (const char *[]){ "Local processor originated request", \
+ "Local processor responded to request", \
+ "Local processor observed", "Generic" }
+#define IA32X64_BUS_CHECK_INFO_ADDRESS_SPACE_TYPES_KEYS (int[]){ 0, 1, 2, 3 }
#define IA32X64_BUS_CHECK_INFO_ADDRESS_SPACE_TYPES_VALUES \
- (const char *[]) \
- { \
- "Memory Access", "Reserved", "I/O", "Other Transaction" \
- }
-#define IA32X64_MS_CHECK_INFO_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5 \
- }
+ (const char *[]){ "Memory Access", "Reserved", "I/O", \
+ "Other Transaction" }
+#define IA32X64_MS_CHECK_INFO_ERROR_TYPES_KEYS (int[]){ 0, 1, 2, 3, 4, 5 }
#define IA32X64_MS_CHECK_INFO_ERROR_TYPES_VALUES \
- (const char *[]) \
- { \
- "No Error", "Unclassified", "Microcode ROM Parity Error", \
- "External Error", "FRC Error", "Internal Unclassified" \
- }
-#define IA32X64_REGISTER_CONTEXT_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7 \
- }
+ (const char *[]){ "No Error", \
+ "Unclassified", \
+ "Microcode ROM Parity Error", \
+ "External Error", \
+ "FRC Error", \
+ "Internal Unclassified" }
+#define IA32X64_REGISTER_CONTEXT_TYPES_KEYS (int[]){ 0, 1, 2, 3, 4, 5, 6, 7 }
#define IA32X64_REGISTER_CONTEXT_TYPES_VALUES \
- (const char *[]) \
- { \
- "Unclassified Data", "MSR Registers", \
- "32-bit Mode Execution Context", \
- "64-bit Mode Execution Context", "FXSave Context", \
- "32-bit Mode Debug Registers", \
- "64-bit Mode Debug Registers", \
- "Memory Mapper Registers" \
- }
+ (const char *[]){ "Unclassified Data", \
+ "MSR Registers", \
+ "32-bit Mode Execution Context", \
+ "64-bit Mode Execution Context", \
+ "FXSave Context", \
+ "32-bit Mode Debug Registers", \
+ "64-bit Mode Debug Registers", \
+ "Memory Mapper Registers" }
typedef struct {
UINT64 Eax;
diff --git a/include/libcper/sections/cper-section-ipf.h b/include/libcper/sections/cper-section-ipf.h
index 95b3012..86e396c 100644
--- a/include/libcper/sections/cper-section-ipf.h
+++ b/include/libcper/sections/cper-section-ipf.h
@@ -9,18 +9,12 @@
#include <libcper/Cper.h>
#define IPF_MOD_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "checkInfoValid", "requestorIdentifierValid", \
- "responderIdentifierValid", "targetIdentifierValid", \
- "preciseIPValid" \
- }
+ (const char *[]){ "checkInfoValid", "requestorIdentifierValid", \
+ "responderIdentifierValid", "targetIdentifierValid", \
+ "preciseIPValid" }
#define IPF_PSI_STATIC_INFO_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "minstateValid", "brValid", "crValid", "arValid", "rrValid", \
- "frValid" \
- }
+ (const char *[]){ "minstateValid", "brValid", "crValid", \
+ "arValid", "rrValid", "frValid" }
///
/// IPF Error Record Section
diff --git a/include/libcper/sections/cper-section-memory.h b/include/libcper/sections/cper-section-memory.h
index 71991f2..f7b7dea 100644
--- a/include/libcper/sections/cper-section-memory.h
+++ b/include/libcper/sections/cper-section-memory.h
@@ -9,49 +9,70 @@
#include <libcper/Cper.h>
#define MEMORY_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "errorStatusValid", "physicalAddressValid", \
- "physicalAddressMaskValid", "nodeValid", "cardValid", \
- "moduleValid", "bankValid", "deviceValid", "rowValid", \
- "columnValid", "bitPositionValid", \
- "platformRequestorIDValid", \
- "platformResponderIDValid", \
- "memoryPlatformTargetValid", "memoryErrorTypeValid", \
- "rankNumberValid", "cardHandleValid", \
- "moduleHandleValid", "extendedRowBitsValid", \
- "bankGroupValid", "bankAddressValid", \
- "chipIdentificationValid" \
- }
+ (const char *[]){ "errorStatusValid", \
+ "physicalAddressValid", \
+ "physicalAddressMaskValid", \
+ "nodeValid", \
+ "cardValid", \
+ "moduleValid", \
+ "bankValid", \
+ "deviceValid", \
+ "rowValid", \
+ "columnValid", \
+ "bitPositionValid", \
+ "platformRequestorIDValid", \
+ "platformResponderIDValid", \
+ "memoryPlatformTargetValid", \
+ "memoryErrorTypeValid", \
+ "rankNumberValid", \
+ "cardHandleValid", \
+ "moduleHandleValid", \
+ "extendedRowBitsValid", \
+ "bankGroupValid", \
+ "bankAddressValid", \
+ "chipIdentificationValid" }
#define MEMORY_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 \
- }
+ (int[]){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
#define MEMORY_ERROR_TYPES_VALUES \
- (const char *[]) \
- { \
- "Unknown", "No Error", "Single-bit ECC", "Multi-bit ECC", \
- "Single-symbol ChipKill ECC", \
- "Multi-symbol ChipKill ECC", "Master Abort", \
- "Target Abort", "Parity Error", "Watchdog Timeout", \
- "Invalid Address", "Mirror Broken", "Memory Sparing", \
- "Scrub Corrected Error", "Scrub Uncorrected Error", \
- "Physical Memory Map-out Event" \
- }
+ (const char *[]){ "Unknown", \
+ "No Error", \
+ "Single-bit ECC", \
+ "Multi-bit ECC", \
+ "Single-symbol ChipKill ECC", \
+ "Multi-symbol ChipKill ECC", \
+ "Master Abort", \
+ "Target Abort", \
+ "Parity Error", \
+ "Watchdog Timeout", \
+ "Invalid Address", \
+ "Mirror Broken", \
+ "Memory Sparing", \
+ "Scrub Corrected Error", \
+ "Scrub Uncorrected Error", \
+ "Physical Memory Map-out Event" }
#define MEMORY_ERROR_2_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "errorStatusValid", "physicalAddressValid", \
- "physicalAddressMaskValid", "nodeValid", "cardValid", \
- "moduleValid", "bankValid", "deviceValid", "rowValid", \
- "columnValid", "rankValid", "bitPositionValid", \
- "chipIDValid", "memoryErrorTypeValid", "statusValid", \
- "requestorIDValid", "responderIDValid", \
- "targetIDValid", "cardHandleValid", \
- "moduleHandleValid", "bankGroupValid", \
- "bankAddressValid" \
- }
+ (const char *[]){ "errorStatusValid", \
+ "physicalAddressValid", \
+ "physicalAddressMaskValid", \
+ "nodeValid", \
+ "cardValid", \
+ "moduleValid", \
+ "bankValid", \
+ "deviceValid", \
+ "rowValid", \
+ "columnValid", \
+ "rankValid", \
+ "bitPositionValid", \
+ "chipIDValid", \
+ "memoryErrorTypeValid", \
+ "statusValid", \
+ "requestorIDValid", \
+ "responderIDValid", \
+ "targetIDValid", \
+ "cardHandleValid", \
+ "moduleHandleValid", \
+ "bankGroupValid", \
+ "bankAddressValid" }
json_object *cper_section_platform_memory_to_ir(void *section);
json_object *cper_section_platform_memory2_to_ir(void *section);
diff --git a/include/libcper/sections/cper-section-pci-bus.h b/include/libcper/sections/cper-section-pci-bus.h
index 34fd368..487e3d3 100644
--- a/include/libcper/sections/cper-section-pci-bus.h
+++ b/include/libcper/sections/cper-section-pci-bus.h
@@ -9,27 +9,21 @@
#include <libcper/Cper.h>
#define PCI_BUS_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "errorStatusValid", "errorTypeValid", "busIDValid", \
- "busAddressValid", "busDataValid", "commandValid", \
- "requestorIDValid", "completerIDValid", \
- "targetIDValid" \
- }
-#define PCI_BUS_ERROR_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 2, 3, 4, 5, 6, 7 \
- }
+ (const char *[]){ "errorStatusValid", "errorTypeValid", \
+ "busIDValid", "busAddressValid", \
+ "busDataValid", "commandValid", \
+ "requestorIDValid", "completerIDValid", \
+ "targetIDValid" }
+#define PCI_BUS_ERROR_TYPES_KEYS (int[]){ 0, 1, 2, 3, 4, 5, 6, 7 }
#define PCI_BUS_ERROR_TYPES_VALUES \
- (const char *[]) \
- { \
- "Unknown/OEM Specific Error", "Data Parity Error", \
- "System Error", "Master Abort", \
- "Bus Timeout/No Device Present (No DEVSEL#)", \
- "Master Data Parity Error", "Address Parity Error", \
- "Command Parity Error" \
- }
+ (const char *[]){ "Unknown/OEM Specific Error", \
+ "Data Parity Error", \
+ "System Error", \
+ "Master Abort", \
+ "Bus Timeout/No Device Present (No DEVSEL#)", \
+ "Master Data Parity Error", \
+ "Address Parity Error", \
+ "Command Parity Error" }
json_object *cper_section_pci_bus_to_ir(void *section);
void ir_section_pci_bus_to_cper(json_object *section, FILE *out);
diff --git a/include/libcper/sections/cper-section-pci-dev.h b/include/libcper/sections/cper-section-pci-dev.h
index 7396aa7..6da7140 100644
--- a/include/libcper/sections/cper-section-pci-dev.h
+++ b/include/libcper/sections/cper-section-pci-dev.h
@@ -9,11 +9,9 @@
#include <libcper/Cper.h>
#define PCI_DEV_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "errorStatusValid", "idInfoValid", "memoryNumberValid", \
- "ioNumberValid", "registerDataPairsValid" \
- }
+ (const char *[]){ "errorStatusValid", "idInfoValid", \
+ "memoryNumberValid", "ioNumberValid", \
+ "registerDataPairsValid" }
///
/// PCI/PCI-X Device Error Section
diff --git a/include/libcper/sections/cper-section-pcie.h b/include/libcper/sections/cper-section-pcie.h
index cc54ebd..a3741a5 100644
--- a/include/libcper/sections/cper-section-pcie.h
+++ b/include/libcper/sections/cper-section-pcie.h
@@ -9,29 +9,25 @@
#include <libcper/Cper.h>
#define PCIE_ERROR_VALID_BITFIELD_NAMES \
- (const char *[]) \
- { \
- "portTypeValid", "versionValid", "commandStatusValid", \
- "deviceIDValid", "deviceSerialNumberValid", \
- "bridgeControlStatusValid", \
- "capabilityStructureStatusValid", "aerInfoValid" \
- }
-#define PCIE_ERROR_PORT_TYPES_KEYS \
- (int[]) \
- { \
- 0, 1, 4, 5, 6, 7, 8, 9, 10 \
- }
+ (const char *[]){ "portTypeValid", \
+ "versionValid", \
+ "commandStatusValid", \
+ "deviceIDValid", \
+ "deviceSerialNumberValid", \
+ "bridgeControlStatusValid", \
+ "capabilityStructureStatusValid", \
+ "aerInfoValid" }
+#define PCIE_ERROR_PORT_TYPES_KEYS (int[]){ 0, 1, 4, 5, 6, 7, 8, 9, 10 }
#define PCIE_ERROR_PORT_TYPES_VALUES \
- (const char *[]) \
- { \
- "PCI Express End Point", "Legacy PCI End Point Device", \
- "Root Port", "Upstream Switch Port", \
- "Downstream Switch Port", \
- "PCI Express to PCI/PCI-X Bridge", \
- "PCI/PCI-X Bridge to PCI Express Bridge", \
- "Root Complex Integrated Endpoint Device", \
- "Root Complex Event Collector" \
- }
+ (const char *[]){ "PCI Express End Point", \
+ "Legacy PCI End Point Device", \
+ "Root Port", \
+ "Upstream Switch Port", \
+ "Downstream Switch Port", \
+ "PCI Express to PCI/PCI-X Bridge", \
+ "PCI/PCI-X Bridge to PCI Express Bridge", \
+ "Root Complex Integrated Endpoint Device", \
+ "Root Complex Event Collector" }
json_object *cper_section_pcie_to_ir(void *section);
void ir_section_pcie_to_cper(json_object *section, FILE *out);