diff --git a/generator/sections/gen-section-pcie.c b/generator/sections/gen-section-pcie.c
index 5f67c09..d7b34ec 100644
--- a/generator/sections/gen-section-pcie.c
+++ b/generator/sections/gen-section-pcie.c
@@ -26,8 +26,15 @@
     *version &= 0xFFFF; //Version bytes 2-3
     UINT32* reserved = (UINT32*)(bytes + 20);
     *reserved = 0; //Reserved bytes 20-24
+    *(bytes + 37) &= ~0b111; //Device ID byte 13 bits 0-3
     *(bytes + 39) = 0; //Device ID byte 15
 
+    //Set expected values.
+    int minor = rand() % 128;
+    int major = rand() % 128;
+    *version = int_to_bcd(minor);
+    *version |= int_to_bcd(major) << 8;
+
     //Fix values that could be above range.
     UINT32* port_type = (UINT32*)(bytes + 8);
     *port_type = PCIE_PORT_TYPES[rand() % (sizeof(PCIE_PORT_TYPES) / sizeof(int))];
diff --git a/sections/cper-section-ccix-per.c b/sections/cper-section-ccix-per.c
index 1df7d1b..072c5d2 100644
--- a/sections/cper-section-ccix-per.c
+++ b/sections/cper-section-ccix-per.c
@@ -61,7 +61,7 @@
     section_cper->CcixPortId = (UINT8)json_object_get_int(json_object_object_get(section, "ccixPortID"));
     
     //Write header out to stream.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_CCIX_PER_LOG_DATA), 1, out);
     fflush(out);
 
     //Write CCIX PER log itself to stream.
diff --git a/sections/cper-section-cxl-component.c b/sections/cper-section-cxl-component.c
index 681fdae..934a1cf 100644
--- a/sections/cper-section-cxl-component.c
+++ b/sections/cper-section-cxl-component.c
@@ -86,7 +86,7 @@
     section_cper->DeviceSerial = json_object_get_uint64(json_object_object_get(section, "deviceSerial"));
 
     //Write header out to stream.
-    fwrite(section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_CXL_COMPONENT_EVENT_HEADER), 1, out);
     fflush(out);
 
     //CXL component event log, decoded from base64.
diff --git a/sections/cper-section-cxl-protocol.c b/sections/cper-section-cxl-protocol.c
index 4f1d932..f9b0550 100644
--- a/sections/cper-section-cxl-protocol.c
+++ b/sections/cper-section-cxl-protocol.c
@@ -163,7 +163,7 @@
     section_cper->CxlErrorLogLength = (UINT16)json_object_get_int(json_object_object_get(section, "errorLogLength"));
 
     //Write header to stream.
-    fwrite(section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_CXL_PROTOCOL_ERROR_DATA), 1, out);
     fflush(out);
 
     //DVSEC out to stream.
diff --git a/sections/cper-section-dmar-generic.c b/sections/cper-section-dmar-generic.c
index 6d2460d..58e002c 100644
--- a/sections/cper-section-dmar-generic.c
+++ b/sections/cper-section-dmar-generic.c
@@ -71,7 +71,7 @@
     section_cper->DeviceAddr = json_object_get_uint64(json_object_object_get(section, "deviceAddress"));
 
     //Write to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_DMAR_GENERIC_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-dmar-iommu.c b/sections/cper-section-dmar-iommu.c
index 0298df0..2861053 100644
--- a/sections/cper-section-dmar-iommu.c
+++ b/sections/cper-section-dmar-iommu.c
@@ -79,7 +79,7 @@
     section_cper->PteL6 = json_object_get_uint64(json_object_object_get(section, "pageTableEntry_Level6"));
 
     //Write to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_IOMMU_DMAR_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-dmar-vtd.c b/sections/cper-section-dmar-vtd.c
index c15c5f4..b57d1ba 100644
--- a/sections/cper-section-dmar-vtd.c
+++ b/sections/cper-section-dmar-vtd.c
@@ -135,7 +135,7 @@
     section_cper->PteL6 = json_object_get_uint64(json_object_object_get(section, "pageTableEntry_Level6"));
 
     //Write to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_DIRECTED_IO_DMAR_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-firmware.c b/sections/cper-section-firmware.c
index 02795dd..c7c91f5 100644
--- a/sections/cper-section-firmware.c
+++ b/sections/cper-section-firmware.c
@@ -49,7 +49,7 @@
         json_object_get_string(json_object_object_get(section, "recordIDGUID")));
 
     //Write to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_FIRMWARE_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-memory.c b/sections/cper-section-memory.c
index 089a7bb..8cd7f0b 100644
--- a/sections/cper-section-memory.c
+++ b/sections/cper-section-memory.c
@@ -172,7 +172,7 @@
     section_cper->Extended |= json_object_get_int(json_object_object_get(extended, "chipIdentification")) << 5;
 
     //Miscellaneous value fields.
-    section_cper->ErrorType = readable_pair_to_integer(json_object_object_get(section, "memoryErrorType"));
+    section_cper->ErrorType = (UINT8)readable_pair_to_integer(json_object_object_get(section, "memoryErrorType"));
     section_cper->PhysicalAddress = json_object_get_uint64(json_object_object_get(section, "physicalAddress"));
     section_cper->PhysicalAddressMask = json_object_get_uint64(json_object_object_get(section, "physicalAddressMask"));
     section_cper->Node = (UINT16)json_object_get_uint64(json_object_object_get(section, "node"));
@@ -190,7 +190,7 @@
     section_cper->ModuleHandle = (UINT16)json_object_get_uint64(json_object_object_get(section, "moduleSmbiosHandle"));
 
     //Write to stream, free up resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_PLATFORM_MEMORY_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
@@ -244,7 +244,7 @@
     section_cper->ModuleHandle = (UINT32)json_object_get_uint64(json_object_object_get(section, "moduleSmbiosHandle"));
 
     //Write to stream, free up resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_PLATFORM_MEMORY2_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-pci-bus.c b/sections/cper-section-pci-bus.c
index d12a6fe..0b0c297 100644
--- a/sections/cper-section-pci-bus.c
+++ b/sections/cper-section-pci-bus.c
@@ -79,7 +79,7 @@
     section_cper->TargetId = json_object_get_uint64(json_object_object_get(section, "targetID"));
 
     //Write to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_PCI_PCIX_BUS_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-pcie.c b/sections/cper-section-pcie.c
index 8c70734..d5a7729 100644
--- a/sections/cper-section-pcie.c
+++ b/sections/cper-section-pcie.c
@@ -80,38 +80,9 @@
 
     //AER information.
     json_object* aer_capability_ir = json_object_new_object();
-    EFI_PCIE_ADV_ERROR_EXT_CAPABILITY* aer_capability = (EFI_PCIE_ADV_ERROR_EXT_CAPABILITY*)pcie_error->AerInfo.PcieAer;
-    json_object_object_add(aer_capability_ir, "capabilityID", 
-        json_object_new_uint64(aer_capability->Header.PcieExtendedCapabilityId));
-    json_object_object_add(aer_capability_ir, "capabilityVersion", 
-        json_object_new_uint64(aer_capability->Header.CapabilityVersion));
-    json_object_object_add(aer_capability_ir, "uncorrectableErrorStatusRegister", 
-        json_object_new_uint64(aer_capability->UncorrectableErrorStatusReg));
-    json_object_object_add(aer_capability_ir, "uncorrectableErrorMaskRegister", 
-        json_object_new_uint64(aer_capability->UncorrectableErrorMaskReg));
-    json_object_object_add(aer_capability_ir, "uncorrectableErrorSeverityRegister", 
-        json_object_new_uint64(aer_capability->UncorrectableErrorSeverityReg));
-    json_object_object_add(aer_capability_ir, "correctableErrorStatusRegister", 
-        json_object_new_uint64(aer_capability->CorrectableErrorStatusReg));
-    json_object_object_add(aer_capability_ir, "correctableErrorMaskRegister", 
-        json_object_new_uint64(aer_capability->CorrectableErrorMaskReg));
-    json_object_object_add(aer_capability_ir, "aeccReg", json_object_new_uint64(aer_capability->AeccReg));
-
-    //Header log register (b64).
-    encoded = b64_encode((unsigned char*)aer_capability->HeaderLogReg, 16);
-    json_object_object_add(aer_capability_ir, "headerLogRegister", json_object_new_string(encoded));
+    encoded = b64_encode((unsigned char*)pcie_error->AerInfo.PcieAer, 96);
+    json_object_object_add(aer_capability_ir, "data", json_object_new_string(encoded));
     free(encoded);
-
-    //Remaining AER fields.
-    json_object_object_add(aer_capability_ir, "rootErrorCommand", 
-        json_object_new_uint64(aer_capability->RootErrorCommand));
-    json_object_object_add(aer_capability_ir, "rootErrorStatus", 
-        json_object_new_uint64(aer_capability->RootErrorStatus));
-    json_object_object_add(aer_capability_ir, "errorSourceIDRegister", 
-        json_object_new_uint64(aer_capability->ErrorSourceIdReg));
-    json_object_object_add(aer_capability_ir, "correctableErrorSourceIDRegister", 
-        json_object_new_uint64(aer_capability->CorrectableSourceIdReg));
-
     json_object_object_add(section_ir, "aerInfo", aer_capability_ir);
     return section_ir;
 }
@@ -127,9 +98,9 @@
 
     //Version.
     json_object* version = json_object_object_get(section, "version");
-    int minor = json_object_get_int(json_object_object_get(version, "minor"));
-    int major = json_object_get_int(json_object_object_get(version, "major"));
-    section_cper->Version = int_to_bcd(minor) + ((UINT16)(int_to_bcd(major)) << 8);
+    UINT32 minor = int_to_bcd(json_object_get_int(json_object_object_get(version, "minor")));
+    UINT32 major = int_to_bcd(json_object_get_int(json_object_object_get(version, "major")));
+    section_cper->Version = minor + (major << 8);
 
     //Command/status registers.
     json_object* command_status = json_object_object_get(section, "commandStatus");
@@ -146,7 +117,7 @@
         (UINT16)json_object_get_uint64(json_object_object_get(device_id, "deviceID"));
     section_cper->DevBridge.ClassCode[0] = class_id >> 16;
     section_cper->DevBridge.ClassCode[1] = (class_id >> 8) & 0xFF;
-    section_cper->DevBridge.ClassCode[1] = class_id & 0xFF;
+    section_cper->DevBridge.ClassCode[2] = class_id & 0xFF;
     section_cper->DevBridge.Function = 
         (UINT8)json_object_get_uint64(json_object_object_get(device_id, "functionNumber"));
     section_cper->DevBridge.Device = 
@@ -175,48 +146,17 @@
 
     //AER capability structure.
     json_object* aer_info = json_object_object_get(section, "aerInfo");
-    EFI_PCIE_ADV_ERROR_EXT_CAPABILITY* aer_capability = 
-        (EFI_PCIE_ADV_ERROR_EXT_CAPABILITY*)section_cper->AerInfo.PcieAer;
-    aer_capability->Header.PcieExtendedCapabilityId =
-        json_object_get_uint64(json_object_object_get(aer_info, "capabilityID"));
-    aer_capability->Header.CapabilityVersion =
-        json_object_get_uint64(json_object_object_get(aer_info, "capabilityVersion"));
-    aer_capability->UncorrectableErrorStatusReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "uncorrectableErrorStatusRegister"));
-    aer_capability->UncorrectableErrorMaskReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "uncorrectableErrorMaskRegister"));
-    aer_capability->UncorrectableErrorSeverityReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "uncorrectableErrorSeverityRegister"));
-    aer_capability->CorrectableErrorStatusReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "correctableErrorStatusRegister"));
-    aer_capability->CorrectableErrorMaskReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "correctableErrorMaskRegister"));
-    aer_capability->AeccReg =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "aeccReg"));
-
-    //AER header log register.
-    encoded = json_object_object_get(aer_info, "headerLogRegister");
+    encoded = json_object_object_get(aer_info, "data");
     decoded = b64_decode(json_object_get_string(encoded), json_object_get_string_len(encoded));
-    memcpy(aer_capability->HeaderLogReg, decoded, 16);
+    memcpy(section_cper->AerInfo.PcieAer, decoded, 96);
     free(decoded);
 
-    //Remaining AER fields.
-    aer_capability->RootErrorCommand =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "rootErrorCommand"));
-    aer_capability->RootErrorStatus =
-        (UINT32)json_object_get_uint64(json_object_object_get(aer_info, "rootErrorStatus"));
-    aer_capability->ErrorSourceIdReg =
-        (UINT16)json_object_get_uint64(json_object_object_get(aer_info, "errorSourceIDRegister"));
-    aer_capability->CorrectableSourceIdReg =
-        (UINT16)json_object_get_uint64(json_object_object_get(aer_info, "correctableErrorSourceIDRegister"));
-
-
     //Miscellaneous value fields.
     section_cper->PortType = (UINT32)readable_pair_to_integer(json_object_object_get(section, "portType"));
     section_cper->SerialNo = json_object_get_uint64(json_object_object_get(section, "deviceSerialNumber"));
 
     //Write out to stream, free resources.
-    fwrite(&section_cper, sizeof(section_cper), 1, out);
+    fwrite(section_cper, sizeof(EFI_PCIE_ERROR_DATA), 1, out);
     fflush(out);
     free(section_cper);
 }
\ No newline at end of file
diff --git a/sections/cper-section-pcie.h b/sections/cper-section-pcie.h
index c264960..badf422 100644
--- a/sections/cper-section-pcie.h
+++ b/sections/cper-section-pcie.h
@@ -12,27 +12,6 @@
     "Root Port", "Upstream Switch Port", "Downstream Switch Port", "PCI Express to PCI/PCI-X Bridge", \
     "PCI/PCI-X Bridge to PCI Express Bridge", "Root Complex Integrated Endpoint Device", "Root Complex Event Collector"}
 
-typedef struct {
-    UINT64 PcieExtendedCapabilityId : 16;
-    UINT64 CapabilityVersion : 4;
-    UINT64 NextCapabilityOffset : 12; 
-} EFI_PCIE_ADV_ERROR_EXT_CAPABILITY_HEADER;
-
-typedef struct {
-    EFI_PCIE_ADV_ERROR_EXT_CAPABILITY_HEADER Header;
-    UINT32 UncorrectableErrorStatusReg;
-    UINT32 UncorrectableErrorMaskReg;
-    UINT32 UncorrectableErrorSeverityReg;
-    UINT32 CorrectableErrorStatusReg;
-    UINT32 CorrectableErrorMaskReg;
-    UINT32 AeccReg;
-    UINT8 HeaderLogReg[16];
-    UINT32 RootErrorCommand;
-    UINT32 RootErrorStatus;
-    UINT16 CorrectableSourceIdReg;
-    UINT16 ErrorSourceIdReg;
-} EFI_PCIE_ADV_ERROR_EXT_CAPABILITY;
-
 json_object* cper_section_pcie_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor);
 void ir_section_pcie_to_cper(json_object* section, FILE* out);
 
diff --git a/specification/document/cper-json-specification.tex b/specification/document/cper-json-specification.tex
index 59ac7f6..5176e72 100644
--- a/specification/document/cper-json-specification.tex
+++ b/specification/document/cper-json-specification.tex
@@ -1519,7 +1519,8 @@
 \hline
 capabilityStructure.data & string & A base-64 formatted binary dump of the PCIe capability structure for this device. The structure could either be a PCIe 1.1 Capability Structure (36-byte, padded to 60 bytes) or a PCIe 2.0 Capability Structure (60-byte).\\
 \hline
-aerInfo & object & A PCIe AER Extended Capability structure, as defined in Subsection \ref{subsection:pcieaerecstructure}.\\
+% aerInfo & object & A PCIe AER Extended Capability structure, as defined in Subsection \ref{subsection:pcieaerecstructure}.\\
+aerInfo.data & string & A base64-formatted representation of a PCIe AER Extended Capability structure.\\
 \jsontableend{PCIe Error structure field table.}
 
 % PCIe error validation structure.
@@ -1569,37 +1570,37 @@
 slotNumber & uint64 & The slot number of the PCIe device.\\
 \jsontableend{PCIe Device ID structure field table.}
 
-% PCIe Advanced Error Reporting Extended Capability structure.
-\subsection{PCIe AER Extended Capability Structure}
-\label{subsection:pcieaerecstructure}
-This structure describes a PCIe Advanced Error Reporting Extended Capability structure, for use in a PCI Error section (\ref{table:pcieerrorsection}).
-\jsontable{table:pcieaerecstructure}
-capabilityID & uint64 & The capability ID for this AER structure.\\
-\hline
-capabilityVersion & uint64 & The capability structure version for this AER structure.\\
-\hline
-uncorrectableErrorStatusRegister & uint64 & The uncorrectable error status register value.\\
-\hline
-uncorrectableErrorMaskRegister & uint64 & The uncorrectable error mask register value.\\
-\hline
-uncorrectableErrorSeverityRegister & uint64 & The uncorrectable error severity register value.\\
-\hline
-correctableErrorStatusRegister & uint64 & The correctable error status register value.\\
-\hline
-correctableErrorMaskRegister & uint64 & The correctable error mask register value.\\
-\hline
-aeccReg & uint64 & The AECC register value.\\
-\hline
-headerLogRegister & string & A base64-encoded binary dump of the header log register.\\
-\hline
-rootErrorCommand & uint64 & The root error command.\\
-\hline
-rootErrorStatus & uint64 & The root error status.\\
-\hline
-errorSourceIDRegister & uint64 & The error source ID register.\\
-\hline
-correctableErrorSourceIDRegister & uint64 & The correctable error source ID register.\\
-\jsontableend{PCIe AER Extended Capability structure field table.}
+% % PCIe Advanced Error Reporting Extended Capability structure.
+% \subsection{PCIe AER Extended Capability Structure}
+% \label{subsection:pcieaerecstructure}
+% This structure describes a PCIe Advanced Error Reporting Extended Capability structure, for use in a PCI Error section (\ref{table:pcieerrorsection}).
+% \jsontable{table:pcieaerecstructure}
+% capabilityID & uint64 & The capability ID for this AER structure.\\
+% \hline
+% capabilityVersion & uint64 & The capability structure version for this AER structure.\\
+% \hline
+% uncorrectableErrorStatusRegister & uint64 & The uncorrectable error status register value.\\
+% \hline
+% uncorrectableErrorMaskRegister & uint64 & The uncorrectable error mask register value.\\
+% \hline
+% uncorrectableErrorSeverityRegister & uint64 & The uncorrectable error severity register value.\\
+% \hline
+% correctableErrorStatusRegister & uint64 & The correctable error status register value.\\
+% \hline
+% correctableErrorMaskRegister & uint64 & The correctable error mask register value.\\
+% \hline
+% aeccReg & uint64 & The AECC register value.\\
+% \hline
+% headerLogRegister & string & A base64-encoded binary dump of the header log register.\\
+% \hline
+% rootErrorCommand & uint64 & The root error command.\\
+% \hline
+% rootErrorStatus & uint64 & The root error status.\\
+% \hline
+% errorSourceIDRegister & uint64 & The error source ID register.\\
+% \hline
+% correctableErrorSourceIDRegister & uint64 & The correctable error source ID register.\\
+% \jsontableend{PCIe AER Extended Capability structure field table.}
 
 % PCI/PCI-X Bus error section.
 \section{PCI/PCI-X Bus Error Section}
diff --git a/specification/json/sections/cper-pcie.json b/specification/json/sections/cper-pcie.json
index 05e6dad..021d590 100644
--- a/specification/json/sections/cper-pcie.json
+++ b/specification/json/sections/cper-pcie.json
@@ -122,46 +122,10 @@
         },
         "aerInfo": {
             "type": "object",
-            "required": ["capabilityID", "capabilityVersion", "uncorrectableErrorStatusRegister", "uncorrectableErrorMaskRegister", "uncorrectableErrorSeverityRegister", "correctableErrorStatusRegister", "correctableErrorMaskRegister", "aeccReg", "headerLogRegister", "rootErrorCommand", "rootErrorStatus", "errorSourceIDRegister", "correctableErrorSourceIDRegister"],
+            "required": ["data"],
             "properties": {
-                "capabilityID": {
-                    "type": "integer"
-                },
-                "capabilityVersion": {
-                    "type": "integer"
-                },
-                "uncorrectableErrorStatusRegister": {
-                    "type": "integer"
-                },
-                "uncorrectableErrorMaskRegister": {
-                    "type": "integer"
-                },
-                "uncorrectableErrorSeverityRegister": {
-                    "type": "integer"
-                },
-                "correctableErrorStatusRegister": {
-                    "type": "integer"
-                },
-                "correctableErrorMaskRegister": {
-                    "type": "integer"
-                },
-                "aeccReg": {
-                    "type": "integer"
-                },
-                "headerLogRegister": {
+                "data": {
                     "type": "string"
-                },
-                "rootErrorCommand": {
-                    "type": "integer"
-                },
-                "rootErrorStatus": {
-                    "type": "integer"
-                },
-                "errorSourceIDRegister": {
-                    "type": "integer"
-                },
-                "correctableErrorSourceIDRegister": {
-                    "type": "integer"
                 }
             }
         }