diff --git a/cper-utils.c b/cper-utils.c
index f70cf54..ff28b50 100644
--- a/cper-utils.c
+++ b/cper-utils.c
@@ -12,6 +12,36 @@
 //The available severity types for CPER.
 const char* CPER_SEVERITY_TYPES[4] = {"Recoverable", "Fatal", "Corrected", "Informational"};
 
+//Converts a single uniform struct of UINT64s into intermediate JSON IR format, given names for each field in byte order.
+json_object* uniform_struct64_to_ir(UINT64* start, int len, const char* names[])
+{
+    json_object* result = json_object_new_object();
+
+    UINT64* cur = start;
+    for (int i=0; i<len; i++)
+    {
+        json_object_object_add(result, names[i], json_object_new_uint64(*cur));
+        cur++;
+    }
+
+    return result;
+}
+
+//Converts a single uniform struct of UINT32s into intermediate JSON IR format, given names for each field in byte order.
+json_object* uniform_struct_to_ir(UINT32* start, int len, const char* names[])
+{
+    json_object* result = json_object_new_object();
+
+    UINT32* cur = start;
+    for (int i=0; i<len; i++)
+    {
+        json_object_object_add(result, names[i], json_object_new_uint64(*cur));
+        cur++;
+    }
+
+    return result;
+}
+
 //Converts a single integer value to an object containing a value, and a readable name if possible.
 json_object* integer_to_readable_pair(int value, int len, int keys[], const char* values[], const char* default_value)
 {
@@ -30,6 +60,28 @@
     return result;
 }
 
+//Converts a single integer value to an object containing a value, readable name and description if possible.
+json_object* integer_to_readable_pair_with_desc(int value, int len, int keys[], const char* values[], 
+    const char* descriptions[], const char* default_value) 
+{
+    json_object* result = json_object_new_object();
+    json_object_object_add(result, "value", json_object_new_int(value));
+
+    //Search for human readable name, add.
+    const char* name = default_value;
+    for (int i=0; i<len; i++)
+    {
+        if (keys[i] == value) 
+        {
+            name = values[i];
+            json_object_object_add(result, "description", json_object_new_string(descriptions[i]));
+        }
+    }
+
+    json_object_object_add(result, "name", json_object_new_string(name));
+    return result;
+}
+
 //Converts the given 64 bit bitfield to IR, assuming bit 0 starts on the left.
 json_object* bitfield_to_ir(UINT64 bitfield, int num_fields, const char* names[])
 {
diff --git a/cper-utils.h b/cper-utils.h
index c38a4a8..635bcd6 100644
--- a/cper-utils.h
+++ b/cper-utils.h
@@ -4,7 +4,10 @@
 #define GUID_STRING_LENGTH 30
 #define TIMESTAMP_LENGTH 24
 
+json_object* uniform_struct_to_ir(UINT32* start, int len, const char* names[]);
+json_object* uniform_struct64_to_ir(UINT64* start, int len, const char* names[]);
 json_object* integer_to_readable_pair(int value, int len, int keys[], const char* values[], const char* default_value);
+json_object* integer_to_readable_pair_with_desc(int value, int len, int keys[], const char* values[], const char* descriptions[], const char* default_value);
 json_object* bitfield_to_ir(UINT64 bitfield, int num_fields, const char* names[]);
 json_object* revision_to_ir(UINT16 revision);
 const char* severity_to_string(UINT8 severity);
diff --git a/edk/Cper.h b/edk/Cper.h
index b70e1bf..6c0014c 100644
--- a/edk/Cper.h
+++ b/edk/Cper.h
@@ -753,7 +753,7 @@
   UINT64  MIDR_EL1;
   UINT32 RunningState;
   UINT32 PsciState;
-} EFI_ARM_PROCESSOR_ERROR_RECORD;
+} EFI_ARM_ERROR_RECORD;
 
 ///
 /// ARM Processor Error Information Structure
@@ -763,31 +763,31 @@
   UINT64 TransactionType : 2;
   UINT64 Operation : 4;
   UINT64 Level : 3;
-  UINT64 ProcessorContextInterrupt : 1;
+  UINT64 ProcessorContextCorrupt : 1;
   UINT64 Corrected : 1;
   UINT64 PrecisePC : 1;
   UINT64 RestartablePC : 1;
   UINT64 Reserved : 34;
-} EFI_ARM_PROCESSOR_CACHE_ERROR_STRUCTURE;
+} EFI_ARM_CACHE_ERROR_STRUCTURE;
 
 typedef struct {
   UINT64 ValidationBits : 16;
   UINT64 TransactionType : 2;
   UINT64 Operation : 4;
   UINT64 Level : 3;
-  UINT64 ProcessorContextInterrupt : 1;
+  UINT64 ProcessorContextCorrupt : 1;
   UINT64 Corrected : 1;
   UINT64 PrecisePC : 1;
   UINT64 RestartablePC : 1;
   UINT64 Reserved : 34;
-} EFI_ARM_PROCESSOR_TLB_ERROR_STRUCTURE;
+} EFI_ARM_TLB_ERROR_STRUCTURE;
 
 typedef struct {
   UINT64 ValidationBits : 16;
   UINT64 TransactionType : 2;
   UINT64 Operation : 4;
   UINT64 Level : 3;
-  UINT64 ProcessorContextInterrupt : 1;
+  UINT64 ProcessorContextCorrupt : 1;
   UINT64 Corrected : 1;
   UINT64 PrecisePC : 1;
   UINT64 RestartablePC : 1;
@@ -797,13 +797,13 @@
   UINT64 MemoryAddressAttributes : 8;
   UINT64 AccessMode : 1;
   UINT64 Reserved : 19;
-} EFI_ARM_PROCESSOR_BUS_ERROR_STRUCTURE;
+} EFI_ARM_BUS_ERROR_STRUCTURE;
 
 typedef union {
-  EFI_ARM_PROCESSOR_CACHE_ERROR_STRUCTURE CacheError;
-  EFI_ARM_PROCESSOR_TLB_ERROR_STRUCTURE TlbError;
-  EFI_ARM_PROCESSOR_BUS_ERROR_STRUCTURE BusError;
-} EFI_ARM_PROCESSOR_ERROR_INFORMATION_STRUCTURE;
+  EFI_ARM_CACHE_ERROR_STRUCTURE CacheError;
+  EFI_ARM_TLB_ERROR_STRUCTURE TlbError;
+  EFI_ARM_BUS_ERROR_STRUCTURE BusError;
+} EFI_ARM_ERROR_INFORMATION_STRUCTURE;
 
 typedef struct {
   UINT8 Version;
@@ -812,10 +812,197 @@
   UINT8 Type;
   UINT16 MultipleError;
   UINT8 Flags;
-  EFI_ARM_PROCESSOR_ERROR_INFORMATION_STRUCTURE ErrorInformation;
+  EFI_ARM_ERROR_INFORMATION_STRUCTURE ErrorInformation;
   UINT64 VirtualFaultAddress;
   UINT64 PhysicalFaultAddress;
-} EFI_ARM_PROCESSOR_ERROR_INFORMATION_ENTRY;
+} EFI_ARM_ERROR_INFORMATION_ENTRY;
+
+///
+/// ARM Processor Context Information Structure
+///
+typedef struct {
+  UINT16 Version;
+  UINT16 RegisterContextType;
+  UINT32 RegisterArraySize;
+} EFI_ARM_CONTEXT_INFORMATION_HEADER;
+
+///
+/// ARM Processor Context Register Types
+///
+#define EFI_ARM_CONTEXT_TYPE_AARCH32_GPR 0
+#define EFI_ARM_CONTEXT_TYPE_AARCH32_EL1 1
+#define EFI_ARM_CONTEXT_TYPE_AARCH32_EL2 2
+#define EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE 3
+#define EFI_ARM_CONTEXT_TYPE_AARCH64_GPR 4
+#define EFI_ARM_CONTEXT_TYPE_AARCH64_EL1 5
+#define EFI_ARM_CONTEXT_TYPE_AARCH64_EL2 6
+#define EFI_ARM_CONTEXT_TYPE_AARCH64_EL3 7
+#define EFI_ARM_CONTEXT_TYPE_MISC 8
+
+typedef struct {
+  UINT32 R0;
+  UINT32 R1;
+  UINT32 R2;
+  UINT32 R3;
+  UINT32 R4;
+  UINT32 R5;
+  UINT32 R6;
+  UINT32 R7;
+  UINT32 R8;
+  UINT32 R9;
+  UINT32 R10;
+  UINT32 R11;
+  UINT32 R12;
+  UINT32 R13_sp;
+  UINT32 R14_lr;
+  UINT32 R15_pc;
+} EFI_ARM_V8_AARCH32_GPR;
+
+typedef struct {
+  UINT32 Dfar;
+  UINT32 Dfsr;
+  UINT32 Ifar;
+  UINT32 Isr;
+  UINT32 Mair0;
+  UINT32 Mair1;
+  UINT32 Midr;
+  UINT32 Mpidr;
+  UINT32 Nmrr;
+  UINT32 Prrr;
+  UINT32 Sctlr_Ns;
+  UINT32 Spsr;
+  UINT32 Spsr_Abt;
+  UINT32 Spsr_Fiq;
+  UINT32 Spsr_Irq;
+  UINT32 Spsr_Svc;
+  UINT32 Spsr_Und;
+  UINT32 Tpidrprw;
+  UINT32 Tpidruro;
+  UINT32 Tpidrurw;
+  UINT32 Ttbcr;
+  UINT32 Ttbr0;
+  UINT32 Ttbr1;
+  UINT32 Dacr;
+} EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT32 Elr_Hyp;
+  UINT32 Hamair0;
+  UINT32 Hamair1;
+  UINT32 Hcr;
+  UINT32 Hcr2;
+  UINT32 Hdfar;
+  UINT32 Hifar;
+  UINT32 Hpfar;
+  UINT32 Hsr;
+  UINT32 Htcr;
+  UINT32 Htpidr;
+  UINT32 Httbr;
+  UINT32 Spsr_Hyp;
+  UINT32 Vtcr;
+  UINT32 Vttbr;
+  UINT32 Dacr32_El2;
+} EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT32 Sctlr_S;
+  UINT32 Spsr_Mon;
+} EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT64 X0;
+  UINT64 X1;
+  UINT64 X2;
+  UINT64 X3;
+  UINT64 X4;
+  UINT64 X5;
+  UINT64 X6;
+  UINT64 X7;
+  UINT64 X8;
+  UINT64 X9;
+  UINT64 X10;
+  UINT64 X11;
+  UINT64 X12;
+  UINT64 X13;
+  UINT64 X14;
+  UINT64 X15;
+  UINT64 X16;
+  UINT64 X17;
+  UINT64 X18;
+  UINT64 X19;
+  UINT64 X20;
+  UINT64 X21;
+  UINT64 X22;
+  UINT64 X23;
+  UINT64 X24;
+  UINT64 X25;
+  UINT64 X26;
+  UINT64 X27;
+  UINT64 X28;
+  UINT64 X29;
+  UINT64 X30;
+  UINT64 Sp;
+} EFI_ARM_V8_AARCH64_GPR;
+
+typedef struct {
+  UINT64 Elr_El1;
+  UINT64 Esr_El1;
+  UINT64 Far_El1;
+  UINT64 Isr_El1;
+  UINT64 Mair_El1;
+  UINT64 Midr_El1;
+  UINT64 Mpidr_El1;
+  UINT64 Sctlr_El1;
+  UINT64 Sp_El0;
+  UINT64 Sp_El1;
+  UINT64 Spsr_El1;
+  UINT64 Tcr_El1;
+  UINT64 Tpidr_El0;
+  UINT64 Tpidr_El1;
+  UINT64 Tpidrro_El0;
+  UINT64 Ttbr0_El1;
+  UINT64 Ttbr1_El1;
+} EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT64 Elr_El2;
+  UINT64 Esr_El2;
+  UINT64 Far_El2;
+  UINT64 Hacr_El2;
+  UINT64 Hcr_El2;
+  UINT64 Hpfar_El2;
+  UINT64 Mair_El2;
+  UINT64 Sctlr_El2;
+  UINT64 Sp_El2;
+  UINT64 Spsr_El2;
+  UINT64 Tcr_El2;
+  UINT64 Tpidr_El2;
+  UINT64 Ttbr0_El2;
+  UINT64 Vtcr_El2;
+  UINT64 Vttbr_El2;
+} EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT64 Elr_El3;
+  UINT64 Esr_El3;
+  UINT64 Far_El3;
+  UINT64 Mair_El3;
+  UINT64 Sctlr_El3;
+  UINT64 Sp_El3;
+  UINT64 Spsr_El3;
+  UINT64 Tcr_El3;
+  UINT64 Tpidr_El3;
+  UINT64 Ttbr0_El3;
+} EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS;
+
+typedef struct {
+  UINT64 MrsOp2 : 3;
+  UINT64 MrsCrm : 4;
+  UINT64 MrsCrn : 4;
+  UINT64 MrsOp1 : 3;
+  UINT64 MrsO0 : 1;
+  UINT64 Value : 64;
+} EFI_ARM_MISC_CONTEXT_REGISTER;
 
 ///
 /// Error Status Fields
diff --git a/sections/cper-section-arm.c b/sections/cper-section-arm.c
index cbb76b4..3e95dc5 100644
--- a/sections/cper-section-arm.c
+++ b/sections/cper-section-arm.c
@@ -12,19 +12,20 @@
 #include "cper-section-arm.h"
 
 //Private pre-definitions.
-json_object* cper_arm_error_info_to_ir(EFI_ARM_PROCESSOR_ERROR_INFORMATION_ENTRY* error_info, void** cur_pos);
-json_object* cper_arm_cache_error_to_ir(EFI_ARM_PROCESSOR_CACHE_ERROR_STRUCTURE* cache_error);
-json_object* cper_arm_tlb_error_to_ir(EFI_ARM_PROCESSOR_TLB_ERROR_STRUCTURE* tlb_error);
-json_object* cper_arm_bus_error_to_ir(EFI_ARM_PROCESSOR_BUS_ERROR_STRUCTURE* bus_error);
+json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info);
+json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos);
+json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info);
+json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error);
+json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register);
 
 //Converts the given processor-generic CPER section into JSON IR.
 json_object* cper_section_arm_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor)
 {
-    EFI_ARM_PROCESSOR_ERROR_RECORD* record = (EFI_ARM_PROCESSOR_ERROR_RECORD*)section;
+    EFI_ARM_ERROR_RECORD* record = (EFI_ARM_ERROR_RECORD*)section;
     json_object* section_ir = json_object_new_object();
     
     //Validation bits.
-    json_object* validation = bitfield_to_ir(record->ValidFields, 4, ARM_PROCESSOR_ERROR_VALID_BITFIELD_NAMES);
+    json_object* validation = bitfield_to_ir(record->ValidFields, 4, ARM_ERROR_VALID_BITFIELD_NAMES);
     json_object_object_add(section_ir, "validationBits", validation);
 
     //Number of error info and context info structures, and length.
@@ -54,33 +55,47 @@
 
     //Processor error structures.
     json_object* error_info_array = json_object_new_array();
-    EFI_ARM_PROCESSOR_ERROR_INFORMATION_ENTRY* cur_error = (EFI_ARM_PROCESSOR_ERROR_INFORMATION_ENTRY*)(record + 1);
+    EFI_ARM_ERROR_INFORMATION_ENTRY* cur_error = (EFI_ARM_ERROR_INFORMATION_ENTRY*)(record + 1);
     for (int i=0; i<record->ErrInfoNum; i++) 
     {
-        json_object_array_add(error_info_array, cper_arm_error_info_to_ir(cur_error, (void*)&cur_error));
-        //Dynamically sized structure, so pointer is controlled within the above function.
+        json_object_array_add(error_info_array, cper_arm_error_info_to_ir(cur_error));
+        cur_error++;
     }
+    json_object_object_add(section_ir, "errorInfo", error_info_array);
+
+    //Processor context structures.
+    //The current position is moved within the processing, as it is a dynamic size structure.
+    void* cur_pos = (void*)cur_error;
+    EFI_ARM_CONTEXT_INFORMATION_HEADER* header = (EFI_ARM_CONTEXT_INFORMATION_HEADER*)cur_error;
+    json_object* processor_context = cper_arm_processor_context_to_ir(header, &cur_pos);
+
+    //Is there any vendor-specific information following?
+    if (cur_pos < section + record->SectionLength)
+    {
+        //todo: b64 and tag on vendor-specific binary info.
+    }
+
     return section_ir;
 }
 
 //Converts a single ARM Process Error Information structure into JSON IR.
-json_object* cper_arm_error_info_to_ir(EFI_ARM_PROCESSOR_ERROR_INFORMATION_ENTRY* error_info, void** cur_pos)
+json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info)
 {
     json_object* error_info_ir = json_object_new_object();
 
     //Version, length.
     json_object_object_add(error_info_ir, "version", json_object_new_int(error_info->Version));
-    json_object_object_add(error_info_ir, "version", json_object_new_int(error_info->Length));
+    json_object_object_add(error_info_ir, "length", json_object_new_int(error_info->Length));
 
     //Validation bitfield.
-    json_object* validation = bitfield_to_ir(error_info->ValidationBits, 5, ARM_PROCESSOR_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES);
+    json_object* validation = bitfield_to_ir(error_info->ValidationBits, 5, ARM_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES);
     json_object_object_add(error_info_ir, "validationBits", validation);
 
     //The type of error information in this log.
     //todo: The UEFI spec is ambiguous, what are the values for these??
     json_object* error_type = integer_to_readable_pair(error_info->Type, 4,
-        ARM_PROCESSOR_ERROR_INFO_ENTRY_INFO_TYPES_KEYS,
-        ARM_PROCESSOR_ERROR_INFO_ENTRY_INFO_TYPES_VALUES,
+        ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS,
+        ARM_ERROR_INFO_ENTRY_INFO_TYPES_VALUES,
         "Unknown (Reserved)");
     json_object_object_add(error_info_ir, "errorType", error_type);
 
@@ -92,7 +107,7 @@
     json_object_object_add(error_info_ir, "multipleError", multiple_error);
 
     //Flags.
-    json_object* flags = bitfield_to_ir(error_info->Flags, 4, ARM_PROCESSOR_ERROR_INFO_ENTRY_FLAGS_NAMES);
+    json_object* flags = bitfield_to_ir(error_info->Flags, 4, ARM_ERROR_INFO_ENTRY_FLAGS_NAMES);
     json_object_object_add(error_info_ir, "flags", flags);
 
     //Error information, split by type.
@@ -100,13 +115,11 @@
     switch (error_info->Type)
     {
         case 0: //Cache
-            error_subinfo = cper_arm_cache_error_to_ir((EFI_ARM_PROCESSOR_CACHE_ERROR_STRUCTURE*)&error_info->ErrorInformation);
-            break;
         case 1: //TLB
-            error_subinfo = cper_arm_tlb_error_to_ir((EFI_ARM_PROCESSOR_TLB_ERROR_STRUCTURE*)&error_info->ErrorInformation);
+            error_subinfo = cper_arm_cache_tlb_error_to_ir((EFI_ARM_CACHE_ERROR_STRUCTURE*)&error_info->ErrorInformation, error_info);
             break;
         case 2: //Bus
-            error_subinfo = cper_arm_bus_error_to_ir((EFI_ARM_PROCESSOR_BUS_ERROR_STRUCTURE*)&error_info->ErrorInformation);
+            error_subinfo = cper_arm_bus_error_to_ir((EFI_ARM_BUS_ERROR_STRUCTURE*)&error_info->ErrorInformation);
             break;
     }
     json_object_object_add(error_info_ir, "errorInformation", error_subinfo);
@@ -114,20 +127,190 @@
     return error_info_ir;
 }
 
-//Converts a single ARM cache error information structure into JSON IR format.
-json_object* cper_arm_cache_error_to_ir(EFI_ARM_PROCESSOR_CACHE_ERROR_STRUCTURE* cache_error)
+//Converts a single ARM cache/TLB error information structure into JSON IR format.
+json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info)
 {
-    //todo
-}
+    json_object* cache_tlb_error_ir = json_object_new_object();
 
-//Converts a single ARM TLB error information structure into JSON IR format.
-json_object* cper_arm_tlb_error_to_ir(EFI_ARM_PROCESSOR_TLB_ERROR_STRUCTURE* tlb_error)
-{
-    //todo
+    //Validation bitfield.
+    json_object* validation = bitfield_to_ir(cache_tlb_error->ValidationBits, 7, ARM_CACHE_TLB_ERROR_VALID_BITFIELD_NAMES);
+    json_object_object_add(cache_tlb_error_ir, "validationBits", validation);
+
+    //Transaction type.
+    json_object* transaction_type = integer_to_readable_pair(cache_tlb_error->TransactionType, 3,
+        ARM_ERROR_TRANSACTION_TYPES_KEYS,
+        ARM_ERROR_TRANSACTION_TYPES_VALUES,
+        "Unknown (Reserved)");
+    json_object_object_add(cache_tlb_error_ir, "transactionType", transaction_type);
+
+    //Operation.
+    //todo: What are the types' numeric values? UEFI spec is ambiguous
+    json_object* operation;
+    if (error_info->Type == 0)
+    {
+        //Cache operation.
+        operation = integer_to_readable_pair(cache_tlb_error->Operation, 11,
+            ARM_CACHE_BUS_OPERATION_TYPES_KEYS,
+            ARM_CACHE_BUS_OPERATION_TYPES_VALUES,
+            "Unknown (Reserved)");
+    }
+    else
+    {
+        //TLB operation.
+        operation = integer_to_readable_pair(cache_tlb_error->Operation, 9,
+            ARM_TLB_OPERATION_TYPES_KEYS,
+            ARM_TLB_OPERATION_TYPES_VALUES,
+            "Unknown (Reserved)");
+    }
+    json_object_object_add(cache_tlb_error_ir, "operation", operation);
+
+    //Miscellaneous remaining fields.
+    json_object_object_add(cache_tlb_error_ir, "level", json_object_new_int(cache_tlb_error->Level));
+    json_object_object_add(cache_tlb_error_ir, "processorContextCorrupt", json_object_new_boolean(cache_tlb_error->ProcessorContextCorrupt));
+    json_object_object_add(cache_tlb_error_ir, "corrected", json_object_new_boolean(cache_tlb_error->Corrected));
+    json_object_object_add(cache_tlb_error_ir, "precisePC", json_object_new_boolean(cache_tlb_error->PrecisePC));
+    json_object_object_add(cache_tlb_error_ir, "restartablePC", json_object_new_boolean(cache_tlb_error->RestartablePC));
+    return cache_tlb_error_ir;
 }
 
 //Converts a single ARM bus error information structure into JSON IR format.
-json_object* cper_arm_bus_error_to_ir(EFI_ARM_PROCESSOR_BUS_ERROR_STRUCTURE* bus_error)
+json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error)
 {
-    //todo
+    json_object* bus_error_ir = json_object_new_object();
+
+    //Validation bits.
+    json_object* validation = bitfield_to_ir(bus_error->ValidationBits, 7, ARM_BUS_ERROR_VALID_BITFIELD_NAMES);
+    json_object_object_add(bus_error_ir, "validationBits", validation);
+
+    //Transaction type.
+    json_object* transaction_type = integer_to_readable_pair(bus_error->TransactionType, 3,
+        ARM_ERROR_TRANSACTION_TYPES_KEYS,
+        ARM_ERROR_TRANSACTION_TYPES_VALUES,
+        "Unknown (Reserved)");
+    json_object_object_add(bus_error_ir, "transactionType", transaction_type);
+
+    //Operation.
+    json_object* operation = integer_to_readable_pair(bus_error->Operation, 7,
+        ARM_CACHE_BUS_OPERATION_TYPES_KEYS,
+        ARM_CACHE_BUS_OPERATION_TYPES_VALUES,
+        "Unknown (Reserved)");
+    json_object_object_add(bus_error_ir, "operation", operation);
+
+    //Affinity level of bus error, + miscellaneous fields.
+    json_object_object_add(bus_error_ir, "level", json_object_new_int(bus_error->Level));
+    json_object_object_add(bus_error_ir, "processorContextCorrupt", json_object_new_boolean(bus_error->ProcessorContextCorrupt));
+    json_object_object_add(bus_error_ir, "corrected", json_object_new_boolean(bus_error->Corrected));
+    json_object_object_add(bus_error_ir, "precisePC", json_object_new_boolean(bus_error->PrecisePC));
+    json_object_object_add(bus_error_ir, "restartablePC", json_object_new_boolean(bus_error->RestartablePC));
+    json_object_object_add(bus_error_ir, "timedOut", json_object_new_boolean(bus_error->TimeOut));
+
+    //Participation type.
+    json_object* participation_type = integer_to_readable_pair(bus_error->ParticipationType, 4,
+        ARM_BUS_PARTICIPATION_TYPES_KEYS,
+        ARM_BUS_PARTICIPATION_TYPES_VALUES,
+        "Unknown");
+    json_object_object_add(bus_error_ir, "participationType", participation_type);
+
+    //Address space.
+    json_object* address_space = integer_to_readable_pair(bus_error->AddressSpace, 3,
+        ARM_BUS_ADDRESS_SPACE_TYPES_KEYS,
+        ARM_BUS_ADDRESS_SPACE_TYPES_VALUES,
+        "Unknown");
+    json_object_object_add(bus_error_ir, "addressSpace", address_space);
+
+    //Memory access attributes.
+    //todo: find the specification of these in the ARM ARM
+    //...
+
+    //Access Mode
+    json_object* access_mode = json_object_new_object();
+    json_object_object_add(access_mode, "value", json_object_new_int(bus_error->AccessMode));
+    json_object_object_add(access_mode, "name", json_object_new_string(bus_error->AccessMode == 0 ? "Secure" : "Normal"));
+    json_object_object_add(bus_error_ir, "accessMode", access_mode);
+
+    return bus_error_ir;
+}
+
+//Converts a single ARM processor context block into JSON IR.
+json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos)
+{
+    json_object* context_ir = json_object_new_object();
+
+    //Add the context type.
+    json_object* context_type = integer_to_readable_pair(header->RegisterContextType, 9,
+        ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_KEYS,
+        ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_VALUES,
+        "Unknown (Reserved)");
+    json_object_object_add(context_ir, "registerContextType", context_type);
+
+    //Register array size (bytes).
+    json_object_object_add(context_ir, "registerArraySize", json_object_new_uint64(header->RegisterArraySize));
+
+    //The register array itself.
+    *cur_pos = (void*)(header + 1);
+    json_object* register_array = NULL;
+    switch (header->RegisterContextType)
+    {
+        case EFI_ARM_CONTEXT_TYPE_AARCH32_GPR:
+            register_array = uniform_struct_to_ir((UINT32*)cur_pos, 
+                sizeof(EFI_ARM_V8_AARCH32_GPR) / sizeof(UINT32), ARM_AARCH32_GPR_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH32_EL1:
+            register_array = uniform_struct_to_ir((UINT32*)cur_pos, 
+                sizeof(EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL1_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH32_EL2:
+            register_array = uniform_struct_to_ir((UINT32*)cur_pos, 
+                sizeof(EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL2_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE:
+            register_array = uniform_struct_to_ir((UINT32*)cur_pos, 
+                sizeof(EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_SECURE_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH64_GPR:
+            register_array = uniform_struct64_to_ir((UINT64*)cur_pos, 
+                sizeof(EFI_ARM_V8_AARCH64_GPR) / sizeof(UINT64), ARM_AARCH64_GPR_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH64_EL1:
+            register_array = uniform_struct64_to_ir((UINT64*)cur_pos, 
+                sizeof(EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL1_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH64_EL2:
+            register_array = uniform_struct64_to_ir((UINT64*)cur_pos, 
+                sizeof(EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL2_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_AARCH64_EL3:
+            register_array = uniform_struct64_to_ir((UINT64*)cur_pos, 
+                sizeof(EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL3_REGISTER_NAMES);
+            break;
+        case EFI_ARM_CONTEXT_TYPE_MISC:
+            register_array = cper_arm_misc_register_array_to_ir((EFI_ARM_MISC_CONTEXT_REGISTER*)cur_pos);
+            break;
+        default:
+            //Unknown register array type.
+            //todo: Format raw binary data and add instead of blank.
+            register_array = json_object_new_object();
+            break;
+    }
+
+    //Set the current position to after the processor context structure.
+    *cur_pos = (UINT8*)(*cur_pos) + header->RegisterArraySize;
+
+    return context_ir;
+}
+
+//Converts a single CPER ARM miscellaneous register array to JSON IR format.
+json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register)
+{
+    json_object* register_array = json_object_new_object();
+    json_object* mrs_encoding = json_object_new_object();
+    json_object_object_add(mrs_encoding, "op2", json_object_new_int(misc_register->MrsOp2));
+    json_object_object_add(mrs_encoding, "crm", json_object_new_int(misc_register->MrsOp2));
+    json_object_object_add(mrs_encoding, "crn", json_object_new_int(misc_register->MrsOp2));
+    json_object_object_add(mrs_encoding, "op1", json_object_new_int(misc_register->MrsOp2));
+    json_object_object_add(mrs_encoding, "o0", json_object_new_int(misc_register->MrsOp2));
+    json_object_object_add(register_array, "mrsEncoding", mrs_encoding);
+    json_object_object_add(register_array, "value", json_object_new_uint64(misc_register->Value));
+
+    return register_array;
 }
\ No newline at end of file
diff --git a/sections/cper-section-arm.h b/sections/cper-section-arm.h
index 98dd36c..5e1c17e 100644
--- a/sections/cper-section-arm.h
+++ b/sections/cper-section-arm.h
@@ -4,15 +4,61 @@
 #include "json.h"
 #include "../edk/Cper.h"
 
-#define ARM_PROCESSOR_ERROR_VALID_BITFIELD_NAMES (const char*[]) \
+#define ARM_ERROR_VALID_BITFIELD_NAMES (const char*[]) \
     {"mpidrValid", "errorAffinityLevelValid", "runningStateValid", "vendorSpecificInfoValid"}
-#define ARM_PROCESSOR_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES (const char*[]) \
+#define ARM_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES (const char*[]) \
     {"multipleErrorValid", "flagsValid", "errorInformationValid", "virtualFaultAddressValid", "physicalFaultAddressValid"}
-#define ARM_PROCESSOR_ERROR_INFO_ENTRY_FLAGS_NAMES (const char*[]) \
+#define ARM_ERROR_INFO_ENTRY_FLAGS_NAMES (const char*[]) \
     {"firstErrorCaptured", "lastErrorCaptured", "propagated", "overflow"}
-#define ARM_PROCESSOR_ERROR_INFO_ENTRY_INFO_TYPES_KEYS (int []){0, 1, 2, 3}
-#define ARM_PROCESSOR_ERROR_INFO_ENTRY_INFO_TYPES_VALUES (const char*[]){"Cache Error", "TLB Error", \
+#define ARM_CACHE_TLB_ERROR_VALID_BITFIELD_NAMES (const char*[]) \
+    {"transactionTypeValid", "operationValid", "levelValid", "processorContextCorruptValid", "correctedValid", \
+    "precisePCValid", "restartablePCValid"}
+#define ARM_BUS_ERROR_VALID_BITFIELD_NAMES (const char*[]) \
+    {"transactionTypeValid", "operationValid", "levelValid", "processorContextCorruptValid", "correctedValid", \
+    "precisePCValid", "restartablePCValid", "participationTypeValid", "timeOutValid", "addressSpaceValid", \
+    "memoryAttributesValid", "accessModeValid"}
+#define ARM_ERROR_TRANSACTION_TYPES_KEYS (int []){0, 1, 2}
+#define ARM_ERROR_TRANSACTION_TYPES_VALUES (const char*[]){"Instruction", "Data Access", "Generic"}
+#define ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS (int []){0, 1, 2, 3}
+#define ARM_ERROR_INFO_ENTRY_INFO_TYPES_VALUES (const char*[]){"Cache Error", "TLB Error", \
     "Bus Error", "Micro-Architectural Error"}
+#define ARM_CACHE_BUS_OPERATION_TYPES_KEYS (int []){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10}
+#define ARM_CACHE_BUS_OPERATION_TYPES_VALUES (const char*[]){"Generic Error", "Generic Read", "Generic Write", \
+    "Data Read", "Data Write", "Instruction Fetch", "Prefetch", "Eviction", "Snooping", "Snooped", "Management"}
+#define ARM_TLB_OPERATION_TYPES_KEYS (int []){0, 1, 2, 3, 4, 5, 6, 7, 8}
+#define ARM_TLB_OPERATION_TYPES_VALUES (const char*[]){"Generic Error", "Generic Read", "Generic Write", \
+    "Data Read", "Data Write", "Instruction Fetch", "Prefetch", "Local Management Operation", \
+    "External Management Operation"}
+#define ARM_BUS_PARTICIPATION_TYPES_KEYS (int []){0, 1, 2, 3}
+#define ARM_BUS_PARTICIPATION_TYPES_VALUES (const char*[]){"Local Processor Originated Request", \
+    "Local Processor Responded to Request", "Local Processor Observed", "Generic"}
+#define ARM_BUS_ADDRESS_SPACE_TYPES_KEYS (int []){0, 1, 3}
+#define ARM_BUS_ADDRESS_SPACE_TYPES_VALUES (const char*[]){"External Memory Access", "Internal Memory Access", \
+    "Device Memory Access"}
+#define ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_KEYS (int []){0, 1, 2, 3, 4, 5, 6, 7, 8}
+#define ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_VALUES (const char*[]){"AArch32 General Purpose Registers", \
+    "AArch32 EL1 Context Registers", "AArch32 EL2 Context Registers", "AArch32 Secure Context Registers" \
+    "AArch64 General Purpose Registers", "AArch64 EL1 Context Registers", "AArch64 EL2 Context Registers" \
+    "AArch64 EL3 Context Registers", "Miscellaneous System Register Structure"}
+#define ARM_AARCH32_GPR_NAMES (const char*[]){"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
+    "r10", "r11", "r12", "r13_sp", "r14_lr", "r15_pc"}
+#define ARM_AARCH32_EL1_REGISTER_NAMES (const char*[]){"dfar", "dfsr", "ifar", "isr", "mair0", "mair1", "midr", \
+    "mpidr", "nmrr", "prrr", "sctlr_ns", "spsr", "spsr_abt", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_und", \
+    "tpidrprw", "tpidruro", "tpidrurw", "ttbcr", "ttbr0", "ttbr1", "dacr"}
+#define ARM_AARCH32_EL2_REGISTER_NAMES (const char*[]){"elr_hyp", "hamair0", "hamair1", "hcr", "hcr2", "hdfar", \
+    "hifar", "hpfar", "hsr", "htcr", "htpidr", "httbr", "spsr_hyp", "vtcr", "vttbr", "dacr32_el2"}
+#define ARM_AARCH32_SECURE_REGISTER_NAMES (const char*[]){"sctlr_s", "spsr_mon"}
+#define ARM_AARCH64_GPR_NAMES (const char*[]){"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10" \
+    "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26" \
+    "x27", "x28", "x29", "x30", "sp"}
+#define ARM_AARCH64_EL1_REGISTER_NAMES (const char*[]){"elr_el1", "esr_el1", "far_el1", "isr_el1", "mair_el1", \
+    "midr_el1", "mpidr_el1", "sctlr_el1", "sp_el0", "sp_el1", "spsr_el1", "tcr_el1", "tpidr_el0", "tpidr_el1", \
+    "tpidrro_el0", "ttbr0_el1", "ttbr1_el1"}
+#define ARM_AARCH64_EL2_REGISTER_NAMES (const char*[]){"elr_el2", "esr_el2", "far_el2", "hacr_el2", "hcr_el2", \
+    "hpfar_el2", "mair_el2", "sctlr_el2", "sp_el2", "spsr_el2", "tcr_el2", "tpidr_el2", "ttbr0_el2", "vtcr_el2", \
+    "vttbr_el2"}
+#define ARM_AARCH64_EL3_REGISTER_NAMES (const char*[]){"elr_el3", "esr_el3", "far_el3", "mair_el3", "sctlr_el3", \
+    "sp_el3", "spsr_el3", "tcr_el3", "tpidr_el3", "ttbr0_el3"}
 
 json_object* cper_section_arm_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor);
 
diff --git a/sections/cper-section-ia32x64.c b/sections/cper-section-ia32x64.c
index 6eca647..bfe7d6e 100644
--- a/sections/cper-section-ia32x64.c
+++ b/sections/cper-section-ia32x64.c
@@ -251,7 +251,7 @@
         //No parseable data, just shift the head to the next item.
         //todo: Dump the unparseable data into JSON IR anyway
         *cur_pos = (void*)(context_info + 1);
-        *cur_pos = (void*)(((char*)cur_pos) + context_info->ArraySize);
+        *cur_pos = (void*)(((char*)*cur_pos) + context_info->ArraySize);
     }
     json_object_object_add(context_info_ir, "registerArray", register_array);
 
diff --git a/sections/cper-section-memory.c b/sections/cper-section-memory.c
new file mode 100644
index 0000000..d7c8d5c
--- /dev/null
+++ b/sections/cper-section-memory.c
@@ -0,0 +1,30 @@
+/**
+ * Describes functions for converting memory error CPER sections from binary and JSON format
+ * into an intermediate format.
+ * 
+ * Author: Lawrence.Tang@arm.com
+ **/
+#include <stdio.h>
+#include "json.h"
+#include "../edk/Cper.h"
+#include "../cper-utils.h"
+#include "cper-section-memory.h"
+
+//Converts a single memory error CPER section into JSON IR.
+json_object* cper_section_memory_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor)
+{
+    EFI_PLATFORM_MEMORY_ERROR_DATA* memory_error = (EFI_PLATFORM_MEMORY_ERROR_DATA*)section;
+    json_object* section_ir = json_object_new_object();
+
+    //Validation bitfield.
+    json_object* validation = bitfield_to_ir(memory_error->ValidFields, 22, MEMORY_ERROR_VALID_BITFIELD_NAMES);
+    json_object_object_add(section_ir, "validationBits", validation);
+
+    //Error status.
+    json_object* error_status = json_object_new_object();
+    json_object_object_add(error_status, "errorType", integer_to_readable_pair_with_desc(memory_error->ErrorStatus.Type, 18,
+        MEMORY_ERROR_ERROR_TYPES_KEYS,
+        MEMORY_ERROR_ERROR_TYPES_VALUES,
+        MEMORY_ERROR_ERROR_TYPES_DESCRIPTIONS,
+        "Unknown (Reserved)"));
+}
\ No newline at end of file
diff --git a/sections/cper-section-memory.h b/sections/cper-section-memory.h
new file mode 100644
index 0000000..929ee7f
--- /dev/null
+++ b/sections/cper-section-memory.h
@@ -0,0 +1,39 @@
+#ifndef CPER_SECTION_ARM_H
+#define CPER_SECTION_ARM_H
+
+#include "json.h"
+#include "../edk/Cper.h"
+
+#define MEMORY_ERROR_VALID_BITFIELD_NAMES (const char*[]) \
+    {"errorStatusValid", "physicalAddressValid", "physicalAddressMaskValid", "nodeValid", "cardValid", "moduleValid", \
+    "bankValid", "deviceValid", "rowValid", "columnValid", "bitPositionValid", "platformRequestorIDValid", \
+    "platformResponderIDValid", "memoryPlatformTargetValid", "memoryErrorTypeValid", "rankNumberValid", \
+    "cardHandleValid", "moduleHandleValid", "extendedRowBitsValid", "bankGroupValid", "bankAddressValid", \
+    "chipIdentificationValid"}
+#define MEMORY_ERROR_ERROR_TYPES_KEYS (int []){1, 16, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}
+#define MEMORY_ERROR_ERROR_TYPES_VALUES (const char*[]){"ERR_INTERNAL", "ERR_BUS", "ERR_MEM", "ERR_TLB", \
+    "ERR_CACHE", "ERR_FUNCTION", "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", "ERR_IMPROPER", "ERR_UNIMPL", \
+    "ERR_LOL", "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED"}
+#define MEMORY_ERROR_ERROR_TYPES_DESCRIPTIONS (const char*[]){\
+    "Error detected internal to the component.", \
+    "Error detected in the bus.", \
+    "Storage error in memory (DRAM).", \
+    "Storage error in TLB.", \
+    "Storage error in cache.", \
+    "Error in one or more functional units.", \
+    "Component failed self test.", \
+    "Overflow or underflow of internal queue.", \
+    "Virtual address not found on IO-TLB or IO-PDIR.", \
+    "Improper access error.", \
+    "Access to a memory address which is not mapped to any component.", \
+    "Loss of Lockstep error.", \
+    "Response not associated with a request.", \
+    "Bus parity error (must also set the A, C, or D bits).", \
+    "Detection of a protocol error.", \
+    "Detection of a PATH_ERROR.", \
+    "Bus operation timeout.", \
+    "A read was issued to data that has been poisoned."}
+
+json_object* cper_section_memory_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor);
+
+#endif
\ No newline at end of file