commit b98ec66c23ae1dc6523f778a2376f2d835506afb
author Lawrence Tang <lawrence.tang@arm.com> Wed Jul 06 16:50:21 2022 +0100
committer Lawrence Tang <lawrence.tang@arm.com> Wed Jul 06 16:50:21 2022 +0100
tree 9e5e43370e5ba15688bf1f134d9fc7a890b432f8
parent 864c0da9146878b1817eb60ff415e88eeb98bec5

Add CXL protocol, fix missing addresses on ARM.

cper-parse.c

diff --git a/cper-parse.c b/cper-parse.c
index a9c7bdc..5551fb7 100644
--- a/cper-parse.c
+++ b/cper-parse.c
@@ -22,6 +22,7 @@
 #include "sections/cper-section-dmar-vtd.h"
 #include "sections/cper-section-dmar-iommu.h"
 #include "sections/cper-section-ccix-per.h"
+#include "sections/cper-section-cxl-protocol.h"
 
 //Private pre-definitions.
 json_object* cper_header_to_ir(EFI_COMMON_ERROR_RECORD_HEADER* header);
@@ -265,8 +266,11 @@
         section_type_readable = "IOMMU specific DMAr section";
     else if (guid_equal(&section_descriptor->SectionType, &gEfiCcixPerLogErrorSectionGuid))
         section_type_readable = "CCIX PER Log Error";
+    else if (guid_equal(&section_descriptor->SectionType, &gEfiCxlProtocolErrorSectionGuid))
+        section_type_readable = "CXL Protocol Error";
 
     //todo: How do you determine if this is a CXL component event?
+    //perhaps refer to CXL Specification, Rev 2.0
     // if (guid_equal(&section_descriptor->SectionType, &gEfiProcessorGenericErrorSectionGuid))
     //     section_type_readable = "CXL Component Event";
 
@@ -338,6 +342,8 @@
         result = cper_section_dmar_iommu_to_ir(section, descriptor);
     else if (guid_equal(&descriptor->SectionType, &gEfiCcixPerLogErrorSectionGuid))
         result = cper_section_ccix_per_to_ir(section, descriptor);
+    else if (guid_equal(&descriptor->SectionType, &gEfiCxlProtocolErrorSectionGuid))
+        result = cper_section_cxl_protocol_to_ir(section, descriptor);
     else
     {
         //Failed read, unknown GUID.