commit d34f2b11bab8ee8275540075201c277e9bde06b9
author Lawrence Tang <lawrence.tang@arm.com> Tue Jul 19 15:36:31 2022 +0100
committer Lawrence Tang <lawrence.tang@arm.com> Tue Jul 19 15:36:31 2022 +0100
tree 351f14c1d3a3e2b7456eb34216090bccfd22c1d6
parent de9707f9fe72c329e3313712a7823a5463751558

Add test suite, fix a mountain of small errors.

tests/ir-tests.cpp

diff --git a/tests/ir-tests.cpp b/tests/ir-tests.cpp
new file mode 100644
index 0000000..1344379
--- /dev/null
+++ b/tests/ir-tests.cpp
@@ -0,0 +1,97 @@
+/**
+ * Defines tests for validating CPER-JSON IR output from the cper-parse library.
+ * 
+ * Author: Lawrence.Tang@arm.com
+ **/
+
+#include "gtest/gtest.h"
+#include "test-utils.hpp"
+extern "C" {
+#include "json.h"
+#include "../cper-parse.h"
+#include "../json-schema.h"
+#include "../generator/cper-generate.h"
+}
+
+/*
+* Test templates.
+*/
+void single_section_ir_test(const char* section_name)
+{
+    //Generate CPER record for generic processor.
+    char* buf;
+    size_t size;
+    FILE* record = generate_record_memstream(&section_name, 1, &buf, &size);
+
+    //Convert to IR, free resources.
+    json_object* ir = cper_to_ir(record);
+    fclose(record);
+    free(buf);
+
+    //Validate against schema.
+    char error_message[JSON_ERROR_MSG_MAX_LEN] = {0};
+    int valid = validate_schema_from_file("./specification/cper-json.json", ir, error_message);
+    ASSERT_TRUE(valid) << error_message;
+}
+
+/*
+* Single section tests.
+*/
+TEST(GenericProcessorTests, IRValid) {
+    single_section_ir_test("generic");
+}
+TEST(IA32x64Tests, IRValid) {
+    single_section_ir_test("ia32x64");
+}
+// TEST(IPFTests, IRValid) {
+//     single_section_ir_test("ipf");
+// }
+TEST(ArmTests, IRValid) {
+    single_section_ir_test("arm");
+}
+TEST(MemoryTests, IRValid) {
+    single_section_ir_test("memory");
+}
+TEST(Memory2Tests, IRValid) {
+    single_section_ir_test("memory2");
+}
+TEST(PCIeTests, IRValid) {
+    single_section_ir_test("pcie");
+}
+TEST(FirmwareTests, IRValid) {
+    single_section_ir_test("firmware");
+}
+TEST(PCIBusTests, IRValid) {
+    single_section_ir_test("pcibus");
+}
+TEST(PCIDevTests, IRValid) {
+    single_section_ir_test("pcidev");
+}
+TEST(DMArGenericTests, IRValid) {
+    single_section_ir_test("dmargeneric");
+}
+TEST(DMArVtdTests, IRValid) {
+    single_section_ir_test("dmarvtd");
+}
+TEST(DMArIOMMUTests, IRValid) {
+    single_section_ir_test("dmariommu");
+}
+TEST(CCIXPERTests, IRValid) {
+    single_section_ir_test("ccixper");
+}
+TEST(CXLProtocolTests, IRValid) {
+    single_section_ir_test("cxlprotocol");
+}
+TEST(CXLComponentTests, IRValid) {
+    single_section_ir_test("cxlcomponent");
+}
+TEST(UnknownSectionTests, IRValid) {
+    single_section_ir_test("unknown");
+}
+
+//Entrypoint for the testing program.
+int main()
+{
+    testing::InitGoogleTest();
+    return RUN_ALL_TESTS();
+}
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