Formatting .c/.h files and fix memory leakage issues
Signed-off-by: John Chung <john.chung@arm.com>
Change-Id: Id8328f412c2724992d80c0b3f895c8f85bc4ae68
diff --git a/sections/cper-section.c b/sections/cper-section.c
index 82a44a5..9bffdcb 100644
--- a/sections/cper-section.c
+++ b/sections/cper-section.c
@@ -23,26 +23,52 @@
//Definitions of all sections available to the CPER parser.
CPER_SECTION_DEFINITION section_definitions[] = {
- {&gEfiProcessorGenericErrorSectionGuid, "Processor Generic", cper_section_generic_to_ir, ir_section_generic_to_cper},
- {&gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64", cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper},
- {&gEfiIpfProcessorErrorSectionGuid, "IPF", NULL, NULL},
- {&gEfiArmProcessorErrorSectionGuid, "ARM", cper_section_arm_to_ir, ir_section_arm_to_cper},
- {&gEfiPlatformMemoryErrorSectionGuid, "Platform Memory", cper_section_platform_memory_to_ir, ir_section_memory_to_cper},
- {&gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2", cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper},
- {&gEfiPcieErrorSectionGuid, "PCIe", cper_section_pcie_to_ir, ir_section_pcie_to_cper},
- {&gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference", cper_section_firmware_to_ir, ir_section_firmware_to_cper},
- {&gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus", cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper},
- {&gEfiPciDevErrorSectionGuid, "PCI Component/Device", cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper},
- {&gEfiDMArGenericErrorSectionGuid, "DMAr Generic", cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper},
- {&gEfiDirectedIoDMArErrorSectionGuid, "Intel VT for Directed I/O Specific DMAr", cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper},
- {&gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr", cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper},
- {&gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error", cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper},
- {&gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error", cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper},
- {&gEfiCxlGeneralMediaErrorSectionGuid, "CXL General Media Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
- {&gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
- {&gEfiCxlMemoryModuleErrorSectionGuid, "CXL Memory Module Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
- {&gEfiCxlPhysicalSwitchErrorSectionGuid, "CXL Physical Switch Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
- {&gEfiCxlVirtualSwitchErrorSectionGuid, "CXL Virtual Switch Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
- {&gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper},
+ { &gEfiProcessorGenericErrorSectionGuid, "Processor Generic",
+ cper_section_generic_to_ir, ir_section_generic_to_cper },
+ { &gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64",
+ cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper },
+ { &gEfiIpfProcessorErrorSectionGuid, "IPF", NULL, NULL },
+ { &gEfiArmProcessorErrorSectionGuid, "ARM", cper_section_arm_to_ir,
+ ir_section_arm_to_cper },
+ { &gEfiPlatformMemoryErrorSectionGuid, "Platform Memory",
+ cper_section_platform_memory_to_ir, ir_section_memory_to_cper },
+ { &gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2",
+ cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper },
+ { &gEfiPcieErrorSectionGuid, "PCIe", cper_section_pcie_to_ir,
+ ir_section_pcie_to_cper },
+ { &gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference",
+ cper_section_firmware_to_ir, ir_section_firmware_to_cper },
+ { &gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus",
+ cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper },
+ { &gEfiPciDevErrorSectionGuid, "PCI Component/Device",
+ cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper },
+ { &gEfiDMArGenericErrorSectionGuid, "DMAr Generic",
+ cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper },
+ { &gEfiDirectedIoDMArErrorSectionGuid,
+ "Intel VT for Directed I/O Specific DMAr",
+ cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper },
+ { &gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr",
+ cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper },
+ { &gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error",
+ cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper },
+ { &gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error",
+ cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper },
+ { &gEfiCxlGeneralMediaErrorSectionGuid,
+ "CXL General Media Component Error", cper_section_cxl_component_to_ir,
+ ir_section_cxl_component_to_cper },
+ { &gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error",
+ cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
+ { &gEfiCxlMemoryModuleErrorSectionGuid,
+ "CXL Memory Module Component Error", cper_section_cxl_component_to_ir,
+ ir_section_cxl_component_to_cper },
+ { &gEfiCxlPhysicalSwitchErrorSectionGuid,
+ "CXL Physical Switch Component Error",
+ cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
+ { &gEfiCxlVirtualSwitchErrorSectionGuid,
+ "CXL Virtual Switch Component Error",
+ cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
+ { &gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error",
+ cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
};
-const size_t section_definitions_len = sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION);
\ No newline at end of file
+const size_t section_definitions_len =
+ sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION);