witherspoon power script updates
Among other fixes, these changes allow the P9
DD1.X VCS workaround to be removed. That will
be handled in a following commit.
Change-Id: Ifc4bbf1ddb7cdd9e2a52d891b37aceb3622a04e7
Signed-off-by: Matt Spinler <spinler@us.ibm.com>
diff --git a/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/avsbus-enable.sh b/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/avsbus-enable.sh
index a6be2de..6306c58 100644
--- a/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/avsbus-enable.sh
+++ b/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/avsbus-enable.sh
@@ -1,16 +1,22 @@
#!/bin/sh
i2cset -y 4 0x70 0x00 0x00 b # VDD 0 - PAGE set
+i2cset -y 4 0x70 0x21 0x00 0x01 i # VDD 0 - Set default HW boot voltage
i2cset -y 4 0x70 0x01 0xB0 b # VDD 0
i2cset -y 4 0x70 0x00 0x01 b # VCS 0 - PAGE set
+i2cset -y 4 0x70 0x21 0x08 0x01 i # VCS 0 - Set default HW boot voltage
i2cset -y 4 0x70 0x01 0xB0 b # VCS 0
i2cset -y 4 0x70 0x00 0x00 b # VCS 0 - PAGE reset
i2cset -y 4 0x71 0x00 0x00 b # VDN 0 - PAGE set
+i2cset -y 4 0x71 0x21 0x00 0x01 i # VDN 0 - Set default HW boot voltage
i2cset -y 4 0x71 0x01 0xB0 b # VDN 0
i2cset -y 5 0x70 0x00 0x00 b # VDD 1 - PAGE set
+i2cset -y 5 0x70 0x21 0x00 0x01 i # VDD 1 - Set default HW boot voltage
i2cset -y 5 0x70 0x01 0xB0 b # VDD 1
i2cset -y 5 0x70 0x00 0x01 b # VCS 1 - PAGE set
+i2cset -y 5 0x70 0x21 0x08 0x01 i # VCS 1 - Set default HW boot voltage
i2cset -y 5 0x70 0x01 0xB0 b # VCS 1
i2cset -y 5 0x70 0x00 0x00 b # VCS 1 - PAGE reset
i2cset -y 5 0x71 0x00 0x00 b # VDN 1 - PAGE set
+i2cset -y 5 0x71 0x21 0x00 0x01 i # VDN 1 - Set default HW boot voltage
i2cset -y 5 0x71 0x01 0xB0 b # VDN 1
diff --git a/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/power-workarounds.sh b/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/power-workarounds.sh
index 132205a..33a3189 100644
--- a/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/power-workarounds.sh
+++ b/meta-witherspoon/recipes-phosphor/chassis/avsbus-control/power-workarounds.sh
@@ -1,9 +1,24 @@
#!/bin/sh
-i2cset -y 4 0x12 0x2E 0x23 b # VDD/VCS 0
-i2cset -y 4 0x13 0x2E 0x23 b # VDN 0
-i2cset -y 5 0x12 0x2E 0x23 b # VDD/VCS 1
-i2cset -y 5 0x13 0x2E 0x23 b # VDN 1
+# ensure VCS ON_OFF_CONFIG set correctly from prior FW drivers
+# A side
+i2cset -y 4 0x70 0x00 0x01 b
+i2cset -y 4 0x70 0x02 0x16 b #respond to ENABLE pin
+i2cset -y 4 0x70 0x00 0x00 b
+# B side
+i2cset -y 5 0x70 0x00 0x01 b
+i2cset -y 5 0x70 0x02 0x16 b #respond to ENABLE pin
+i2cset -y 5 0x70 0x00 0x00 b
+
+# vddio = 1.0V, mdat/sdat PU enabled
+i2cset -y 4 0x12 0xFF 0x00 b # VDD/VCS 0
+i2cset -y 4 0x12 0x2E 0x03 b # VDD/VCS 0
+i2cset -y 4 0x13 0xFF 0x00 b # VDN 0
+i2cset -y 4 0x13 0x2E 0x03 b # VDN 0
+i2cset -y 5 0x12 0xFF 0x00 b # VDD/VCS 1
+i2cset -y 5 0x12 0x2E 0x03 b # VDD/VCS 1
+i2cset -y 5 0x13 0xFF 0x00 b # VDN 1
+i2cset -y 5 0x13 0x2E 0x03 b # VDN 1
# A side VDDR - set to 1.23V
i2cset -y 4 0x71 0x00 0x01
@@ -37,6 +52,40 @@
fi
fi
+# make sure VCS ON_OFF_CONFIG set correctly from old FW releases
+i2cset -y 11 0x64 0x00 0x0E i
+i2cset -y 11 0x64 0x02 0x16 i
+i2cset -y 11 0x64 0x00 0x0F i
+i2cset -y 11 0x64 0x02 0x16 i
+
+## move memory enables to align with VDN (VDN to VDDR leakage issue)
+#GPO_CONFIG_1 (GPIO15) : mem 0 reg enables
+i2cset -y 11 0x64 0xF7 0x00 i
+i2cset -y 11 0x64 0xF8 0x15 0x6E 0x80 0x08 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 i
+#GPO_CONFIG_2 (GPIO7) : mem 1 reg enables
+i2cset -y 11 0x64 0xF7 0x01 i
+i2cset -y 11 0x64 0xF8 0x15 0x16 0x80 0x08 0x00 0x00 0x20 0x40 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 i
+
+# change VDN delays based on UCD MFR_REVISION setting
+REV=`i2cget -y 11 0x64 0x9B i 2|cut -f2 -d' '`
+if [ "$REV" == "0x01" -o "$REV" == "0x02" ] ; then
+ # use 20ms delay for VDN
+ #TON_DELAY rail 8
+ i2cset -y 11 0x64 0x00 0x07 i
+ i2cset -y 11 0x64 0x60 0x80 0xDA i
+ #TON_DELAY rail 9
+ i2cset -y 11 0x64 0x00 0x08 i
+ i2cset -y 11 0x64 0x60 0x80 0xDA i
+else
+ # use 70ms delay for VDN
+ #TON_DELAY rail 8
+ i2cset -y 11 0x64 0x00 0x07 i
+ i2cset -y 11 0x64 0x60 0x30 0xEA i
+ #TON_DELAY rail 9
+ i2cset -y 11 0x64 0x00 0x08 i
+ i2cset -y 11 0x64 0x60 0x30 0xEA i
+fi
+
# Raise AVDD +100mV
i2cset -y 11 0x64 0x00 0x09 i # set PAGE
i2cset -y 11 0x64 0xF5 0x81 i # set margin_config
@@ -45,10 +94,10 @@
# Increase over-current settings
#VDD A phase current
i2cset -y 4 0x12 0xFF 0x04 b # set window register high byte to 4
-i2cset -y 4 0x12 0x3C 0xFF b # Disable
+i2cset -y 4 0x12 0x3C 0x80 b # Set to 64A
#VDD B phase current
i2cset -y 5 0x12 0xFF 0x04 b # set window register high byte to 4
-i2cset -y 5 0x12 0x3C 0xFF b # Disable
+i2cset -y 5 0x12 0x3C 0x80 b # Set to 64A
#VDD A master OC fault to 445A
i2cset -y 4 0x70 0x00 0x00 b # PAGE
i2cset -y 4 0x70 0x46 0x08DE w
@@ -59,6 +108,16 @@
i2cset -y 5 0x70 0x46 0x08DE w
# VDD B master OC warn to 384A
i2cset -y 5 0x70 0x4A 0x08C0 w
+#VCS phase current to 30A C/C
+i2cset -y 4 0x12 0xFF 0x08 b # set window register to 8
+i2cset -y 4 0x12 0x3C 0x3C b # 30A
+i2cset -y 5 0x12 0xFF 0x08 b # set window register to 8
+i2cset -y 5 0x12 0x3C 0x3C b # 30A
+#VCS master OC to 43A
+i2cset -y 4 0x70 0x00 0x01 # PAGE 1
+i2cset -y 4 0x70 0x46 0x0816 w # OC to 43A
+i2cset -y 5 0x70 0x00 0x01 # PAGE 1
+i2cset -y 5 0x70 0x46 0x0816 w # OC to 43A
# re-bind ucd driver only if we unbound it (i.e. ucd has been set with a value)
if [ -e $ucdpath -a -n "$ucd" ]; then