Initial Witherspoon layer
Witherspoon is an IBM branded OpenPOWER system aimed at the HPC
market.
It should be noted that this doesn't boot cleanly with the current
4.6 branch.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-witherspoon/recipes-phosphor/skeleton/skeleton.bbappend b/meta-witherspoon/recipes-phosphor/skeleton/skeleton.bbappend
new file mode 100644
index 0000000..be66c92
--- /dev/null
+++ b/meta-witherspoon/recipes-phosphor/skeleton/skeleton.bbappend
@@ -0,0 +1,2 @@
+FILESEXTRAPATHS_append := "${THISDIR}/${PN}:"
+SRC_URI += "file://0001-Set-witherspoon-power-pin-and-pgood-nets.patch"
diff --git a/meta-witherspoon/recipes-phosphor/skeleton/skeleton/0001-Set-witherspoon-power-pin-and-pgood-nets.patch b/meta-witherspoon/recipes-phosphor/skeleton/skeleton/0001-Set-witherspoon-power-pin-and-pgood-nets.patch
new file mode 100644
index 0000000..b0a0037
--- /dev/null
+++ b/meta-witherspoon/recipes-phosphor/skeleton/skeleton/0001-Set-witherspoon-power-pin-and-pgood-nets.patch
@@ -0,0 +1,30 @@
+From 840d78ae902fa8ce7ba356de4aa685c1ebab3efc Mon Sep 17 00:00:00 2001
+From: Brad Bishop <bradleyb@fuzziesquirrel.com>
+Date: Thu, 16 Jun 2016 11:01:24 -0400
+Subject: [PATCH] Set witherspoon power pin and pgood nets
+
+Currently pointed at barreleye nets.
+
+Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
+---
+ op-pwrctl/power_control_obj.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/op-pwrctl/power_control_obj.c b/op-pwrctl/power_control_obj.c
+index 85a8cff..7bb7004 100644
+--- a/git/op-pwrctl/power_control_obj.c
++++ b/git/op-pwrctl/power_control_obj.c
+@@ -17,8 +17,8 @@ static const gchar* instance_name = "power0";
+ static const gchar* dbus_name = "org.openbmc.control.Power";
+
+ //This object will use these GPIOs
+-GPIO power_pin = (GPIO){ "POWER_PIN" };
+-GPIO pgood = (GPIO){ "PGOOD" };
++GPIO power_pin = (GPIO){ "BMC_POWER_UP" };
++GPIO pgood = (GPIO){ "SYS_PWROK_BUFF" };
+ GPIO usb_reset = (GPIO){ "USB_RESET" };
+ GPIO pcie_reset = (GPIO){ "PCIE_RESET" };
+
+--
+2.1.4
+