meta-zaius: Fix up host reference clock after power on
Zaius's host reference clock generator IC requires an output
configuration fixup before trying to send the P9 host any FSI
transactions. The IC is powered by the main 3.3V rail (the BMC runs
from standby 3.3V), so the fixup has to be applied every time after it
is powered on.
Add script that performs the I2C writes to the clock gen.
Add systemd service that launches the script following power on.
Add bitbake recipe to install service.
Add image build append to build service into image.
Signed-off-by: Xo Wang <xow@google.com>
Change-Id: I8b1b83d0dabbb86439a043f8a1d9cdcb56986c45
diff --git a/meta-zaius/recipes-phosphor/chassis/refclock-fixup/fix_zaius_refclock.sh b/meta-zaius/recipes-phosphor/chassis/refclock-fixup/fix_zaius_refclock.sh
new file mode 100755
index 0000000..01eb72b
--- /dev/null
+++ b/meta-zaius/recipes-phosphor/chassis/refclock-fixup/fix_zaius_refclock.sh
@@ -0,0 +1,27 @@
+#!/bin/sh
+# fix up refclock by reconfiguring output of Si5338C clock generator
+
+i2cset="i2cset"
+clkgen_i2c_bus="0"
+clkgen_i2c_addr="0x70"
+
+# Usage: clkgen_write <address> <data> [write length]
+clkgen_write()
+{
+ $i2cset -y $clkgen_i2c_bus $clkgen_i2c_addr $1 $2 $3
+}
+
+# disable outputs
+clkgen_write 230 0x10 b
+
+# set output configurations of each of the four channels to 3.3V HCSL
+clkgen_write 36 0x07 b
+clkgen_write 37 0x07 b
+clkgen_write 38 0x07 b
+clkgen_write 39 0x07 b
+clkgen_write 40 0xe7 b
+clkgen_write 41 0x9c b
+clkgen_write 42 0x27 b
+
+# enable outputs
+clkgen_write 230 0x00 b