intel-ipmi-oem: srcrev bump 32825a2332..eaeb6cb06c
Yong Li (3):
Enable sensitive ME commands in MFG mode
Add clear cmos OEM command into white list
Change CPLD clear cmos command register is changed to 0x61
Change-Id: If411c239f188636a6ce1c74e853c3c3c65d39344
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
diff --git a/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb b/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
index 4d26553..9fd481a 100755
--- a/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
+++ b/meta-common/recipes-intel/ipmi/intel-ipmi-oem_git.bb
@@ -5,7 +5,7 @@
LIC_FILES_CHKSUM = "file://LICENSE;md5=a6a4edad4aed50f39a66d098d74b265b"
SRC_URI = "git://github.com/openbmc/intel-ipmi-oem"
-SRCREV = "32825a23324c2cf051bb5608348b8ea2109a36b5"
+SRCREV = "eaeb6cb06c9826bc18dd7d4251cefb63905f2d5d"
S = "${WORKDIR}/git"
PV = "0.1+git${SRCPV}"