x86-power-control: srcrev bump e7520ba18a..fc1ecc5910

Vijay Khemka (1):
      Add phosphor log

Change-Id: Id4897a03810b55f271dda58ebc3c8c801cd4e969
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
diff --git a/meta-common/recipes-intel/chassis/x86-power-control_git.bb b/meta-common/recipes-intel/chassis/x86-power-control_git.bb
index 2922b6a..7dd149e 100755
--- a/meta-common/recipes-intel/chassis/x86-power-control_git.bb
+++ b/meta-common/recipes-intel/chassis/x86-power-control_git.bb
@@ -2,7 +2,7 @@
 DESCRIPTION = "Chassis Power Control service for Intel based platforms"
 
 SRC_URI = "git://github.com/openbmc/x86-power-control.git;protocol=ssh"
-SRCREV = "e7520ba18a5b5ba6c8eb7a9d543704f9699295a1"
+SRCREV = "fc1ecc59100d21c953501703bc5db9e02e25b333"
 
 PV = "1.0+git${SRCPV}"