tree ebfbfc7e5851c97c868d17a1c485301748c218fb
parent f525a14ffcd06c41c512565ace585910a36e2c02
author Benjamin Fair <benjaminfair@google.com> 1608598302 -0800
committer Benjamin Fair <benjaminfair@google.com> 1608598599 -0800

meta-nuvoton: npcm7xx-bootblock: upgrade to 10.10.16

Changelog from 10.10.09:
 * MC: Enhanced training optimization.
 * SPI0 frequency is now only limited to be up to 50MHz (remove 40MHz
lower limit). This check is only performed if PLLs are changes (RUN_BMC
or new header frequency values).
 * Fix an issue in INTCR3 settings (FIU_FIX field).
 * MC: in enhanced training: change the sweep range accrording to the
location of the step. (run time optimization)

Change-Id: If9046785349b7eae9e98f57a40c3eb0c0e9994cc
Signed-off-by: Benjamin Fair <benjaminfair@google.com>