| commit | f90dac58bf0830ee2896c1ed2298e7cc58533b0d | [log] [tgz] |
|---|---|---|
| author | Joseph Liu <kwliu@nuvoton.com> | Mon Nov 11 19:00:49 2019 +0800 |
| committer | Benjamin Fair <benjaminfair@google.com> | Sat Dec 14 01:22:29 2019 +0000 |
| tree | 09dc2478d8a66788f9f20e9d70f32da7382cd39b | |
| parent | 0978a0f77c6b213770f08804d3a9ea8f96946e7e [diff] |
u-boot-nuvoton: srcrev bump 053010cb581..adb4ac1af3f Stanley Chu(1): npcm7xx: invalidate L2 cache in lowlevel_init Joseph Liu(3): runbmc: don't reset all gpio bank if core domain reset Revert "runbmc: don't reset all gpio bank if core domain reset" runbmc: don't reset gpiom5 if core domain reset Signed-off-by: Joseph Liu <kwliu@nuvoton.com> Change-Id: Id5b74dbca76164455e018d1e25de04380aa60f1c
This is the Nuvoton NPCM7XX Board Support Package (BSP) layer. The NPCM7XX is an ARM based SoC with external DDR RAM and supports a large set of peripherals made by Nuvoton. More information about the NPCM7XX can be found here.