Enable P9 to externally report checkstops.
Setup P9 to enable its checkstop GPIO so the BMC can
detect them. The P9 is not able to set these registers
itself.
Change-Id: I4d061b16b9ef6b71e953be6aaa861ede71bcbe48
Signed-off-by: Matt Spinler <spinler@us.ibm.com>
diff --git a/common/recipes-phosphor/host/op-pdbg-host-control/start_host.sh b/common/recipes-phosphor/host/op-pdbg-host-control/start_host.sh
index 7a013aa..a34c03b 100755
--- a/common/recipes-phosphor/host/op-pdbg-host-control/start_host.sh
+++ b/common/recipes-phosphor/host/op-pdbg-host-control/start_host.sh
@@ -14,5 +14,10 @@
#Can maybe be removed in DD2
putcfam -a 0x2918 0x0000000C 0x0000000C
+#Allow xstop/ATTN to flow to BMC
+putcfam -p0 0x081C 0x20000000 # Setup FSI2PIB to report
+putcfam -p0 0x100D 0x60000000 # Enable Xstop/ATTN interrupt
+putcfam -p0 0x100B 0xFFFFFFFF # Arm mechanism
+
putcfam -p0 0x283f 0x20000000 # Write scratch register 8
putcfam -p0 0x2801 0x80000000 0x80000000 # Set SBE start bit to start IPL