Adding latest RAS test scenarios to v2.0-stable.
Change-Id: Ica56fc5db00ba8096d8a8904c217f0edbbf56534
Signed-off-by: Sridevi Ramesh <sridevra@in.ibm.com>
diff --git a/lib/ras/host_utils.robot b/lib/ras/host_utils.robot
index d3ac972..bf989dd 100644
--- a/lib/ras/host_utils.robot
+++ b/lib/ras/host_utils.robot
@@ -1,13 +1,14 @@
*** Settings ***
-Documentation This module is for OS checkstop opertions.
+Documentation Utility for error injection scenarios through HOST & BMC.
Resource ../../lib/rest_client.robot
Resource ../../lib/utils.robot
Variables ../../lib/ras/variables.py
Library ../../lib/bmc_ssh_utils.py
-Library OperatingSystem
Library ../../lib/gen_print.py
Library ../../lib/gen_robot_print.py
+Library OperatingSystem
+
*** Keywords ***
Getscom Operations On OS
@@ -98,7 +99,8 @@
[Return] ${translated_addr[1]}
Inject Error Through HOST
- [Documentation] Inject checkstop on processor through HOST.
+ [Documentation] Inject checkstop on multiple targets like
+ ... CPU/CME/OCC/NPU/CAPP/MCA etc through HOST.
... Test sequence:
... 1. Boot To HOST
... 2. Clear any existing gard records
@@ -111,15 +113,16 @@
# threshold_limit Threshold limit (e.g 1, 5, 32).
# master_proc_chip Processor chip type (True' or 'False').
- Delete All Error Logs
+ Delete Error Logs
Login To OS Host
+ Set Auto Reboot 1
Gard Operations On OS clear all
# Fetch processor chip IDs.
${proc_chip_id}= Get ProcChipId From OS Processor ${master_proc_chip}
${threshold_limit}= Convert To Integer ${threshold_limit}
- :FOR ${i} IN RANGE ${threshold_limit}
+ :FOR ${count} IN RANGE ${threshold_limit}
\ Run Keyword Putscom Operations On OS ${proc_chip_id} ${fir}
... ${chip_address}
# Adding delay after each error injection.
@@ -142,7 +145,7 @@
${no_of_states}= Convert To Integer ${output}
# Disable state for all cpus.
- :FOR ${i} IN RANGE ${no_of_states}
+ :FOR ${count} IN RANGE ${no_of_states}
\ ${cmd}= Catenate SEPARATOR= for file_path in /sys/devices/system/cpu/
... cpu*/cpuidle/state${i}/disable; do echo 1 > $file_path; done
\ ${output} ${stderr} ${rc}= Run Keyword OS Execute Command ${cmd}
@@ -165,3 +168,46 @@
OS Execute Command service opal-prd start
${opal_prd_state}= Is Opal-PRD Service Enabled
Should Contain ${opal_prd_state} enabled
+
+BMC Putscom
+ [Documentation] Executes putscom command through BMC.
+
+ [Arguments] ${proc_chip_id} ${fru} ${chip_address}
+
+ # Description of argument(s):
+ # proc_chip_id Processor ID (e.g '0', '8').
+ # fru FRU (field replaceable unit) (e.g. '2011400').
+ # chip_address Chip address (e.g. '4000000000000000').
+
+ ${cmd}= Catenate pdbg -d p9w -p${proc_chip_id} putscom 0x${fru} 0x${chip_address}
+
+ BMC Execute Command ${cmd}
+
+Inject Error Through BMC
+ [Documentation] Inject checkstop on multiple targets like
+ ... CPU/CME/OCC/NPU/CAPP/MCA etc through BMC.
+ ... Test sequence:
+ ... 1. Boot To HOST.
+ ... 2. Clear any existing gard records.
+ ... 3. Inject Error on processor/centaur.
+ [Arguments] ${fir} ${chip_address} ${threshold_limit}
+ ... ${master_proc_chip}=True
+ # Description of argument(s):
+ # fir FIR (Fault isolation register) value (e.g. '2011400').
+ # chip_address Chip address (e.g. '2000000000000000').
+ # threshold_limit Recoverable error threshold limit (e.g. '1', '5', '32').
+
+ Delete Error Logs
+ Login To OS Host
+ Set Auto Reboot 1
+
+ Gard Operations On OS clear all
+
+ ${threshold_limit}= Convert To Integer ${threshold_limit}
+ :FOR ${count} IN RANGE ${threshold_limit}
+ \ BMC Putscom 0 ${fir}
+ ... ${chip_address}
+ # Adding delay after each error injection.
+ \ Sleep 10s
+ # Adding delay to get error log after error injection.
+ Sleep 120s
diff --git a/lib/ras/variables.py b/lib/ras/variables.py
index dc7ca75..538403f 100644
--- a/lib/ras/variables.py
+++ b/lib/ras/variables.py
@@ -8,8 +8,8 @@
DES_MCA_UE = "'MCACALFIR[^10].*State machine'"
-DES_MCS_RECV1 = "'MCFIR[^0].*mc internal recoverable'"
-DES_MCS_UE = "'MCFIR[^1].*mc internal non recovervabl'"
+DES_MCI_RECV1 = "'MCFIR[^0].*mc internal recoverable'"
+DES_MCI_UE = "'MCFIR[^1].*mc internal non recovervabl'"
DES_NX_RECV1 = "'NXDMAENGFIR[^13].*Channel 4 GZIP ECC PE'"
DES_NX_RECV32 = "'NXDMAENGFIR[^4].*Channel 0 842 engine ECC'"
@@ -53,8 +53,8 @@
'MCACALIFIR_RECV32': ['07010900', '2000000000000000',
DES_MCA_RECV32],
'MCACALIFIR_UE': ['07010900', '0020000000000000', DES_MCA_UE],
- 'MCS_RECV1': ['05010800', '8000000000000000', DES_MCS_RECV1],
- 'MCS_UE': ['05010800', '4000000000000000', DES_MCS_UE],
+ 'MCI_RECV1': ['05010800', '8000000000000000', DES_MCI_RECV1],
+ 'MCI_UE': ['05010800', '4000000000000000', DES_MCI_UE],
'NX_RECV1': ['02011100', '0004000000000000', DES_NX_RECV1],
'NX_UE': ['02011100', '0400000000000000', DES_NX_UE],
'NX_RECV32': ['02011100', '0800000000000000', DES_NX_RECV32],