diff --git a/extended/test_host_ras.robot b/extended/test_host_ras.robot
index 8d3b518..4cda59a 100755
--- a/extended/test_host_ras.robot
+++ b/extended/test_host_ras.robot
@@ -258,6 +258,8 @@
     Inject Recoverable Error With Threshold Limit Through Host
     ...  ${translated_fir}  ${value[1]}  1  ${value[2]}  ${err_log_path}
 
+# Nest control vunit (NCUFIR) related error injection.
+
 Verify Recoverable Callout Handling For NCUFIR With Threshold 1
     [Documentation]  Verify recoverable callout handling for NCUFIR with
     ...              threshold 1.
@@ -269,6 +271,65 @@
     Inject Recoverable Error With Threshold Limit Through Host
     ...  ${translated_fir}  ${value[1]}  1  ${value[2]}  ${err_log_path}
 
+Verify Unrecoverable Callout Handling For NCUFIR 
+    [Documentation]  Verify unrecoverable callout handling for NCUFIR.
+    [Tags]  Verify_Unrecoverable_Callout_Handling_For_NCUFIR
+
+    ${value}=  Get From Dictionary  ${ERROR_INJECT_DICT}  NCUFIR_UE 
+    ${translated_fir}=  Fetch FIR Address Translation Value  ${value[0]}  EX
+    ${err_log_path}=  Catenate  ${RAS_LOG_DIR_PATH}ncufir_ue
+    Inject Unrecoverable Error Through Host
+    ...  ${translated_fir}  ${value[1]}  1  ${value[2]}  ${err_log_path}
+
+# Core FIR related error injection.
+
+Verify Recoverable Callout Handling For CoreFIR With Threshold 5
+    [Documentation]  Verify recoverable callout handling for CoreFIR with
+    ...              threshold 5.
+    [Tags]  Verify_Recoverable_Callout_Handling_For_CoreFIR_With_Threshold_5
+
+    ${value}=  Get From Dictionary  ${ERROR_INJECT_DICT}  COREFIR_RECV5
+    ${translated_fir}=  Fetch FIR Address Translation Value  ${value[0]}  EX
+    Disable CPU States Through HOST
+    ${err_log_path}=  Catenate  ${RAS_LOG_DIR_PATH}corefir_th5
+    Inject Recoverable Error With Threshold Limit Through Host
+    ...  ${value[0]}  ${value[1]}  5  ${value[2]}  ${err_log_path}
+
+Verify Recoverable Callout Handling For CoreFIR With Threshold 1
+    [Documentation]  Verify recoverable callout handling for CoreFIR with
+    ...              threshold 1.
+    [Tags]  Verify_Recoverable_Callout_CoreFIR_Handling_For_With_Threshold_1
+
+    ${value}=  Get From Dictionary  ${ERROR_INJECT_DICT}  COREFIR_RECV1
+    ${translated_fir}=  Fetch FIR Address Translation Value  ${value[0]}  EX
+    Disable CPU States Through HOST
+    ${err_log_path}=  Catenate  ${RAS_LOG_DIR_PATH}corefir_th1
+    Inject Recoverable Error With Threshold Limit Through Host
+    ...  ${value[0]}  ${value[1]}  1  ${value[2]}  ${err_log_path}
+
+Verify Unrecoverable Callout Handling For CoreFIR
+    [Documentation]  Verify unrecoverable callout handling for CoreFIR.
+    [Tags]  Verify_Unrecoverable_Callout_Handling_For_CoreFIR
+
+    ${value}=  Get From Dictionary  ${ERROR_INJECT_DICT}  COREFIR_UE
+    ${translated_fir}=  Fetch FIR Address Translation Value  ${value[0]}  EX
+    Disable CPU States Through HOST
+    ${err_log_path}=  Catenate  ${RAS_LOG_DIR_PATH}corefir_ue
+    Inject Unrecoverable Error Through Host
+    ...  ${value[0]}  ${value[1]}  1  ${value[2]}  ${err_log_path}
+
+Verify Recoverable Callout Handling For EQFIR With Threshold 32
+    [Documentation]  Verify recoverable callout handling for L3FIR with
+    ...              threshold 32.
+    [Tags]  Verify_Recoverable_Callout_Handling_For_EQFIR_With_Threshold_32
+
+    ${value}=  Get From Dictionary  ${ERROR_INJECT_DICT}  EQFIR_RECV32
+    ${translated_fir}=  Fetch FIR Address Translation Value  ${value[0]}  EQ
+    ${err_log_path}=  Catenate  ${RAS_LOG_DIR_PATH}eqfir_th32
+    Inject Recoverable Error With Threshold Limit Through Host
+    ...  ${translated_fir}  ${value[1]}  32  ${value[2]}  ${err_log_path}
+
+
 *** Keywords ***
 
 Verify And Clear Gard Records On HOST
diff --git a/lib/ras/host_utils.robot b/lib/ras/host_utils.robot
index 4e4efdd..9ab425e 100644
--- a/lib/ras/host_utils.robot
+++ b/lib/ras/host_utils.robot
@@ -5,6 +5,8 @@
 Variables           ../../lib/ras/variables.py
 Library             ../../lib/bmc_ssh_utils.py
 Library             OperatingSystem
+Library             ../../lib/gen_print.py
+Library             ../../lib/gen_robot_print.py
 
 *** Keywords ***
 
@@ -17,7 +19,6 @@
     #                -c|--chip <chip-id> <addr>
 
     ${output}  ${stderr}  ${rc}=  OS Execute Command  getscom ${input_cmd}
-    Should Be Empty  ${stderr}
     [Return]  ${output}
 
 Gard Operations On OS
@@ -28,7 +29,6 @@
     # input_cmd      list/clear all/show <gard_record_id>
 
     ${output}  ${stderr}  ${rc}=  OS Execute Command  opal-gard ${input_cmd}
-    Should Be Empty  ${stderr}
     [Return]  ${output}
 
 Putscom Operations On OS
@@ -75,7 +75,6 @@
     ${cmd}=  Catenate  set -o pipefail ; ${probe_cpu_file_path}
     ...    | grep -i 'CHIP ID: ${proc_chip_id}' | cut -c21-22
     ${output}  ${stderr}  ${rc}=  OS Execute Command  ${cmd}
-    Should Be Empty  ${stderr}
     ${core_ids}=  Split String  ${output}
     # Example output:
     # ['2', '3', '4', '5', '6']
@@ -93,7 +92,6 @@
     ${cmd}=  Catenate  set -o pipefail ; ${addr_translation_file_path} ${fir}
     ...  ${core_id} | grep -i ${target_type}
     ${output}  ${stderr}  ${rc}=  OS Execute Command  ${cmd}
-    Should Be Empty  ${stderr}
     ${translated_addr}=  Split String  ${output}  :${SPACE}0x
     # Example output:
     # 0x10010c00
@@ -134,3 +132,10 @@
     ...   host during PNOR code update.
 
     Inject Error Through HOST  05010800  4000000000000000  1
+
+Disable CPU States Through HOST
+    [Documentation]  Disable CPU states through host.
+
+    ${cmd}=  Catenate  SEPARATOR=  for file_path in /sys/devices/system/cpu/
+    ...  cpu*/cpuidle/state*/disable; do echo 0 > $file_path; done
+    ${output}  ${stderr}  ${rc}=  OS Execute Command  ${cmd}
diff --git a/lib/ras/variables.py b/lib/ras/variables.py
index 0964259..a67804b 100644
--- a/lib/ras/variables.py
+++ b/lib/ras/variables.py
@@ -35,6 +35,11 @@
 DES_CME_RECV1 = "'CMEFIR[^7].*PPE SRAM Uncorrectable Err'"
 DES_EQ_RECV32 = "'EQ_LFIR[^1].*CFIR internal parity'"
 DES_NCU_RECV1 = "'NCUFIR[^8].*NCU Store Queue Data'"
+DES_NCU_UE = "'NCUFIR[^0].*NCU store queue control'"
+
+DES_CORE_RECV5 = "'COREFIR[^0].*IFU SRAM Recoverable err'"
+DES_CORE_RECV1 = "'COREFIR[^30].*LSU Set Delete Err'"
+DES_CORE_UE = "'COREFIR[^1].*TC Checkstop'"
 
 # The following is an error injection dictionary with each entry consisting of:
 # - field_name: Targettype_threshold_limit .
@@ -68,6 +73,10 @@
              'CMEFIR_RECV1': ['10012000', '0100000000000000', DES_CME_RECV1],
              'EQFIR_RECV32': ['1004000A', '8000000000000000', DES_EQ_RECV32],
              'NCUFIR_RECV1': ['10011400', '0080000000000000', DES_NCU_RECV1],
+             'NCUFIR_UE': ['10011400', '8000000000000000', DES_NCU_UE],
+             'COREFIR_RECV5': ['20010A40', '8000000000000000', DES_CORE_RECV5],
+             'COREFIR_RECV1': ['20010A40', '0000000200000000', DES_CORE_RECV1],
+             'COREFIR_UE': ['20010A40', '4000000000000000', DES_CORE_UE],
 
              }