| From 574e7950bd6b34e9e2cacce18c802b45505d1d0a Mon Sep 17 00:00:00 2001 |
| From: Richard Earnshaw <rearnsha@arm.com> |
| Date: Fri, 18 Jun 2021 17:16:25 +0100 |
| Subject: [PATCH] arm: add erratum mitigation to __gnu_cmse_nonsecure_call |
| [PR102035] |
| |
| Add the recommended erratum mitigation sequence to |
| __gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this |
| is in the library code we cannot know in advance whether the core we |
| are running on will be affected by this, so always enable it. |
| |
| libgcc: |
| PR target/102035 |
| * config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call): |
| Add vlldm erratum work-around. |
| |
| CVE: CVE-2021-35465 |
| Upstream-Status: Backport [https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=574e7950bd6b34e9e2cacce18c802b45505d1d0a] |
| Signed-off-by: Pgowda <pgowda.cve@gmail.com> |
| |
| --- |
| libgcc/config/arm/cmse_nonsecure_call.S | 5 +++++ |
| 1 file changed, 5 insertions(+) |
| |
| diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S |
| --- a/libgcc/config/arm/cmse_nonsecure_call.S |
| +++ b/libgcc/config/arm/cmse_nonsecure_call.S |
| @@ -102,6 +102,11 @@ blxns r4 |
| #ifdef __ARM_PCS_VFP |
| vpop.f64 {d8-d15} |
| #else |
| +/* VLLDM erratum mitigation sequence. */ |
| +mrs r5, control |
| +tst r5, #8 /* CONTROL_S.SFPA */ |
| +it ne |
| +.inst.w 0xeeb00a40 /* vmovne s0, s0 */ |
| vlldm sp /* Lazy restore of d0-d16 and FPSCR. */ |
| add sp, sp, #0x88 /* Free space used to save floating point registers. */ |
| #endif /* __ARM_PCS_VFP */ |