| commit | 0755842edf7f35568ac2bedc5c6be2799c556bac | [log] [tgz] |
|---|---|---|
| author | Matt Simmering <matthew.simmering@intel.com> | Mon Oct 10 17:16:37 2022 -0700 |
| committer | matthew.simmering <matthew.simmering@intel.com> | Fri Oct 14 21:44:38 2022 +0000 |
| tree | 3e63440c40b70797089ede80c37854bc35559085 | |
| parent | b79007f8e4f88e5b1ac8b58e1776dff9cffef3bc [diff] [blame] |
Update Intel x86-power-control bbappend Update bbappend to enable ignore-soft-resets-during-post option Tested: Feature is now enabled Change-Id: I0fd779e2b3d18804562eab482966aa680ef36c6b Signed-off-by: Matt Simmering <matthew.simmering@intel.com>
diff --git a/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend index e4d066b..aaae9d6 100644 --- a/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend +++ b/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend
@@ -1,2 +1,3 @@ # Use PLT_RST to detect warm resets EXTRA_OEMESON:intel += "-Duse-plt-rst=enabled" +EXTRA_OEMESON:intel += "-Dignore-soft-resets-during-post=enabled"