tree c313c432c0cf2cf0391e217c1b5ba33e57e36e2b
parent 41bd3f0bbe1b63f1015c76a1c59843cd281fe9df
author deepakala-k <deepakala.karthikeyan@ibm.com> 1665733686 -0500
committer Andrew Geissler <andrew@geissonator.com> 1668694805 +0000

openpower: ipl: srcrev bump 8fc1c2d6e3..da64b07ade

Jayanth Othayoth (1):
      libipl: Updates in the clock type selection algorithm

Marri Devender Rao (3):
      libipl: perform setup ref clock only on the primary processor
      libipl: perform clock test only on the primary processor
      configure: add include path to find p10_sbe_ext_defs header file

deepakala-k (1):
      libipl: p10: Create PEL for guard file exception

Signed-off-by: Deepakala Karthikeyan <deepakala.karthikeyan@ibm.com>
Change-Id: Iaf890d6374a6282062b34b85f305eb62dfea07d5