linux-aspeed: Move to Linux v5.15

This moves the OpenBMC kernel to a v5.15 base. There are 73 patches in
the tree, not counting changes that were merged in v5.16 which have been
backported.

Andrew Jeffery (10):
      dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
      pmbus (max31785): Add support for devicetree configuration
      pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
      pmbus (core): One-shot retries for failure to set page
      pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
      ARM: dts: aspeed: witherspoon: Update max31785 node
      ipmi: kcs_bmc: Add a "raw" character device interface
      ARM: dts: tacoma: Clean up KCS nodes
      leds: pca955x: Make the gpiochip always expose all pins
      leds: pca955x: Allow zero LEDs to be specified

Brad Bishop (3):
      ipmi: aspeed-g6: Add compatible strings
      reset: simple: Add AST2600 compatibility string
      eeprom: at25: Split reads into chunks and cap write size

Cédric Le Goater (19):
      mtd: spi-nor: aspeed: use command mode for reads
      mtd: spi-nor: aspeed: add support for SPI dual IO read mode
      mtd: spi-nor: aspeed: link controller with the ahb clock
      mtd: spi-nor: aspeed: optimize read mode
      mtd: spi-nor: aspeed: limit the maximum SPI frequency
      mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
      mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
      mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
      mtd: spi-nor: aspeed: add support for the 4B opcodes
      mtd: spi-nor: Add support for w25q512jv
      mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
      mtd: spi-nor: aspeed: Introduce segment operations
      mtd: spi-nor: aspeed: add initial support for ast2600
      mtd: spi-nor: aspeed: Check for disabled segments on the AST2600
      mtd: spi-nor: aspeed: Introduce training operations per platform
      mtd: spi-nor: aspeed: Introduce a HCLK mask for training
      mtd: spi-nor: aspeed: check upper freq limit when doing training
      mtd: spi-nor: aspeed: add support for AST2600 training
      /dev/mem: add a devmem kernel parameter to activate the device

Eddie James (8):
      soc: aspeed: Add XDMA Engine Driver
      soc: aspeed: xdma: Add user interface
      soc: aspeed: xdma: Add reset ioctl
      dt-bindings: input: Add documentation for IBM Operation Panel
      input: misc: Add IBM Operation Panel driver
      ARM: dts: aspeed: tacoma: Remove CFAM reset GPIO
      spi: fsi: Print status on error
      spi: fsi: Fix contention in the FSI2SPI engine

Fran Hsu (2):
      ARM: dts: nuvoton: npcm730: Add UDC device
      ARM: dts: nuvoton: gsj: Add non-mainline nodes

George Hung (4):
      dt-binding: edac: add NPCM ECC documentation
      edac: npcm: Add Nuvoton NPCM7xx EDAC driver
      ARM: dts: nuvoton: gbs: split SPI flash partition
      ARM: dts: nuvoton: gbs: Change the name of the partitions

Jae Hyun Yoo (1):
      clk: ast2600: enable BCLK for PCI/PCIe bus always

Joel Stanley (4):
      net: ftgmac100: Ensure tx descriptor updates are visible
      ARM: dts: ast2600evb: Enable EHCI controller
      ARM: configs: aspeed: Add openbmc kernel options
      ipmi: bt-bmc: Use registers directly

Tomer Maimon (21):
      dt-binding: bmc: Add NPCM7xx LPC BPC documentation
      misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
      dt-binding: bmc: add npcm7xx pci mailbox document
      misc: mbox: add npcm7xx pci mailbox driver
      dt-binding: net: document NPCM7xx EMC DT bindings
      net: npcm: add NPCM7xx Ethernet MAC controller
      ARM: dts: npcm7xx: Add out of tree nodes
      ARM: dts: olympus: Add non-mainline nodes
      ARM: dts: npcm750: Add fuse regmap support node
      ARM: dts: npcm7xx: Link fuse syscon to adc and wdt
      clk: npcm7xx: add read only flag to divider clocks
      iio: adc: Add calibration support to npcm ADC
      watchdog: npcm: Add DT restart priority and reset type support
      pinctrl: npcm7xx: Add HGPIO pin support to NPCM7xx pinctrl driver
      pinctrl: pinconf: add pin persist configuration
      pinctrl: npcm7xx: Add pin persist configuration support
      spi: npcm-pspi: Add full duplex support
      dt-binding: bmc: add NPCM7XX JTAG master documentation
      misc: Add NPCM7xx JTAG master driver
      watchdog: npcm: Modify get reset status function
      ARM: configs: add defconfig for Nuvoton NPCM7xx BMC

William A. Kennington III (1):
      net: npcm: Support for fixed PHYs

Change-Id: I8c26f71ba75e4f8d8b5697b81f8c73c0d77aae8e
Signed-off-by: Joel Stanley <joel@jms.id.au>
1 file changed
tree: 4a4318d070a19f1c38c24f5ac9a9d0944cb7de9d
  1. .github/
  2. meta-amd/
  3. meta-ampere/
  4. meta-aspeed/
  5. meta-asrock/
  6. meta-bytedance/
  7. meta-evb/
  8. meta-facebook/
  9. meta-fii/
  10. meta-google/
  11. meta-hpe/
  12. meta-ibm/
  13. meta-ingrasys/
  14. meta-inspur/
  15. meta-intel-openbmc/
  16. meta-inventec/
  17. meta-nuvoton/
  18. meta-openembedded/
  19. meta-openpower/
  20. meta-phosphor/
  21. meta-quanta/
  22. meta-raspberrypi/
  23. meta-security/
  24. meta-supermicro/
  25. meta-wistron/
  26. meta-x86/
  27. meta-yadro/
  28. poky/
  29. .gitignore
  30. .gitreview
  31. .templateconf
  32. MAINTAINERS
  33. openbmc-env
  34. OWNERS
  35. README.md
  36. setup
README.md

OpenBMC

Build Status

OpenBMC is a Linux distribution for management controllers used in devices such as servers, top of rack switches or RAID appliances. It uses Yocto, OpenEmbedded, systemd, and D-Bus to allow easy customization for your platform.

Setting up your OpenBMC project

1) Prerequisite

  • Ubuntu 14.04
sudo apt-get install -y git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat
  • Fedora 28
sudo dnf install -y git patch diffstat texinfo chrpath SDL-devel bitbake \
    rpcgen perl-Thread-Queue perl-bignum perl-Crypt-OpenSSL-Bignum
sudo dnf groupinstall "C Development Tools and Libraries"

2) Download the source

git clone git@github.com:openbmc/openbmc.git
cd openbmc

3) Target your hardware

Any build requires an environment set up according to your hardware target. There is a special script in the root of this repository that can be used to configure the environment as needed. The script is called setup and takes the name of your hardware target as an argument.

The script needs to be sourced while in the top directory of the OpenBMC repository clone, and, if run without arguments, will display the list of supported hardware targets, see the following example:

$ . setup <machine> [build_dir]
Target machine must be specified. Use one of:

bletchley               hr630                   quanta-q71l
centriq2400-rep         hr855xg2                romulus
dl360poc                kudo                    s2600wf
e3c246d4i               lanyang                 stardragon4800-rep2
ethanolx                mihawk                  swift
evb-ast2500             mtjade                  thor
evb-ast2600             neptune                 tiogapass
evb-npcm750             nicole                  transformers
evb-zx3-pm3             olympus                 witherspoon
f0b                     olympus-nuvoton         witherspoon-tacoma
fp5280g2                on5263m5                x11spi
g220a                   p10bmc                  yosemitev2
gbs                     palmetto                zaius
gsj                     qemuarm

Once you know the target (e.g. romulus), source the setup script as follows:

. setup romulus

4) Build

bitbake obmc-phosphor-image

Additional details can be found in the docs repository.

OpenBMC Development

The OpenBMC community maintains a set of tutorials new users can go through to get up to speed on OpenBMC development out here

Build Validation and Testing

Commits submitted by members of the OpenBMC GitHub community are compiled and tested via our Jenkins server. Commits are run through two levels of testing. At the repository level the makefile make check directive is run. At the system level, the commit is built into a firmware image and run with an arm-softmmu QEMU model against a barrage of CI tests.

Commits submitted by non-members do not automatically proceed through CI testing. After visual inspection of the commit, a CI run can be manually performed by the reviewer.

Automated testing against the QEMU model along with supported systems are performed. The OpenBMC project uses the Robot Framework for all automation. Our complete test repository can be found here.

Submitting Patches

Support of additional hardware and software packages is always welcome. Please follow the contributing guidelines when making a submission. It is expected that contributions contain test cases.

Bug Reporting

Issues are managed on GitHub. It is recommended you search through the issues before opening a new one.

Questions

First, please do a search on the internet. There's a good chance your question has already been asked.

For general questions, please use the openbmc tag on Stack Overflow. Please review the discussion on Stack Overflow licensing before posting any code.

For technical discussions, please see contact info below for Discord and mailing list information. Please don't file an issue to ask a question. You'll get faster results by using the mailing list or Discord.

Features of OpenBMC

Feature List

  • Host management: Power, Cooling, LEDs, Inventory, Events, Watchdog
  • Full IPMI 2.0 Compliance with DCMI
  • Code Update Support for multiple BMC/BIOS images
  • Web-based user interface
  • REST interfaces
  • D-Bus based interfaces
  • SSH based SOL
  • Remote KVM
  • Hardware Simulation
  • Automated Testing
  • User management
  • Virtual media

Features In Progress

  • OpenCompute Redfish Compliance
  • Verified Boot

Features Requested but need help

  • OpenBMC performance monitoring

Finding out more

Dive deeper into OpenBMC by opening the docs repository.

Technical Steering Committee

The Technical Steering Committee (TSC) guides the project. Members are:

  • Brad Bishop (chair), IBM
  • Nancy Yuen, Google
  • Sai Dasari, Facebook
  • James Mihm, Intel
  • Sagar Dharia, Microsoft
  • Samer El-Haj-Mahmoud, Arm

Contact