tree a10512d5dad93fb4be2c52ea699874121c52ea7d
parent 6d3702a269117a2dd28ad7a483dbe82661b8f104
author Jayanth Othayoth <ojayanth@in.ibm.com> 1657195782 -0500
committer Andrew Geissler <andrew@geissonator.com> 1657627193 +0000

openpower: ipl: srcrev bump 49e7026d98..8fc1c2d6e3

Jayanth Othayoth (12):
      libphal: deconfigureTgt skip primary processor deconfig
      libphal: Add sbe halt state handling for threadStopProc chipop
      libphal: SBE chip-op failure debug data support
      ipl: changed clang-format file location
      ipl: clang-format: disabled SortIncludes
      ipl: enabled clang-format based source formatting
      libphal: Added input target type check in isPrimaryProc api
      libphal: deconfigureTgt api updates
      ipl:: Added clock redundant mode check helper function
      libipl:p10: redundant mode clock error handling support
      libipl: ATTR_SYS_CLOCK_DECONFIG_STATE based clock state update
      libipl: ATTR_SYS_CLOCK_DECONFIG_STATE size update

Signed-off-by: Jayanth Othayoth <ojayanth@in.ibm.com>
Change-Id: I8e3aa976c79e55404e165770b044a389347a1c22