meta-xilinx: subtree update:757bac706c..bef2bf9b15
Alejandro Enedino Hernandez Samaniego (76):
libmali-xlnx: Use update-alternatives to switch between GL backends
libmali-xlnx: modify REQUIRED_DISTRO_FEATURES
libmali-xlnx: only use and install dependencies that the DISTRO supports
libmali-xlnx: fix x11 headers
libmali-xlnx: Dont provide KHR headers
libmali-xlnx: Change version on gbm.pc to be compatible with mesa
libmali-xlnx: modify version on egl.pc for compatibility
run-postinsts: Pass the output of the scripts run to kmsg
zynqmp-pmu.conf: Upgrade tune to use Microblaze v10.0
zynqmp-pmu.conf: Update to Microblaze v11.0
newlib: export CC_FOR_TARGET as CC
gcc-cross: Dont override EXTRA_OECONF unless DISTRO is xilinx-standalone
Adds MACHINE.conf containing default tune for Cortex R5
Adds MACHINE.conf containing default tune for Cortex A53
toolchain: Provide specific configuration for cross(-canadian) gcc and binutils
Adds MACHINE.conf containing default tune for Cortex A72
xilinx-standalone: switch override and append
xilinx-standalone: Add staticdev packages for newlib and libgloss to dependencies
xilinx-standalone: Reorganize toolchain configure options
toolchain: add cortex-A9 options for gcc and binutils
gcc-cross-microblazeel: disable multilib
gcc: Separate binutils options
gcc: Add multilib-list=aprofile configure option for cortex A9
gcc-runtime: Enable bulding libsdtc++ for baremetal applications
gcc-runtime: Set correct overrides now that the build has been fixed in oe-core
gcc-xilinx-standalone: Enable multilib builds for baremetal microblaze
gcc-microblaze: Remove multilib builds that arent working (m64)
meta-xilinx-standalone: Restructure layer properly, gcc and binutils belong on recipes-devtools
newlib: Keep version numbers on bbappends
meta-xilinx-standalone: Restructure layer properly, newlib belongs to recipes-bsp
gcc-runtime: Move gcc-runtime to GCCs directory
layer.conf: Include recipe files from a pattern with no directory required
Create machines that use SOC_FAMILY
Microblaze-pmu: Change overrides to reflect machine name changes from zynqmp-pmu to microblaze-pmu
cortexr5: Change overrides to reflect machine name changes from cortexr5 to zynqmp and versal variants
cortexa72: To keep up with a standard rename cortexa72 to add its SOC_FAMILY to its name
meta-xilinx-bsp: Unify machine confs
cortexr5-versal.conf: Include the tune inc file from the correct path
cortexr5-zynqmp.conf: Include the tune inc file from the correct path
tune-cortexrm: Include PACKAGE_EXTRA_ARCHS to avoid parsing errors
esw: first step to move everything into an embeddedsw class
pmufw: Install and hence package and strip the pmufw elf file
fix license and compatible host for now
pmufw: fix filename on elf file and fix task order to get stripped elf file deployed
libxil: add flow for a53 using dtg
device-tree.bbappend: add appent to support cortexa53 MACHINE
device-tree: switch to AUTOREV to keep up with the repo changes for now
zynqmp-fsbl: Sync flow with pmufw
libxil: fix device tree flags for a53
libxil: Fix DTB and DTG flow to make it more transparent for the user
Fix XILINX_RELEASE_VERSION
Increase layer priority
device-tree: the Flags used from device tree have to be set on the device tree recipe, not in the libxil one
esw.bbclass: Fix devtool and externalsrc flow
esw.bbclass: Install artifacts from the build directory vs WORKDIR
pmufw: Install artifacts from the build directory vs WORKDIR
esw.bbclass: Make it possible for packages to use the cmake ncurses gui
libxil: Unify flow and get DTB using the device-tree recipe instead of creating it manually
SOC_FAMILY: Change overrides
Microblaze-pmu: Change overrides to reflect machine name chanches from zynqmp-pmu to microblaze-pmu
device-tree: Install psu_init files as well
fsbl: avoid using underscore in the directory filename
meta-xilinx-standalone: Restructure layer properly, pmufw and fsbl belong on recipes-applications
meta-xilinx-standalone: device-tree belongs on recipes-bsp
meta-xilinx-standalone: Restructure layer properly, move existing libraries from decoupling to recipes-libraries
zynqmp-fsbl: Fix race condition on copy_psu_init
device-tree: Fix install directory
meta-xilinx-standalone: clean up layer
libraries: Add inherit on python3native on libraries that were invoking nativepython3
meta-xilinx: Include templates for local.conf and bblayers.conf
esw: fix machines that have been renamed
libgloss: Dont install libgloss as libxil since we actually have libxil
esw: Switch release version to 2020.1
xilinx-standalone: Add buildhistory to the DISTRO to avoid cooker errors
device-tree: Override repo for supported machines
system-zcu102: Create heterogeneous machine configuration for ZCU102 evaluation board.
Anirudha Sarangi (4):
meta-xilinx-standalone: conf: distro: Add new distro for freertos
meta-xilinx-standalone: classes: Update CMAKE_SYSTEM_NAME for Freertos
meta-xilinx-standalone: recipes-libraries: Add recipe for freertos
meta-xilinx-standalone: recipes-applications: freertos-hello-world: Add recipe for freertos hello world
Appana Durga Kedareswara rao (82):
libxil: Add recipes for libxil and xilstandalone
pmufw: recipes for pmufw app generation in decoupled flow
Add recipes for xilffs and xilpm libraries
Add recipes for building zynqmp fsbl application
meta-xilinx-standalone: Add support for PLM and dependent library recipes
zynqmp-fsbl: Copy psu_init files to source code
meta-xilinx: meta-xilinx-standalone: Update source url path
meta-xilinx: meta-xilinx-standalone: comment flto flags by default
meta-xilinx-standalone: Using S instead of WORKDIR
meta-xilinx-standalone: classes: Add bbclass for building esw examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling csudma driver examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling emacps driver examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling axiethernet driver examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling axicdma driver examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling axidma driver examples
meta-xilinx-standalone: recipes-drivers: Add recipe for compiling llfifo driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling mcdma driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling zdma driver examples
meta-xilinx-standalone: recipes-applications: Add recipe for compiling hello world application
meta-xilinx-standalone: classes: Update md5 checksum as per latest license
meta-xilinx-standalone: Add support for cortexa72 processor
meta-xilinx-standalone: recipes-libraries: xilstandalone: Cleanup the recipe
meta-xilinx-standalone: recipes-libraries: libxil: Cleanup the recipe
meta-xilinx-standalone: classes: cleanup the class
meta-xilinx-standalone: recipes-applications: hello-world: Remove dependency on esw_examples class
meta-xilinx-standalone: recipes-libraries: Add recipe for xilmailbox
cortexa72: Update cortexa72 machine variable naming
meta-xilinx: Add support for cortexr5 processor
meta-xilinx-standalone: Add dependencies on python3-dtc-native
meta-xilinx-standalone: recipes-libraries: xiltimer: Add task for generating cmake meta-data
meta-xilinx-standalone: recipes-libraries: lwip: Add recipe for lwip
meta-xilinx-standalone: recipes-applications: lwip-echo-server: Add recipe for compiling lwip echo server application
meta-xilinx-standalone: Add support for versal cortexr5 processor
meta-xilinx-standalone: recipes-applications: lwip-tcp-perf-client: Add recipe for compiling lwip tcp perf client application
meta-xilinx-standalone: recipes-applications: lwip-tcp-perf-server: Add recipe for compiling lwip tcp perf server application
meta-xilinx-standalone: recipes-applications: lwip-udp-perf-server: Add recipe for compiling lwip udp perf server application
meta-xilinx-standalone: recipes-applications: lwip-udp-perf-client: Add recipe for compiling lwip udp perf client application
meta-xilinx-standalone: recipes-applications: freertos-lwip-echo-server: Add recipe for compiling freertos lwip echo server application
meta-xilinx-standalone: recipes-applications: freertos-lwip-tcp-perf-client: Add recipe for compiling freertos lwip tcp perf client application
meta-xilinx-standalone: recipes-applications: freertos-lwip-tcp-perf-server: Add recipe for compiling freertos lwip tcp perf server application
meta-xilinx-standalone: recipes-applications: freertos-lwip-udp-perf-client: Add recipe for compiling freertos lwip udp perf client application
meta-xilinx-standalone: recipes-applications: freertos-lwip-udp-perf-server: Add recipe for compiling freertos lwip udp perf server application
meta-xilinx-standalone: recipes-libraries: Update depends list for socket mode
meta-xilinx-standalone: recipes-libraries: Add recipe for xilpuf
meta-xilinx-standalone: recipes-libraries: Fix workarounds
meta-xilinx-standalone: recipes-libraries: xilloader: Update depends list
meta-xilinx-standalone: recipes-applications: freertos-hello-world: Fix do_deploy elf variable name
meta-xilinx-standalone: classes: esw: Remove unneeded DISTRO check
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling dmaps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling usbpsu driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling axivdma driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling emaclite driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling xxvethernet driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling scugic driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling ttcps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling tmrctr driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling qspipsu driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling ospipsv driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling resetps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling clockps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling canfd driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling canps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling can driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling wdtps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling rtcpsu driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling gpiops driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling sdps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling ipipsu driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling nandpsu driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling devcfg driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling mbox driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling mutex driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling uartlite driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling uartps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling gpio driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling spips driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling qspips driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling xadcps driver examples
meta-xilinx-standalone: recipe-drivers: Add recipe for compiling sysmon driver examples
device-tree: Install psu_init files as well for zynqmp machines
meta-xilinx-standalone: recipes-applications: zynqmp-fsbl: Correct cflags based on the machine type
meta-xilinx-standalone: recipes-bsp: device-tree: Install psu_init* files only for standalone configuration
Bruce Ashfield (1):
linux-xlnx: cleanup and make yocto-kernel-cache available
Himanshu Choudhary (8):
xrt_git:zocl_git: added package_class for generating rpm
zocl_git: added post install script
xrt_git: added veral flags and dependencies
xrt_git:zocl_git: license and PV update from meta-xilinx-internal
xrt,zocl:Update commit id for 2020.1 release
xrt_git:zocl_git: updated commitid > CR-1063204
xrt_git:zocl_git: update commitid for 2020.1 release
xrt_git:zocl_git: update commitid for 2020.1 release
Jaewon Lee (28):
Update recipes for 2019.2 release
u-boot-zynq-scr: reworking boot.scr recipe to work for zynq and zynqmp
u-boot-zynq-scr: Setting sd as default bootmode for versal
zynq/zynqmp confs: Adding boot.scr to IMAGE_BOOT_FILES
bootgen_1.0.bb: Adding initial bootgen recipe to build bootgen
flashstrip utility: Build and ship flash strip utility needed for qemu
machine-xilinx-default.inc: Adding required dependencies to image_wic
**TEMPORARY**: Removing preferred provider overrides for mali backend
meson: Adding patch to add microblaze as supported CPU
glibc-locale_%.bbappend: Fix directory installed but not shipped issue
Revert "**TEMPORARY**: Removing preferred provider overrides for mali backend"
arm-trusted-firmware.inc: Changing generic DEBUG to DEBUG_ATF
gcc-cross-canadian_%.bbappend:temporary hack to build gcc cross canadian
gcc-source: Adding microblaze patch to fix compiler crash with -freg-struct-return
newlib: Adding xilinx specific patches on top of newlib/libgloss 3.1.0
cortexa*.conf: Change arch-armv8.inc to arch-armv8a.inc
gdb: Switching microblaze to use upstream gdb version 8.3.1
microblaze gdb/binutils: Adding necessary patches for microblaze
Using tune-cortexa72-cortexa53.inc for versal and zynqmp tunes
qemu-system-aarch64-multiarch: Adding comment for future fix
xilinx-standalone.conf: Adding qemu to TOOLCHAIN_HOST_TASK
arm-trusted-firmware.inc: installing elf with standard name
u-boot-xlnx:Updating defconfig for all zynq machines
Correcting ':' placement for appending file paths
Add older version of OpenCV 3.4.3
opencv_3.4.3.bb: Removing tiny-dnn from SRC_URI
versal confs: Upping RAM in runqemu command to 8G for versal boards
versal confs: cleaning up unnecessary file loading in runqemu command
Jean-Francois Dagenais (3):
libmali-xlnx: clean and fix FILESXTRAPATHS
libmali-xlnx: make version recognizable
kernel-module-mali: add patch to check dma_map_page error
Jeegar Patel (1):
kernel-module-vcu.bb : Autoload dmaproxy module on boot
Madhurkiran Harikrishnan (14):
libmali-xlnx: MALI will not provide wayland-egl
libmali-xlnx.bb: ABIs are made consistent for all backends
libmali-xlnx: Squash all monolithic library name into a variable
libmali-xlnx: Upgrade the userspace driver to r9p0
kernel-module-mali: Upgrade the kernel space driver to r9p0
weston: Migrate ZynqMP specific patches for weston to meta-xilinx
weston: Remove opaque substitute for ARGB8888 as ZynqMP DP does not support
kernel-module-mali: Make the driver compatible with kernel 5.4
Revert "libmali-xlnx: Dont provide KHR headers"
mesa: Do not provide KHR headers
cairo: For ZynqMP enable glesv2 packageconfig
libglu: Add build time dependency on glesv2 for zynqmp
xf86-video-armsoc: Bypass the exa layer to free the root pixmap
libmali: Fetch mali binaries from rel-v2020.1 branch
Manjukumar Matha (17):
libmali-xlnx: upgrade MALI recipe for 2019.2
xrt_git.bb: Fix xrt recipe for externalsrc
zocl_git.bb: Update the S path for zocl
kernel-module-hdmi_git.bb: New Yocto recipe for Xilinx HDMI drivers
machine-xilinx-default.inc: Add qemu-xilinx-helper-native as preferred provider
zynq-generic.conf: Add qemu wiring to generic conf
meta-xilinx-pynq: Add layer to support PYNQ
image-types-xilinx-qemu.bbclass: Add sector size as 512K
ultra96-zynqmp.conf: Add support for Ultra96 evaluation board
linux-firmware_git.bbappend: Add hook for wl18xx and bts file
vc-p-a2197-00-versal.conf:Add versal Tenzing +SE1 board configuration
kc705-microblaze: Update u-boot patch for kc705
layer.conf: Update XILINX_RELEASE_VERSION to v2020.1
libgpg-error: Add microblaze platform specific gpg-error.h file
qemu-xilinx-native: Enable packageconfig option for libgcrypt
qemu-xilinx.inc: Remove stale packageconfig options
qemu-xilinx.inc: Configure qemu-xilinx with gcrypt
Mark Hatle (82):
binutils/gcc: Refactor the oeconf
Revert "binutils/gcc: Refactor the oeconf"
gcc-runtime: Make the baremetal changes specific to class-target
binutils/gcc: Refactor the oeconf
gcc: Remove cortexa53 errata fixes
binutils: Merge latest binutils work
Revert "gcc-microblaze: Remove multilib builds that arent working (m64)"
gcc-cross-canadian: Fix issue being unable to find stdio.h
Enable multilib baremetal toolchains
gcc-runtime: Fix C++ multilib headers
Limit multilib toolchains to symlinks to the main toolchain
Create new baremetal toolchain machines
Fix arm cortex r/m profiles
microblaze-tc: Minor update and corrections
Adjust the microblaze standalone toolchain to match vitis expectations.
newlib: Adjust configuration for standalone to allow BSP library
qemu-xilinx: Point to master branch by default
distro/xilinx-standalone: Make LTO optional
distr/xilinx-standalone: Switch default optimization from ESW to Distro
cortex-r5: Add cortexr5f configuration
xilinx-standalone: When building for cortexr5, add -DARMR5 for CCARGS
newlib: Move microblaze support
newlib: Cleanup and merge the two newlib bbappends into a single append
python3-dtc: Add python3 dtc module
Ensure that bbappends do not affect task hashes
xlnx-compatible-os.bbclass: Class to allow recipes to list OS compatibility
Remove hardcoded XILINX_RELEASE_VERSION in recipes
meta-xilinx-standalone: Add dependencies on python3-dtc
meta-xilinx-standalone/device-tree: remove duplicate internal references
lopper: Add lopper utility
xilinx-standalone: sync distros
xilinx-standalone.inc: Replace qemu dependency with mingw32 specific recipe
lopper: Add runtime dependency of python3-dtc
cortexa53-zynqmp/cortexa72-versal: Fix cortex based BSPs
README.md: revise README.md based
README.md: Add information about the new embeddedsw support
microblaze_dtb.py: Convert a dtb to one or more microblaze TUNE_FEATURES
linux-xlnx: Use new default defconfigs
meta-xilinx-bsp: Rename soc configuration masquerading as a tune file
meta-xilinx-bsp: Remove default values
machine-xilinx-overrides: Make this generic
meta-xilinx-bsp: Update recipes to use SOC_FAMILY_ARCH and SOC_VARIANT_ARCH
meta-xilinx-bsp: rename machine-xilinx-override to xilinx-soc-family.inc
meta-xilinx-standalone: Move soc overrides from meta-xilinx-default
meta-xilinx-bsp: Adjust soc to permit multiple CPU/TUNES
libmali-xlnx: Remove virtual provides
meta-xilinx-bsp: remove redundant PREFERRED_PROVIDER
Revert "libmali-xlnx: Remove virtual provides"
meta-xilinx-bsp: machine-xilinx-default.inc allow empty WIC_DEPENDS
microblaze_dtb.py: Move to scripts subdir
zc706-zynq7: Add qemu wiring for zc706 machine
qemu-zynq7: Add qemu wiring for zc706 machine
meta-xilinx-bsp: cleanup qemu references
xilinx-qemu: Move -multiarch extension to the machine-xilinx-qemu
*-generic.conf: Add QEMU support to each of the generic BSPs
versal-generic: Move from vck190 to vc-p-a2197-00-versal
esw.bbclass: Adjust get_xlnx_cmake_process to use both tune and machine
Revise COMPATIBLE_MACHINE settings
esw.bbclass: Move DTBFILE to a single definition
xilinx-standalone.conf: Add workaround for microblaze -Os bug
Revert "linux-xlnx: Use new default defconfigs"
qemu-xilinx.inc: Move the URL to 'gitsm' and disable compile time submodules
esw.bbclass: Only work with xilinx-standalone distro
Rename plm_git.bb to plm-standalong_git.bb
meta-xilinx-standalone esw.bbclass: Allow SRCREV and SRC_URI to be overwritten
esw.bbclass: Change 'or' to 'and' to verify EXTERNALSRC is defined
Revert "xlnx-compatible-os.bbclass: Class to allow recipes to list OS compatibility"
Define COMPATIBLE_HOST to prevent mix of Linux and Baremetal recipes
device-tree.bbappend: Move to COMPATIBLE_HOST
machines: Move from SERIAL_CONSOLE (deprecated) to SERIAL_CONSOLES
machines: Move from SERIAL_CONSOLE (deprecated) to SERIAL_CONSOLES
machines: Allow the user to override SERIAL_CONSOLES
machines: Remove default SERIAL_CONSOLES_CHECK
machines: Allow user to override SERIAL_CONSOLE
microblaze machines: Set LINKER_HASH_STYLE defaults
kernel-module-mali: WIP
libcma: Fix SRC_URI definition
binutils: Microblaze integrate fix from upstream
init-ifupdown: Fix BSPs that were setting partial overrides
zynq-generic.conf: Remove the qemu overrides, not needed
meta-xilinx-standalone gcc: Fix microblaze crtend.o
lopper: Fix python3 reference in lopper_sanity.py
Min Ma (1):
xrt_git.bb: update XRT dependency
Mubin Usman Sayyed (3):
meta-xilinx-bsp: conf: machine: Add standalone based machine for zynq
meta-xilinx-standalone: Add support for zynq
meta-xilinx-standalone: classes: esw: Update ESW_CFLAGS with spec file
Mukund PVVN (3):
zcu1275-zynqmp.conf: Rename zc1275 to zcu1275
zcu1285-zynqmp.conf: Update UBOOT_MACHINE
v350-versal.conf:Add versal board configuration
Peter Ogden (1):
python3-pynq.bb: Update PYNQ to 2.5.1
Sai Hari Chandana Kalluri (54):
u-boot-xlnx_2019.2.bb: Rename zc1275 to zcu1275 board name
ultra96-zynqmp.conf: Include mipi as MACHINE_FEATURE
linux-xlnx.inc: Add MIPI kernel configuration for Ultra96
pynq-ultra96-*: Add Ultra96 specific pynq example demo:
vck-sc-zynqmp: Machine configuration for vck190 system controller
v350-versal.conf: Enforce system.dtb name when using virtual/dtb
vmk180-versal.conf: Add machine configuration for vmk180-versal
tune-versal.inc: Set default SOC_VARIANT = s80
arm-trusted-firmware_2019.2.bbappend: Update compilation flag
u-boot-xlnx: Add the platform init file for zcu216-zynqmp
plm_2019.2.bb: recipe to build plm standalone
psm-firmware_2019.2.bb: Create psm-firmware recipe for standalone build
versal-mb.conf: Add machine configuration to support standalone build for versal components like plm, psm-firmware
vck190-versal.conf: Add deploy dir for psm and plm firmware
tune-versal.inc: Rename include file from arch-armv8 to arch-armv8a
Move recipes to use _%.bb instead of version
qemu-*: Upgrade QEMU version 2.11 -> 4.1.5
Upgrade recipes to 2020.1
libmali-xlnx: Provide single shlib provider for libMali.so.9
"**TEMPORARY**" linux-xlnx.inc: Trim PV variable expansion
Revert "Revert "**TEMPORARY**: Removing preferred provider overrides for mali backend""
versal-generic: Add versal-generic machine configuration
Revert "**TEMPORARY**: Removing preferred provider overrides for mali backend"""
qemu-xilinx*: Enable qemu-xilinx-native as PROVIDER for qemu-native
u-boot-zyqn-scr.bb: Update DEVICETREE and KERNEL LOAD ADDRESS for zynqmp machines
u-boot-xlnx:Update UBOOT-MACHINE to xilinx_zynqmp_virt_defconfig for all zynqmp machines
qemu-xilinx: Enable qemu-xilinx to provide nativesdk-qemu
zedboard-zynq7.conf:update u-boot binary name
qemu-system-aarch64-multiarch: Update the binpath for qemu targets
zcu102-zynqmp.conf: Modify PMU_FIRMWARE_DEPLOY_DIR and PMU_FIRMWARE_IMAGE_NAME
Update KERNEL_VERSION to 5.4
zcu102-zynqmp.conf: Pass dtb and dtb load address as QB_OPT args for qemuboot
Enable kernel configurations for viruatlization distro feature
zc702-zynq7: Add qemu wiring for zc702 machine
qemu-xilinx-multiarch-helper-native_1.0.bb: Move multiarch wrapper script to bindir
qemuboot-xilinx.bbclass: Remove the subdir added to the qemu target path
external-hdf.bbappend: move to meta-xilinx-tools layer
xrt: Remove references to PACKAGE_CLASSES from xrt recipes
kernel-module-hdmi: Update LICENSE_CHECKSUM for kenrel-module-hdmi
xilinx-kmeta: Upstream xen and ocicontainer configs to YP kernel-cache
Update commit ids for 2020.1 release
arm-trusted-firmware.inc: Update package version
Update commit ids for 2020.1 release
lopper: Update commit id for 2020.1 release
layer.conf: Set layer compat to dunfell & gatesgarth
qemu-xilinx-native.inc: Fix the patch file names for dunfell Fix patch file names for dunfell
libmali-xlnx: Inherit features_check instead of distro_features_check
gcc-9*: Upgrade gcc from 9.2->10.1
libgloss, newlib: Upgrade version from 3.1 -> 3.3
meson_%.bbappend: Remove bbappend from layer
qemu-xilinx.inc: Add patch to enable/disbable libudev in qemu configure
python3-dtc_1.5.1.bb: Explicitly set the path to run make during configure
qemu-devicetrees: Use python3 instead of python
u-boot-xlnx.inc: Explicitly set builddir path
Sandeep Gundlupet Raju (2):
conf/machine/kc705-microbalzeel.conf: Fix U-boot defconfig
local.conf.sample: Updating XILINX_VER_MAIN
Swagath Gadde (4):
u-boot-zynq-scr: Add pxeboot support in u-boot-scr
zcu216-zynqmp: Add support for zcu216 board
u-boot-zynq-scr:Add initrd label to pxe config
zcu208-zynqmp: Add support for zcu208 board
Varalaxmi Bingi (4):
Update XILINX_RELEASE_VERSION to v2020.1
zcu1285-zynqmp.conf:using common u-boot defconfig
u-boot-xlnx.inc:u-boot-xlnx_2020.1.bb: kc705 patch
removing kc705 patch
Vishal Sagar (3):
kernel-module-hdmi_git.bb: Add versal support
kernel-module-hdmi: Update for 2020.1 release
kernel-module-hdmi: Update commit id and license md5sum for 2020.1
ch vamshi krishna (1):
xrt_git.bb: Add icd support for edge platforms
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I71ace4a7992c023b84c864abd45e634b5e48f751
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
new file mode 100644
index 0000000..2e57033
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-10/0059-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
@@ -0,0 +1,466 @@
+From e1a10a708f209704a3921cf66dd3ff4d0814befc Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 17 Apr 2019 12:36:16 +0530
+Subject: [PATCH 59/63] [Patch,MicroBlaze]: fixed typos in mul,div and mod
+ assembly files.
+
+---
+ libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++++++++----
+ libgcc/config/microblaze/modsi3.S | 40 +++++++++++++++++++++++---
+ libgcc/config/microblaze/mulsi3.S | 33 +++++++++++++++++++++-
+ libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++----
+ libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++---
+ 5 files changed, 212 insertions(+), 20 deletions(-)
+
+diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
+index 2765e42..bd56522 100644
+--- a/libgcc/config/microblaze/divsi3.S
++++ b/libgcc/config/microblaze/divsi3.S
+@@ -46,7 +46,7 @@
+ __divsi3:
+ .frame r1,0,r15
+
+- ADDIK r1,r1,-32
++ ADDLIK r1,r1,-32
+ SLI r28,r1,0
+ SLI r29,r1,8
+ SLI r30,r1,16
+@@ -61,13 +61,23 @@ __divsi3:
+ SWI r30,r1,8
+ SWI r31,r1,12
+ #endif
+- BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
+- BEQI r5,$LaResult_Is_Zero # Result is Zero
+- BGEID r5,$LaR5_Pos
++#ifdef __arch64__
++ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
++ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
++ BEAGEID r5,$LaR5_Pos
++#else
++ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
++ BEQI r5,$LaResult_Is_Zero # Result is Zero
++ BGEID r5,$LaR5_Pos
++#endif
+ XOR r28,r5,r6 # Get the sign of the result
+ RSUBI r5,r5,0 # Make r5 positive
+ $LaR5_Pos:
+- BGEI r6,$LaR6_Pos
++#ifdef __arch64__
++ BEAGEI r6,$LaR6_Pos
++#else
++ BGEI r6,$LaR6_Pos
++#endif
+ RSUBI r6,r6,0 # Make r6 positive
+ $LaR6_Pos:
+ ADDIK r30,r0,0 # Clear mod
+@@ -76,26 +86,51 @@ $LaR6_Pos:
+
+ # First part try to find the first '1' in the r5
+ $LaDIV0:
+- BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
++#ifdef __arch64__
++ BEALTI r5,$LaDIV2 # This traps r5 == 0x80000000
++#else
++ BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
++#endif
+ $LaDIV1:
+ ADD r5,r5,r5 # left shift logical r5
++#ifdef __arch64__
++ BEAGTID r5,$LaDIV1
++#else
+ BGTID r5,$LaDIV1
++#endif
+ ADDIK r29,r29,-1
+ $LaDIV2:
+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
+ ADDC r30,r30,r30 # Move that bit into the Mod register
+ RSUB r31,r6,r30 # Try to subtract (r30 a r6)
++#ifdef __arch64__
++ BEALTI r31,$LaMOD_TOO_SMALL
++#else
+ BLTI r31,$LaMOD_TOO_SMALL
++#endif
+ OR r30,r0,r31 # Move the r31 to mod since the result was positive
+ ADDIK r3,r3,1
+ $LaMOD_TOO_SMALL:
+ ADDIK r29,r29,-1
++#ifdef __arch64__
++ BEAEQi r29,$LaLOOP_END
++#else
+ BEQi r29,$LaLOOP_END
++#endif
+ ADD r3,r3,r3 # Shift in the '1' into div
++#ifdef __arch64__
++ BREAI $LaDIV2 # Div2
++#else
+ BRI $LaDIV2 # Div2
++#endif
+ $LaLOOP_END:
++#ifdef __arch64__
++ BEAGEI r28,$LaRETURN_HERE
++ BREAID $LaRETURN_HERE
++#else
+ BGEI r28,$LaRETURN_HERE
+ BRID $LaRETURN_HERE
++#endif
+ RSUBI r3,r3,0 # Negate the result
+ $LaDiv_By_Zero:
+ $LaResult_Is_Zero:
+diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
+index b0e6cad..3632fad 100644
+--- a/libgcc/config/microblaze/modsi3.S
++++ b/libgcc/config/microblaze/modsi3.S
+@@ -62,40 +62,72 @@ __modsi3:
+ swi r31,r1,12
+ #endif
+
++#ifdef __arch64__
++ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
++ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
++ BEAGEId r5,$LaR5_Pos
++#else
+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
+ BEQI r5,$LaResult_Is_Zero # Result is Zero
+ BGEId r5,$LaR5_Pos
++#endif
+ ADD r28,r5,r0 # Get the sign of the result [ Depends only on the first arg]
+ RSUBI r5,r5,0 # Make r5 positive
+ $LaR5_Pos:
+- BGEI r6,$LaR6_Pos
++#ifdef __arch64__
++ BEAGEI r6,$LaR6_Pos
++#else
++ BGEI r6,$LaR6_Pos
++#endif
+ RSUBI r6,r6,0 # Make r6 positive
+ $LaR6_Pos:
+ ADDIK r3,r0,0 # Clear mod
+ ADDIK r30,r0,0 # clear div
+- BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
++#ifdef __arch64__
++ BEALTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
+ # the first bit search.
++#else
++ BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
++ # the first bit search.
++#endif
+ ADDIK r29,r0,32 # Initialize the loop count
+ # First part try to find the first '1' in the r5
+ $LaDIV1:
+ ADD r5,r5,r5 # left shift logical r5
+- BGEID r5,$LaDIV1 #
++#ifdef __arch64__
++ BEAGEID r5,$LaDIV1 #
++#else
++ BGEID r5,$LaDIV1 #
++#endif
+ ADDIK r29,r29,-1
+ $LaDIV2:
+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
+ ADDC r3,r3,r3 # Move that bit into the Mod register
+ rSUB r31,r6,r3 # Try to subtract (r30 a r6)
++#ifdef __arch64__
++ BEALTi r31,$LaMOD_TOO_SMALL
++#else
+ BLTi r31,$LaMOD_TOO_SMALL
++#endif
+ OR r3,r0,r31 # Move the r31 to mod since the result was positive
+ ADDIK r30,r30,1
+ $LaMOD_TOO_SMALL:
+ ADDIK r29,r29,-1
++#ifdef __arch64__
++ BEAEQi r29,$LaLOOP_END
++ ADD r30,r30,r30 # Shift in the '1' into div
++ BREAI $LaDIV2 # Div2
++$LaLOOP_END:
++ BEAGEI r28,$LaRETURN_HERE
++ BREAId $LaRETURN_HERE
++#else
+ BEQi r29,$LaLOOP_END
+ ADD r30,r30,r30 # Shift in the '1' into div
+ BRI $LaDIV2 # Div2
+ $LaLOOP_END:
+ BGEI r28,$LaRETURN_HERE
+ BRId $LaRETURN_HERE
++#endif
+ rsubi r3,r3,0 # Negate the result
+ $LaDiv_By_Zero:
+ $LaResult_Is_Zero:
+@@ -108,7 +140,7 @@ $LaRETURN_HERE:
+ lli r29,r1,8
+ lli r30,r1,16
+ lli r31,r1,24
+- addik r1,r1,32
++ addlik r1,r1,32
+ rtsd r15,8
+ nop
+ #else
+diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
+index e28c69a..991dbcd 100644
+--- a/libgcc/config/microblaze/mulsi3.S
++++ b/libgcc/config/microblaze/mulsi3.S
+@@ -43,7 +43,37 @@
+ .type __mulsi3,@function
+ #ifdef __arch64__
+ .align 3
+-#endif
++__mulsi3:
++ .frame r1,0,r15
++ add r3,r0,r0
++ BEAEQI r5,$L_Result_Is_Zero # Multiply by Zero
++ BEAEQI r6,$L_Result_Is_Zero # Multiply by Zero
++ BEAGEId r5,$L_R5_Pos
++ XOR r4,r5,r6 # Get the sign of the result
++ RSUBI r5,r5,0 # Make r5 positive
++$L_R5_Pos:
++ BEAGEI r6,$L_R6_Pos
++ RSUBI r6,r6,0 # Make r6 positive
++$L_R6_Pos:
++ breai $L1
++$L2:
++ add r5,r5,r5
++$L1:
++ srl r6,r6
++ addc r7,r0,r0
++ beaeqi r7,$L2
++ beaneid r6,$L2
++ add r3,r3,r5
++ bealti r4,$L_NegateResult
++ rtsd r15,8
++ nop
++$L_NegateResult:
++ rtsd r15,8
++ rsub r3,r3,r0
++$L_Result_Is_Zero:
++ rtsd r15,8
++ addi r3,r0,0
++#else
+ __mulsi3:
+ .frame r1,0,r15
+ add r3,r0,r0
+@@ -74,5 +104,6 @@ $L_NegateResult:
+ $L_Result_Is_Zero:
+ rtsd r15,8
+ addi r3,r0,0
++#endif
+ .end __mulsi3
+ .size __mulsi3, . - __mulsi3
+diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
+index b1e44b6..42b086e 100644
+--- a/libgcc/config/microblaze/udivsi3.S
++++ b/libgcc/config/microblaze/udivsi3.S
+@@ -59,52 +59,96 @@ __udivsi3:
+ SWI r30,r1,4
+ SWI r31,r1,8
+ #endif
++#ifdef __arch64__
++ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
++ BEAEQID r5,$LaResult_Is_Zero # Result is Zero
++#else
+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
+ BEQID r5,$LaResult_Is_Zero # Result is Zero
++#endif
+ ADDIK r30,r0,0 # Clear mod
+ ADDIK r29,r0,32 # Initialize the loop count
+
+ # Check if r6 and r5 are equal # if yes, return 1
+ RSUB r18,r5,r6
++#ifdef __arch64__
++ BEAEQID r18,$LaRETURN_HERE
++#else
+ BEQID r18,$LaRETURN_HERE
++#endif
+ ADDIK r3,r0,1
+
+ # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
+ XOR r18,r5,r6
+- BGEID r18,16
++#ifdef __arch64__
++ BEAGEID r18,16
++#else
++ BGEID r18,16
++#endif
+ ADD r3,r0,r0 # We would anyways clear r3
++#ifdef __arch64__
++ BEALTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
++ BREAI $LCheckr6
++ RSUB r18,r6,r5 # MICROBLAZEcmp
++ BEALTI r18,$LaRETURN_HERE
++#else
+ BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
+ BRI $LCheckr6
+ RSUB r18,r6,r5 # MICROBLAZEcmp
+ BLTI r18,$LaRETURN_HERE
+-
++#endif
+ # If r6 [bit 31] is set, then return result as 1
+ $LCheckr6:
+- BGTI r6,$LaDIV0
+- BRID $LaRETURN_HERE
++#ifdef __arch64__
++ BEAGTI r6,$LaDIV0
++ BREAID $LaRETURN_HERE
++#else
++ BGTI r6,$LaDIV0
++ BRID $LaRETURN_HERE
++#endif
+ ADDIK r3,r0,1
+
+ # First part try to find the first '1' in the r5
+ $LaDIV0:
++#ifdef __arch64__
++ BEALTI r5,$LaDIV2
++#else
+ BLTI r5,$LaDIV2
++#endif
+ $LaDIV1:
+ ADD r5,r5,r5 # left shift logical r5
++#ifdef __arch64__
++ BEAGTID r5,$LaDIV1
++#else
+ BGTID r5,$LaDIV1
++#endif
+ ADDIK r29,r29,-1
+ $LaDIV2:
+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
+ ADDC r30,r30,r30 # Move that bit into the Mod register
+ RSUB r31,r6,r30 # Try to subtract (r30 a r6)
++#ifdef __arch64__
++ BEALTI r31,$LaMOD_TOO_SMALL
++#else
+ BLTI r31,$LaMOD_TOO_SMALL
++#endif
+ OR r30,r0,r31 # Move the r31 to mod since the result was positive
+ ADDIK r3,r3,1
+ $LaMOD_TOO_SMALL:
+ ADDIK r29,r29,-1
++#ifdef __arch64__
++ BEAEQi r29,$LaLOOP_END
++ ADD r3,r3,r3 # Shift in the '1' into div
++ BREAI $LaDIV2 # Div2
++$LaLOOP_END:
++ BREAI $LaRETURN_HERE
++#else
+ BEQi r29,$LaLOOP_END
+ ADD r3,r3,r3 # Shift in the '1' into div
+ BRI $LaDIV2 # Div2
+ $LaLOOP_END:
+ BRI $LaRETURN_HERE
++#endif
+ $LaDiv_By_Zero:
+ $LaResult_Is_Zero:
+ OR r3,r0,r0 # set result to 0
+@@ -115,7 +159,7 @@ $LaRETURN_HERE:
+ LLI r29,r1,0
+ LLI r30,r1,8
+ LLI r31,r1,16
+- ADDIK r1,r1,24
++ ADDLIK r1,r1,24
+ RTSD r15,8
+ NOP
+ #else
+diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
+index 1b3070e..91430a6 100644
+--- a/libgcc/config/microblaze/umodsi3.S
++++ b/libgcc/config/microblaze/umodsi3.S
+@@ -46,7 +46,7 @@
+ __umodsi3:
+ .frame r1,0,r15
+
+- addik r1,r1,-24
++ addlik r1,r1,-24
+ sli r29,r1,0
+ sli r30,r1,8
+ sli r31,r1,16
+@@ -59,27 +59,77 @@ __umodsi3:
+ swi r30,r1,4
+ swi r31,r1,8
+ #endif
++#ifdef __arch64__
++ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
++ BEAEQId r5,$LaResult_Is_Zero # Result is Zero
++#else
+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
+ BEQId r5,$LaResult_Is_Zero # Result is Zero
++#endif
+ ADDIK r3,r0,0 # Clear div
+ ADDIK r30,r0,0 # clear mod
+ ADDIK r29,r0,32 # Initialize the loop count
+
+ # Check if r6 and r5 are equal # if yes, return 0
+ rsub r18,r5,r6
+- beqi r18,$LaRETURN_HERE
+
++#ifdef __arch64__
++ beaeqi r18,$LaRETURN_HERE
++#else
++ beqi r18,$LaRETURN_HERE
++#endif
+ # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5
+ xor r18,r5,r6
++#ifdef __arch64__
++ beageid r18,16
++ addik r3,r5,0
++ bealti r6,$LaRETURN_HERE
++ breai $LCheckr6
++ rsub r18,r5,r6 # MICROBLAZEcmp
++ beagti r18,$LaRETURN_HERE
++#else
+ bgeid r18,16
+ addik r3,r5,0
+ blti r6,$LaRETURN_HERE
+ bri $LCheckr6
+ rsub r18,r5,r6 # MICROBLAZEcmp
+ bgti r18,$LaRETURN_HERE
+-
++#endif
+ # If r6 [bit 31] is set, then return result as r5-r6
+ $LCheckr6:
++#ifdef __arch64__
++ beagtid r6,$LaDIV0
++ addik r3,r0,0
++ addik r18,r0,0x7fffffff
++ and r5,r5,r18
++ and r6,r6,r18
++ breaid $LaRETURN_HERE
++ rsub r3,r6,r5
++# First part: try to find the first '1' in the r5
++$LaDIV0:
++ BEALTI r5,$LaDIV2
++$LaDIV1:
++ ADD r5,r5,r5 # left shift logical r5
++ BEAGEID r5,$LaDIV1 #
++ ADDIK r29,r29,-1
++$LaDIV2:
++ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
++ ADDC r3,r3,r3 # Move that bit into the Mod register
++ rSUB r31,r6,r3 # Try to subtract (r3 a r6)
++ BEALTi r31,$LaMOD_TOO_SMALL
++ OR r3,r0,r31 # Move the r31 to mod since the result was positive
++ ADDIK r30,r30,1
++$LaMOD_TOO_SMALL:
++ ADDIK r29,r29,-1
++ BEAEQi r29,$LaLOOP_END
++ ADD r30,r30,r30 # Shift in the '1' into div
++ BREAI $LaDIV2 # Div2
++$LaLOOP_END:
++ BREAI $LaRETURN_HERE
++$LaDiv_By_Zero:
++$LaResult_Is_Zero:
++ or r3,r0,r0 # set result to 0
++#else
+ bgtid r6,$LaDIV0
+ addik r3,r0,0
+ addik r18,r0,0x7fffffff
+@@ -111,7 +161,7 @@ $LaLOOP_END:
+ $LaDiv_By_Zero:
+ $LaResult_Is_Zero:
+ or r3,r0,r0 # set result to 0
+-
++#endif
+ #ifdef __arch64__
+ $LaRETURN_HERE:
+ # Restore values of CSRs and that of r3 and the divisor and the dividend
+--
+2.7.4
+