diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/0006-allow-setting-sysroot-for-libgcc-lookup.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0006-allow-setting-sysroot-for-libgcc-lookup.patch
new file mode 100644
index 0000000..b838335
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0006-allow-setting-sysroot-for-libgcc-lookup.patch
@@ -0,0 +1,35 @@
+From 4b2c1a31efe0c5514ae27e696e75659b55e41259 Mon Sep 17 00:00:00 2001
+From: Ross Burton <ross.burton@arm.com>
+Date: Tue, 26 May 2020 14:38:02 -0500
+Subject: [PATCH] allow setting sysroot for libgcc lookup
+
+Explicitly pass the new variable LIBGCC_LOCATE_CFLAGS variable when searching
+for the compiler libraries as there's no easy way to reliably pass --sysroot
+otherwise.
+
+Upstream-Status: Pending [https://github.com/OP-TEE/optee_os/issues/4188]
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+
+---
+ mk/gcc.mk | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/mk/gcc.mk b/mk/gcc.mk
+index adc77a24..81bfa78a 100644
+--- a/mk/gcc.mk
++++ b/mk/gcc.mk
+@@ -13,11 +13,11 @@ nostdinc$(sm)	:= -nostdinc -isystem $(shell $(CC$(sm)) \
+ 			-print-file-name=include 2> /dev/null)
+ 
+ # Get location of libgcc from gcc
+-libgcc$(sm)  	:= $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
++libgcc$(sm)  	:= $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
+ 			-print-libgcc-file-name 2> /dev/null)
+-libstdc++$(sm)	:= $(shell $(CXX$(sm)) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
++libstdc++$(sm)	:= $(shell $(CXX$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
+ 			-print-file-name=libstdc++.a 2> /dev/null)
+-libgcc_eh$(sm)	:= $(shell $(CXX$(sm)) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
++libgcc_eh$(sm)	:= $(shell $(CXX$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CXXFLAGS$(arch-bits-$(sm))) $(comp-cxxflags$(sm)) \
+ 			-print-file-name=libgcc_eh.a 2> /dev/null)
+ 
+ # Define these to something to discover accidental use
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/0007-allow-setting-sysroot-for-clang.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0007-allow-setting-sysroot-for-clang.patch
new file mode 100644
index 0000000..d5e3694
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0007-allow-setting-sysroot-for-clang.patch
@@ -0,0 +1,30 @@
+From 992bed8a62c75aab034fe53d6329fa7c15cf06ee Mon Sep 17 00:00:00 2001
+From: Brett Warren <brett.warren@arm.com>
+Date: Wed, 23 Sep 2020 09:27:34 +0100
+Subject: [PATCH] optee: enable clang support
+
+When compiling with clang, the LIBGCC_LOCATE_CFLAG variable used
+to provide a sysroot wasn't included, which results in not locating
+compiler-rt. This is mitigated by including the variable as ammended.
+
+Upstream-Status: Pending
+ChangeId: 8ba69a4b2eb8ebaa047cb266c9aa6c2c3da45701
+Signed-off-by: Brett Warren <brett.warren@arm.com>
+
+---
+ mk/clang.mk | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/mk/clang.mk b/mk/clang.mk
+index 0f48c836..47465523 100644
+--- a/mk/clang.mk
++++ b/mk/clang.mk
+@@ -27,7 +27,7 @@ comp-cflags-warns-clang := -Wno-language-extension-token \
+ 
+ # Note, use the compiler runtime library (libclang_rt.builtins.*.a) instead of
+ # libgcc for clang
+-libgcc$(sm)	:= $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
++libgcc$(sm)	:= $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
+ 			-rtlib=compiler-rt -print-libgcc-file-name 2> /dev/null)
+ 
+ # Core ASLR relies on the executable being ready to run from its preferred load
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/0008-no-warn-rwx-segments.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0008-no-warn-rwx-segments.patch
new file mode 100644
index 0000000..4048228
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/0008-no-warn-rwx-segments.patch
@@ -0,0 +1,65 @@
+From 3126adccaf9c9dc669bb7e1f96326c03da4b570d Mon Sep 17 00:00:00 2001
+From: Jerome Forissier <jerome.forissier@linaro.org>
+Date: Fri, 5 Aug 2022 09:48:03 +0200
+Subject: [PATCH] core: link: add --no-warn-rwx-segments
+
+Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
+Upstream-Status: Backport [https://github.com/OP-TEE/optee_os/pull/5474]
+
+binutils ld.bfd generates one RWX LOAD segment by merging several sections
+with mixed R/W/X attributes (.text, .rodata, .data). After version 2.38 it
+also warns by default when that happens [1], which breaks the build due to
+--fatal-warnings. The RWX segment is not a problem for the TEE core, since
+that information is not used to set memory permissions. Therefore, silence
+the warning.
+
+Link: [1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
+Link: https://sourceware.org/bugzilla/show_bug.cgi?id=29448
+Reported-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
+Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
+Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
+
+---
+ core/arch/arm/kernel/link.mk | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/core/arch/arm/kernel/link.mk b/core/arch/arm/kernel/link.mk
+index 69375ad6..bea239cf 100644
+--- a/core/arch/arm/kernel/link.mk
++++ b/core/arch/arm/kernel/link.mk
+@@ -17,6 +17,7 @@ link-ldflags += -T $(link-script-pp) -Map=$(link-out-dir)/tee.map
+ link-ldflags += --sort-section=alignment
+ link-ldflags += --fatal-warnings
+ link-ldflags += --gc-sections
++link-ldflags += $(call ld-option,--no-warn-rwx-segments)
+ 
+ link-ldadd  = $(LDADD)
+ link-ldadd += $(libdeps)
+@@ -37,6 +38,7 @@ link-script-cppflags := \
+ 		$(cppflagscore))
+ 
+ ldargs-all_objs := -T $(link-script-dummy) --no-check-sections \
++		   $(call ld-option,--no-warn-rwx-segments) \
+ 		   $(link-objs) $(link-ldadd) $(libgcccore)
+ cleanfiles += $(link-out-dir)/all_objs.o
+ $(link-out-dir)/all_objs.o: $(objs) $(libdeps) $(MAKEFILE_LIST)
+@@ -49,7 +51,8 @@ $(link-out-dir)/unpaged_entries.txt: $(link-out-dir)/all_objs.o
+ 	$(q)$(NMcore) $< | \
+ 		$(AWK) '/ ____keep_pager/ { printf "-u%s ", $$3 }' > $@
+ 
+-unpaged-ldargs = -T $(link-script-dummy) --no-check-sections --gc-sections
++unpaged-ldargs := -T $(link-script-dummy) --no-check-sections --gc-sections \
++		 $(call ld-option,--no-warn-rwx-segments)
+ unpaged-ldadd := $(objs) $(link-ldadd) $(libgcccore)
+ cleanfiles += $(link-out-dir)/unpaged.o
+ $(link-out-dir)/unpaged.o: $(link-out-dir)/unpaged_entries.txt
+@@ -77,7 +80,8 @@ $(link-out-dir)/init_entries.txt: $(link-out-dir)/all_objs.o
+ 	$(q)$(NMcore) $< | \
+ 		$(AWK) '/ ____keep_init/ { printf "-u%s ", $$3 }' > $@
+ 
+-init-ldargs := -T $(link-script-dummy) --no-check-sections --gc-sections
++init-ldargs := -T $(link-script-dummy) --no-check-sections --gc-sections \
++	       $(call ld-option,--no-warn-rwx-segments)
+ init-ldadd := $(link-objs-init) $(link-out-dir)/version.o  $(link-ldadd) \
+ 	      $(libgcccore)
+ cleanfiles += $(link-out-dir)/init.o
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0001-plat-corstone1000-add-corstone1000-platform.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0001-plat-corstone1000-add-corstone1000-platform.patch
deleted file mode 100644
index 7666486..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0001-plat-corstone1000-add-corstone1000-platform.patch
+++ /dev/null
@@ -1,201 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
-
-From 439a87df6a9f60f2b29afd988ad58a67e6f0b603 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Tue, 22 Jun 2021 22:09:28 +0100
-Subject: [PATCH] plat-corstone1000: add corstone1000 platform
-
-These changes are to add corstone1000 platform to optee core
-
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-diff --git a/core/arch/arm/plat-corstone1000/conf.mk b/core/arch/arm/plat-corstone1000/conf.mk
-new file mode 100644
-index 00000000..b14dd442
---- /dev/null
-+++ b/core/arch/arm/plat-corstone1000/conf.mk
-@@ -0,0 +1,37 @@
-+PLATFORM_FLAVOR ?= mps3
-+
-+$(call force,CFG_HWSUPP_MEM_PERM_WXN,y)
-+$(call force,CFG_HWSUPP_MEM_PERM_PXN,y)
-+$(call force,CFG_ENABLE_SCTLR_RR,n)
-+$(call force,CFG_ENABLE_SCTLR_Z,n)
-+
-+arm64-platform-cpuarch := cortex-a35
-+arm64-platform-cflags += -mcpu=$(arm64-platform-cpuarch)
-+arm64-platform-aflags += -mcpu=$(arm64-platform-cpuarch)
-+platform-flavor-armv8 := 1
-+
-+$(call force,CFG_GIC,y)
-+$(call force,CFG_PL011,y)
-+$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
-+
-+$(call force,CFG_ARM64_core,y)
-+
-+CFG_WITH_STATS ?= y
-+
-+CFG_WITH_ARM_TRUSTED_FW ?= y
-+CFG_WITH_LPAE ?=y
-+
-+CFG_TEE_CORE_NB_CORE = 1
-+CFG_TZDRAM_START ?= 0x02002000
-+CFG_TZDRAM_SIZE  ?= 0x000FE000
-+CFG_TEE_RAM_VA_SIZE ?= 0x00AF000
-+CFG_SHMEM_START  ?= 0x86000000
-+CFG_SHMEM_SIZE   ?= 0x00200000
-+
-+CFG_DDR_SIZE ?= 0x80000000
-+CFG_DT_ADDR ?= 0x82100000
-+CFG_DTB_MAX_SIZE ?= 0x100000
-+
-+$(call force,CFG_PSCI_ARM64,y)
-+$(call force,CFG_DT,y)
-+$(call force,CFG_EXTERNAL_DTB_OVERLAY,y)
-diff --git a/core/arch/arm/plat-corstone1000/main.c b/core/arch/arm/plat-corstone1000/main.c
-new file mode 100644
-index 00000000..35d89535
---- /dev/null
-+++ b/core/arch/arm/plat-corstone1000/main.c
-@@ -0,0 +1,77 @@
-+// SPDX-License-Identifier: BSD-2-Clause
-+/*
-+ * Copyright (c) 2020, Linaro Limited
-+ */
-+
-+#include <arm64.h>
-+#include <console.h>
-+#include <drivers/gic.h>
-+#include <drivers/pl011.h>
-+#include <drivers/tzc400.h>
-+#include <initcall.h>
-+#include <keep.h>
-+#include <kernel/boot.h>
-+#include <kernel/interrupt.h>
-+#include <kernel/misc.h>
-+#include <kernel/panic.h>
-+#include <kernel/tee_time.h>
-+#include <mm/core_memprot.h>
-+#include <mm/core_mmu.h>
-+#include <platform_config.h>
-+#include <sm/psci.h>
-+#include <stdint.h>
-+#include <string.h>
-+#include <trace.h>
-+
-+static struct gic_data gic_data __nex_bss;
-+static struct pl011_data console_data __nex_bss;
-+
-+register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
-+#ifdef DRAM0_BASE
-+register_ddr(DRAM0_BASE, DRAM0_SIZE);
-+#endif
-+
-+#ifdef GIC_BASE
-+register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
-+register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_DIST_REG_SIZE);
-+
-+void main_init_gic(void)
-+{
-+	vaddr_t gicc_base;
-+	vaddr_t gicd_base;
-+
-+	gicc_base = core_mmu_get_va(GICC_BASE, MEM_AREA_IO_SEC);
-+	gicd_base = core_mmu_get_va(GICD_BASE, MEM_AREA_IO_SEC);
-+
-+	if (!gicc_base || !gicd_base)
-+		panic();
-+
-+	/* Initialize GIC */
-+	gic_init(&gic_data, gicc_base, gicd_base);
-+	itr_init(&gic_data.chip);
-+
-+}
-+
-+void main_secondary_init_gic(void)
-+{
-+	gic_cpu_init(&gic_data);
-+}
-+
-+void itr_core_handler(void)
-+{
-+	gic_it_handle(&gic_data);
-+}
-+#endif
-+
-+void console_init(void)
-+{
-+	pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
-+		   CONSOLE_BAUDRATE);
-+	register_serial_console(&console_data.chip);
-+}
-+
-+void ffa_secondary_cpu_boot_req(vaddr_t secondary_ep, uint64_t cookie)
-+{
-+	DMSG("This is single core platform\n");
-+}
-+
-diff --git a/core/arch/arm/plat-corstone1000/platform_config.h b/core/arch/arm/plat-corstone1000/platform_config.h
-new file mode 100644
-index 00000000..cfee6fa4
---- /dev/null
-+++ b/core/arch/arm/plat-corstone1000/platform_config.h
-@@ -0,0 +1,46 @@
-+/* SPDX-License-Identifier: BSD-2-Clause */
-+/*
-+ * Copyright (c) 2020, Linaro Limited
-+ */
-+
-+#ifndef PLATFORM_CONFIG_H
-+#define PLATFORM_CONFIG_H
-+
-+#include <mm/generic_ram_layout.h>
-+#include <stdint.h>
-+
-+/* Make stacks aligned to data cache line length */
-+#define STACK_ALIGNMENT		64
-+
-+
-+#define GIC_BASE		0x1c000000
-+#define UART0_BASE		0x1a510000
-+#define UART1_BASE		0x1a520000
-+
-+#define CONSOLE_UART_BASE	UART1_BASE
-+
-+#define DRAM0_BASE		0x80000000
-+#define DRAM0_SIZE		0x7f000000
-+
-+#define GICD_OFFSET		0x10000
-+#define GICC_OFFSET		0x2f000
-+
-+#ifdef GIC_BASE
-+#define GICD_BASE		(GIC_BASE + GICD_OFFSET)
-+#define GICC_BASE		(GIC_BASE + GICC_OFFSET)
-+#endif
-+
-+#ifndef UART_BAUDRATE
-+#define UART_BAUDRATE		115200
-+#endif
-+#ifndef CONSOLE_BAUDRATE
-+#define CONSOLE_BAUDRATE	UART_BAUDRATE
-+#endif
-+
-+#ifndef SYS_COUNTER_FREQ_IN_TICKS
-+#define SYS_COUNTER_FREQ_IN_TICKS	UL(50000000) /* 32MHz */
-+#endif
-+
-+#define CONSOLE_UART_CLK_IN_HZ	UL(50000000) /* 32MHz*/
-+
-+#endif /*PLATFORM_CONFIG_H*/
-diff --git a/core/arch/arm/plat-corstone1000/sub.mk b/core/arch/arm/plat-corstone1000/sub.mk
-new file mode 100644
-index 00000000..8ddc2fd4
---- /dev/null
-+++ b/core/arch/arm/plat-corstone1000/sub.mk
-@@ -0,0 +1,2 @@
-+global-incdirs-y += .
-+srcs-y += main.c
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch
deleted file mode 100644
index ea60fee..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Arpita S.K <arpita.s.k@arm.com>
-
-From dbaf7a11e686d362eb09e63841eb718ea777dd03 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Wed, 1 Sep 2021 16:46:42 +0100
-Subject: [PATCH] plat-corstone1000: reserve 3MB CVM memory for optee
-
-optee requires 3MB CVM memory to include SecurePartition's into
-it's image
-
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-diff --git a/core/arch/arm/plat-corstone1000/conf.mk b/core/arch/arm/plat-corstone1000/conf.mk
-index b14dd442..7a4aa13c 100644
---- a/core/arch/arm/plat-corstone1000/conf.mk
-+++ b/core/arch/arm/plat-corstone1000/conf.mk
-@@ -23,8 +23,7 @@ CFG_WITH_LPAE ?=y
- 
- CFG_TEE_CORE_NB_CORE = 1
- CFG_TZDRAM_START ?= 0x02002000
--CFG_TZDRAM_SIZE  ?= 0x000FE000
--CFG_TEE_RAM_VA_SIZE ?= 0x00AF000
-+CFG_TZDRAM_SIZE  ?= 0x300000 # OPTEE CODE + DATA +TA_RAM = 3MB
- CFG_SHMEM_START  ?= 0x86000000
- CFG_SHMEM_SIZE   ?= 0x00200000
- 
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch
deleted file mode 100644
index 9aec829..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-From 327290faefe16440c4975c9539b11d43c92bcf48 Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Thu, 25 Nov 2021 06:20:48 +0000
-Subject: [PATCH] plat-corstone1000: add a rule in Makefile to SP_MAKEFILE_PATH
-
-This change is to provide an option to user to include
-secure manifest into optee-os Makefile so that the secure
-partition is part of optee-os image
-
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-diff --git a/Makefile b/Makefile
-index f6fcea8b..21722939 100644
---- a/Makefile
-+++ b/Makefile
-@@ -18,6 +18,16 @@ unexport MAKEFILE_LIST
- # nonzero status). Useful since a few recipes use shell redirection.
- .DELETE_ON_ERROR:
- 
-+# include secure partition make file and manifest file
-+ifdef CFG_SP_MKFILE_PATH
-+ifdef CFG_EMBED_DTB_SOURCE_FILE
-+include $(CFG_SP_MKFILE_PATH)
-+$(info Loading secure partitions manifest ${CFG_EMBED_DTB_SOURCE_FILE})
-+CFG_EMBED_DTB_SOURCE_FILE :=${CFG_EMBED_DTB_SOURCE_FILE}
-+OPTEE_OS_COMMON_EXTRA_FLAGS+=${CFG_EMBED_DTB_SOURCE_FILE}
-+endif
-+endif
-+
- include mk/checkconf.mk
- 
- .PHONY: all
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch
deleted file mode 100644
index 42babb1..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-From 5fdf7792ead29784718d30d8a8a5383a994e2fef Mon Sep 17 00:00:00 2001
-From: Vishnu Banavath <vishnu.banavath@arm.com>
-Date: Thu, 2 Dec 2021 12:51:11 +0000
-Subject: [PATCH] plat-corstone1000: increase OPTEE core heap size
-
-This change is to increase optee core heap size to 131072
-from its default value to fit openAMP and smm-gateway
-in SEL0
-
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-diff --git a/core/arch/arm/plat-corstone1000/conf.mk b/core/arch/arm/plat-corstone1000/conf.mk
-index 7a4aa13c..65d652a4 100644
---- a/core/arch/arm/plat-corstone1000/conf.mk
-+++ b/core/arch/arm/plat-corstone1000/conf.mk
-@@ -31,6 +31,7 @@ CFG_DDR_SIZE ?= 0x80000000
- CFG_DT_ADDR ?= 0x82100000
- CFG_DTB_MAX_SIZE ?= 0x100000
- 
-+CFG_CORE_HEAP_SIZE ?= 131072
- $(call force,CFG_PSCI_ARM64,y)
- $(call force,CFG_DT,y)
- $(call force,CFG_EXTERNAL_DTB_OVERLAY,y)
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0005-Fix-add-missing-error-check-during-SP-init.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0005-Fix-add-missing-error-check-during-SP-init.patch
deleted file mode 100644
index 852067b..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0005-Fix-add-missing-error-check-during-SP-init.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
-
-From 4617f85b70c7e4206b244f3eaffdc62ac3744a17 Mon Sep 17 00:00:00 2001
-From: Jelle Sels <jelle.sels@arm.com>
-Date: Mon, 10 May 2021 11:37:23 +0200
-Subject: [PATCH] Fix: add missing error check during SP init
-
-Error checking during SP initialization (sp_init_uuid()) was lacking.
-As a result an out of CORE HEAP situation resulted in a panic. This was
-due to lack of memory in the inflate() function of zlib.
-
-Signed-off-by: Jelle Sels <jelle.sels@arm.com>
-Change-Id: I287e2e2dd507feb45991b32ed264b3b6ad6fcd39
-
-diff --git a/core/arch/arm/kernel/sp.c b/core/arch/arm/kernel/sp.c
-index 4acbc2e2..23532a01 100644
---- a/core/arch/arm/kernel/sp.c
-+++ b/core/arch/arm/kernel/sp.c
-@@ -383,10 +383,14 @@ static TEE_Result __attribute__((unused)) sp_init_uuid(const TEE_UUID *uuid)
- 				  cancel_req_to,
- 				  &param);
- 
--	args.a0 = sp_get_session(sess->id)->sp_regs.x[0];
--	sp_thread(sess->id, FFA_NW_ID, &args);
-+	if (res == TEE_SUCCESS) {
-+		args.a0 = sp_get_session(sess->id)->sp_regs.x[0];
-+		sp_thread(sess->id, FFA_NW_ID, &args);
- 
--	thread_spmc_msg_recv(&args, sess->id);
-+		thread_spmc_msg_recv(&args, sess->id);
-+	} else {
-+		EMSG("SP initialization failed, try increasing CFG_CORE_HEAP_SIZE");
-+	}
- 
- 	return res;
- }
--- 
-2.25.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts
deleted file mode 100644
index b09018e..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
-* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
-*
-* SPDX-License-Identifier: BSD-3-Clause
-*/
-
-/dts-v1/;
-
-/ {
-    se-proxy{
-        compatible = "arm,ffa-manifest-1.0";
-        ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
-        uuid = <0x46bb39d1 0xb4d945b5 0x88ff0400 0x27dab249>;
-        description = "SE Proxy";
-        execution-ctx-count = <1>;
-        exception-level = <1>; /* S-EL0 */
-        execution-state = <0>; /* AArch64 */
-        xlat-granule = <0>; /* 4KiB */
-        messaging-method = <0>; /* Direct messaging only */
-	device-regions {
-		compatible = "arm,ffa-manifest-device-regions";
-		mhu-sender {
-			/* Armv8 A Foundation Platform values */
-			base-address = <0x00000000 0x1b820000>;
-			pages-count = <16>;
-			attributes = <0x3>; /* read-write */
-		};
-		mhu-receiver {
-			/* Armv8 A Foundation Platform values */
-			base-address = <0x00000000 0x1b830000>;
-			pages-count = <16>;
-			attributes = <0x3>; /* read-write */
-		};
-		openamp-virtio {
-			/* Armv8 A Foundation Platform values */
-			base-address = <0x00000000 0x88000000>;
-			pages-count = <256>;
-			attributes = <0x3>; /* read-write */
-		};
-	};
-    };
-    smm-gateway{
-        compatible = "arm,ffa-manifest-1.0";
-        ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
-        uuid = <0xed32d533 0x99e64209 0x9cc02d72 0xcdd998a7>;
-        description = "SMM Gateway";
-        execution-ctx-count = <1>;
-        exception-level = <1>; /* S-EL0 */
-        execution-state = <0>; /* AArch64 */
-        xlat-granule = <0>; /* 4KiB */
-        messaging-method = <0>; /* Direct messaging only */
-		device-regions {
-          compatible = "arm,ffa-manifest-device-regions";
-          mm-comm-buffer {
-              /* Armv8 A Foundation Platform values */
-              base-address = <0x00000000 0x02000000>;
-              pages-count = <1>;
-              attributes = <0x3>; /* read-write */
-              };
-		};
-    };
-};
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch
index 3a21b39..0f0a76e 100644
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch
+++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch
@@ -1,7 +1,7 @@
-From 14b84786e85483bf3c737ef8b392204e307c0ff1 Mon Sep 17 00:00:00 2001
+From 34db1357ab3192f18629ceadf4ea33b948513fec Mon Sep 17 00:00:00 2001
 From: Olivier Deprez <olivier.deprez@arm.com>
 Date: Mon, 16 Nov 2020 10:14:02 +0100
-Subject: [PATCH] WIP: Enable managed exit
+Subject: [PATCH 1/2] WIP: Enable managed exit
 
 This change declares OP-TEE SP as supporting managed exit in response to
 a NS interrupt triggering while the SWd runs.
@@ -27,14 +27,14 @@
  core/arch/arm/kernel/boot.c                          | 12 ++++++++++++
  core/arch/arm/kernel/thread_a64.S                    | 11 ++++++++++-
  core/arch/arm/kernel/thread_spmc.c                   | 11 +++++++++++
- .../arm/plat-totalcompute/fdts/optee_sp_manifest.dts |  2 +-
- 4 files changed, 34 insertions(+), 2 deletions(-)
+ .../arm/plat-totalcompute/fdts/optee_sp_manifest.dts |  1 +
+ 4 files changed, 34 insertions(+), 1 deletion(-)
 
 diff --git a/core/arch/arm/kernel/boot.c b/core/arch/arm/kernel/boot.c
-index 09c1b811..d130107f 100644
+index f173384d..466c042e 100644
 --- a/core/arch/arm/kernel/boot.c
 +++ b/core/arch/arm/kernel/boot.c
-@@ -1279,6 +1279,18 @@ static void init_secondary_helper(unsigned long nsec_entry)
+@@ -1350,6 +1350,18 @@ static void init_secondary_helper(unsigned long nsec_entry)
  	init_vfp_sec();
  	init_vfp_nsec();
  
@@ -54,10 +54,10 @@
  }
  
 diff --git a/core/arch/arm/kernel/thread_a64.S b/core/arch/arm/kernel/thread_a64.S
-index 3e0f5115..63bf396a 100644
+index d6baee4d..1b0c8f37 100644
 --- a/core/arch/arm/kernel/thread_a64.S
 +++ b/core/arch/arm/kernel/thread_a64.S
-@@ -904,6 +904,14 @@ END_FUNC el0_sync_abort
+@@ -1087,6 +1087,14 @@ END_FUNC el0_sync_abort
  	bl	dcache_op_louis
  	ic	iallu
  #endif
@@ -72,7 +72,7 @@
  	/*
  	 * Mark current thread as suspended
  	 */
-@@ -1021,8 +1029,9 @@ LOCAL_FUNC elx_irq , :
+@@ -1204,8 +1212,9 @@ LOCAL_FUNC elx_irq , :
  #endif
  END_FUNC elx_irq
  
@@ -84,10 +84,10 @@
  #else
  	native_intr_handler	fiq
 diff --git a/core/arch/arm/kernel/thread_spmc.c b/core/arch/arm/kernel/thread_spmc.c
-index bd7930e7..89ff82bc 100644
+index ea9e8f03..15577e7e 100644
 --- a/core/arch/arm/kernel/thread_spmc.c
 +++ b/core/arch/arm/kernel/thread_spmc.c
-@@ -1394,6 +1394,17 @@ static TEE_Result spmc_init(void)
+@@ -1518,6 +1518,17 @@ static TEE_Result spmc_init(void)
  	my_endpoint_id = spmc_get_id();
  	DMSG("My endpoint ID %#x", my_endpoint_id);
  
@@ -104,21 +104,19 @@
 +
  	return TEE_SUCCESS;
  }
- #endif /*CFG_CORE_SEL2_SPMC*/
+ #endif /* !defined(CFG_CORE_SEL1_SPMC) */
 diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
-index 4b8b3681..04847c4d 100644
+index 0bfe33f3..00cfa5b2 100644
 --- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
 +++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
-@@ -23,7 +23,8 @@
- 	entrypoint-offset = <0x1000>;
+@@ -24,6 +24,7 @@
  	xlat-granule = <0>; /* 4KiB */
  	boot-order = <0>;
--	messaging-method = <0>; /* Direct messaging only */
-+	messaging-method = <3>; /* Direct request/response supported */
+ 	messaging-method = <0x3>; /* Direct request/response supported */
 +	managed-exit; /* Managed exit supported */
-
+ 
  	device-regions {
  		compatible = "arm,ffa-manifest-device-regions";
 -- 
-2.29.2
+2.34.1
 
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-ffa-Update-function-ID-according-to-FFA-v1.1-spec.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-ffa-Update-function-ID-according-to-FFA-v1.1-spec.patch
deleted file mode 100644
index 44138cb..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-ffa-Update-function-ID-according-to-FFA-v1.1-spec.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 3a240f6b6c58d70471fd0752b8854c43c7c4df72 Mon Sep 17 00:00:00 2001
-From: Usama Arif <usama.arif@arm.com>
-Date: Wed, 11 Aug 2021 11:00:52 +0100
-Subject: [PATCH 2/2] ffa: Update function ID according to FFA v1.1 spec
-
-This updates function ID FFA_SECONDARY_EP_REGISTER_64.
-
-Upstream-Status: Pending [Not submitted to upstream yet]
-Signed-off-by: Usama Arif <usama.arif@arm.com>
----
- core/arch/arm/include/ffa.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/core/arch/arm/include/ffa.h b/core/arch/arm/include/ffa.h
-index 20a009ca..b0d68173 100644
---- a/core/arch/arm/include/ffa.h
-+++ b/core/arch/arm/include/ffa.h
-@@ -69,7 +69,7 @@
- #define FFA_MEM_RECLAIM			U(0x84000077)
- #define FFA_MEM_FRAG_RX			U(0x8400007A)
- #define FFA_MEM_FRAG_TX			U(0x8400007B)
--#define FFA_SECONDARY_EP_REGISTER_64	U(0xC4000084)
-+#define FFA_SECONDARY_EP_REGISTER_64	U(0xC4000087)
- 
- /* Special value for traffic targeted to the Hypervisor or SPM */
- #define FFA_TARGET_INFO_MBZ		U(0x0)
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch
new file mode 100644
index 0000000..ff7f513
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch
@@ -0,0 +1,50 @@
+From 35dba075593cb32c62b881e7763fcf0ea37908f7 Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Mon, 23 May 2022 11:32:41 +0100
+Subject: [PATCH 2/2] plat-totalcompute: fix TZDRAM start and size
+
+- Fix TZDRAM_SIZE in TC platform
+- For CFG_CORE_SEL2_SPMC, manifest size is increased from 0x1000 to
+  0x4000 for boot protocol support.
+
+Upstream-Status: Pending [Not submitted to upstream yet]
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: Iff19c498e9edae961f469604d69419c1a32145f5
+---
+ core/arch/arm/plat-totalcompute/conf.mk                    | 5 +++--
+ core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts | 2 +-
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/core/arch/arm/plat-totalcompute/conf.mk b/core/arch/arm/plat-totalcompute/conf.mk
+index b39ac0f0..2f6c0ee1 100644
+--- a/core/arch/arm/plat-totalcompute/conf.mk
++++ b/core/arch/arm/plat-totalcompute/conf.mk
+@@ -32,8 +32,9 @@ ifeq ($(CFG_CORE_SEL1_SPMC),y)
+ CFG_TZDRAM_START ?= 0xfd000000
+ CFG_TZDRAM_SIZE  ?= 0x02000000
+ else ifeq ($(CFG_CORE_SEL2_SPMC),y)
+-CFG_TZDRAM_START ?= 0xfd281000
+-CFG_TZDRAM_SIZE  ?= 0x01d7f000
++CFG_TZDRAM_START ?= 0xfd284000
++# TZDRAM size 0x1980000 - 0x4000 manifest size
++CFG_TZDRAM_SIZE  ?= 0x0197c000
+ else
+ CFG_TZDRAM_START ?= 0xff000000
+ CFG_TZDRAM_SIZE  ?= 0x01000000
+diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
+index 00cfa5b2..56e69f37 100644
+--- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
++++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
+@@ -20,7 +20,7 @@
+ 	exception-level = <2>; /* S-EL1 */
+ 	execution-state = <0>; /* AARCH64 */
+ 	load-address = <0xfd280000>;
+-	entrypoint-offset = <0x1000>;
++	entrypoint-offset = <0x4000>;
+ 	xlat-granule = <0>; /* 4KiB */
+ 	boot-order = <0>;
+ 	messaging-method = <0x3>; /* Direct request/response supported */
+-- 
+2.34.1
+
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0003-Fix-optee-UUID.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0003-Fix-optee-UUID.patch
deleted file mode 100644
index 5374c02..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0003-Fix-optee-UUID.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 37fd6f3c18015bcad2c099bf9269e72140e55557 Mon Sep 17 00:00:00 2001
-From: Davidson K <davidson.kumaresan@arm.com>
-Date: Wed, 12 Jan 2022 17:14:03 +0530
-Subject: [PATCH] Fix optee UUID
-
-Upstream-Status: Backport [https://github.com/OP-TEE/optee_os/commit/a9a8e483b6ff7f6e40c5ed95310a18e0bd1993c3#diff-2a310f8cc43d961b2efc05ac1619521653ba8977ff5e6dc5bb89754fd60fe954]
-Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
----
- core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
-index 04847c4d..3b76fc7d 100644
---- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
-+++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
-@@ -14,7 +14,7 @@
- 	/* Properties */
- 	description = "op-tee";
- 	ffa-version = <0x00010000>; /* 31:16 - Major, 15:0 - Minor */
--	uuid = <0x486178e0 0xe7f811e3 0xbc5e0002 0xa5d5c51b>;
-+	uuid = <0xe0786148 0xe311f8e7 0x02005ebc 0x1bc5d5a5>;
- 	id = <1>;
- 	execution-ctx-count = <8>;
- 	exception-level = <2>; /* S-EL1 */
--- 
-2.17.1
-
diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0004-plat-totalcompute-add-support-for-higher-DRAM.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0004-plat-totalcompute-add-support-for-higher-DRAM.patch
deleted file mode 100644
index 293ea7d..0000000
--- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0004-plat-totalcompute-add-support-for-higher-DRAM.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 7fb6d720a285b6135a9247b2adde833ea90e2549 Mon Sep 17 00:00:00 2001
-From: Usama Arif <usama.arif@arm.com>
-Date: Mon, 27 Sep 2021 19:58:56 +0100
-Subject: [PATCH] plat-totalcompute: add support for higher DRAM
-
-The new 6GB DRAM bank starts at 0x8080000000.
-
-Signed-off-by: Usama Arif <usama.arif@arm.com>
-Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
-
-Upstream-Status: Backport [https://github.com/OP-TEE/optee_os/commit/6d8430f943e091282849b188fbc0847c159e5de4]
-Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
----
- core/arch/arm/plat-totalcompute/conf.mk           | 2 ++
- core/arch/arm/plat-totalcompute/main.c            | 1 +
- core/arch/arm/plat-totalcompute/platform_config.h | 3 +++
- 3 files changed, 6 insertions(+)
-
-diff --git a/core/arch/arm/plat-totalcompute/conf.mk b/core/arch/arm/plat-totalcompute/conf.mk
-index 558b7889..e894b1e1 100644
---- a/core/arch/arm/plat-totalcompute/conf.mk
-+++ b/core/arch/arm/plat-totalcompute/conf.mk
-@@ -24,6 +24,8 @@ platform-cflags-debug-info = -gdwarf-2
- platform-aflags-debug-info = -gdwarf-2
- endif
- 
-+$(call force,CFG_CORE_ARM64_PA_BITS,40)
-+
- ifneq (,$(filter ${PLATFORM_FLAVOR},tc0 tc1))
- CFG_TEE_CORE_NB_CORE = 8
- 
-diff --git a/core/arch/arm/plat-totalcompute/main.c b/core/arch/arm/plat-totalcompute/main.c
-index 42acf8dd..eab237bf 100644
---- a/core/arch/arm/plat-totalcompute/main.c
-+++ b/core/arch/arm/plat-totalcompute/main.c
-@@ -27,6 +27,7 @@ register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
- #endif
- 
- register_ddr(DRAM0_BASE, DRAM0_SIZE);
-+register_ddr(DRAM1_BASE, DRAM1_SIZE);
- 
- #ifndef CFG_CORE_SEL2_SPMC
- void main_init_gic(void)
-diff --git a/core/arch/arm/plat-totalcompute/platform_config.h b/core/arch/arm/plat-totalcompute/platform_config.h
-index 4255abca..b474a899 100644
---- a/core/arch/arm/plat-totalcompute/platform_config.h
-+++ b/core/arch/arm/plat-totalcompute/platform_config.h
-@@ -26,6 +26,9 @@
- #define DRAM0_BASE		0x80000000
- #define DRAM0_SIZE		0x7d000000
- 
-+#define DRAM1_BASE		0x8080000000ULL
-+#define DRAM1_SIZE		0x180000000ULL
-+
- #define TZCDRAM_BASE		0xff000000
- #define TZCDRAM_SIZE		0x01000000
- 
--- 
-2.30.2
-