From 34db1357ab3192f18629ceadf4ea33b948513fec Mon Sep 17 00:00:00 2001
From: Olivier Deprez <olivier.deprez@arm.com>
Date: Mon, 16 Nov 2020 10:14:02 +0100
Subject: [PATCH 1/2] WIP: Enable managed exit

This change declares OP-TEE SP as supporting managed exit in response to
a NS interrupt triggering while the SWd runs.

At init OP-TEE enables (HF_INTERRUPT_ENABLE) the managed exit virtual
interrupt through the Hafnium para-virtualized interface.

Physical interrupts are trapped to the SPMC which injects a managed exit
interrupt to OP-TEE. The managed exit interrupt is acknowledged by
OP-TEE by HF_INTERUPT_GET hvc call.

Note: this code change is meant with in mind the SPMC runs at SEL2. It
needs slight refactoring such that it does not break the SEL1 SPMC
configuration.

Change-Id: I9a95f36cf517c11048ff04680007f40259c4f636
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

Upstream-Status: Pending [Not submitted to upstream yet]
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
---
 core/arch/arm/kernel/boot.c                          | 12 ++++++++++++
 core/arch/arm/kernel/thread_a64.S                    | 11 ++++++++++-
 core/arch/arm/kernel/thread_spmc.c                   | 11 +++++++++++
 .../arm/plat-totalcompute/fdts/optee_sp_manifest.dts |  1 +
 4 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/core/arch/arm/kernel/boot.c b/core/arch/arm/kernel/boot.c
index f173384d..466c042e 100644
--- a/core/arch/arm/kernel/boot.c
+++ b/core/arch/arm/kernel/boot.c
@@ -1350,6 +1350,18 @@ static void init_secondary_helper(unsigned long nsec_entry)
 	init_vfp_sec();
 	init_vfp_nsec();
 
+	/* Enable managed exit interrupt for secondary core. */
+	__asm__ volatile (
+		"mov x0, %0;"
+		"mov x1, %1;"
+		"mov x2, %2;"
+		"mov x3, %3;"
+		"hvc #0"
+		: : "i" (0xff03), "i" (4), "i" (1), "i" (1));
+
+	IMSG("%s core %lu: enabled managed exit interrupt.",
+		__func__, get_core_pos());
+
 	IMSG("Secondary CPU %zu switching to normal world boot", get_core_pos());
 }
 
diff --git a/core/arch/arm/kernel/thread_a64.S b/core/arch/arm/kernel/thread_a64.S
index d6baee4d..1b0c8f37 100644
--- a/core/arch/arm/kernel/thread_a64.S
+++ b/core/arch/arm/kernel/thread_a64.S
@@ -1087,6 +1087,14 @@ END_FUNC el0_sync_abort
 	bl	dcache_op_louis
 	ic	iallu
 #endif
+
+	/* HF_INTERRUPT_GET */
+	mov	x0, #0xff04
+	hvc	#0
+	/* Expect managed exit interrupt */
+	cmp	x0, #4
+	bne	.
+
 	/*
 	 * Mark current thread as suspended
 	 */
@@ -1204,8 +1212,9 @@ LOCAL_FUNC elx_irq , :
 #endif
 END_FUNC elx_irq
 
+#define HF_MANAGED_EXIT		1
 LOCAL_FUNC elx_fiq , :
-#if defined(CFG_ARM_GICV3)
+#if defined(CFG_ARM_GICV3) || defined (HF_MANAGED_EXIT)
 	foreign_intr_handler	fiq
 #else
 	native_intr_handler	fiq
diff --git a/core/arch/arm/kernel/thread_spmc.c b/core/arch/arm/kernel/thread_spmc.c
index ea9e8f03..15577e7e 100644
--- a/core/arch/arm/kernel/thread_spmc.c
+++ b/core/arch/arm/kernel/thread_spmc.c
@@ -1518,6 +1518,17 @@ static TEE_Result spmc_init(void)
 	my_endpoint_id = spmc_get_id();
 	DMSG("My endpoint ID %#x", my_endpoint_id);
 
+	/* Enable managed exit interrupt for boot core. */
+	__asm__ volatile (
+		"mov x0, %0;"
+		"mov x1, %1;"
+		"mov x2, %2;"
+		"mov x3, %3;"
+		"hvc #0"
+		: : "i" (0xff03), "i" (4), "i" (1), "i" (1));
+
+	IMSG("%s enabled managed exit interrupt.", __func__);
+
 	return TEE_SUCCESS;
 }
 #endif /* !defined(CFG_CORE_SEL1_SPMC) */
diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
index 0bfe33f3..00cfa5b2 100644
--- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
+++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts
@@ -24,6 +24,7 @@
 	xlat-granule = <0>; /* 4KiB */
 	boot-order = <0>;
 	messaging-method = <0x3>; /* Direct request/response supported */
+	managed-exit; /* Managed exit supported */
 
 	device-regions {
 		compatible = "arm,ffa-manifest-device-regions";
-- 
2.34.1