commit 9d9d9e37a145014dd6f4ebf5733062f56f9b3c86
author Tim Lee <timlee660101@gmail.com> Fri Oct 28 16:57:26 2022 +0800
committer Patrick Williams <patrick@stwcx.xyz> Tue Nov 01 16:01:31 2022 +0000
tree 7576eabcfb41a7cd86781d988ef745bd75fee2d8
parent d9981bf7ca301fa61f2a9a665baddde0ca86cef0

meta-phosphor: npcm8xx.bbclass: adjust each image alignment by its definition

Tested: buid pass and boot up successful when loading BB at 0x80000 for example

Verified by bootblock log as below:

==========
Load bootblock
==========
tip_firmware_image_init fiu0 cs0  BOOTBLOCK
tag U. scan from 0x80000000 to 0x88000000
tip_firmware_image_scan_flash BOOTBLOCK found addr 0x80080000 dst 0xfffd0000

Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I62eced6d80b48d488348d43468f8f01edf83d79a

meta-nuvoton/conf/machine/include/npcm8xx.inc

diff --git a/meta-nuvoton/conf/machine/include/npcm8xx.inc b/meta-nuvoton/conf/machine/include/npcm8xx.inc
index fafa92d..a40e8fb 100644
--- a/meta-nuvoton/conf/machine/include/npcm8xx.inc
+++ b/meta-nuvoton/conf/machine/include/npcm8xx.inc
@@ -23,6 +23,12 @@
 
 SERIAL_CONSOLES ?= "115200;ttyS0"
 
+BB_ALIGN ?= "4096"
+ATF_ALIGN ?= "4096"
+OPTEE_ALIGN ?= "4096"
+UBOOT_ALIGN ?= "4096"
+ALIGN_END ?= "4096"
+
 SOC_FAMILY = "npcm8xx"
 include conf/machine/include/soc-family.inc
 MACHINEOVERRIDES .= ":npcm8xx"