diff --git a/meta-arm/meta-gem5/COPYING.MIT b/meta-arm/meta-gem5/COPYING.MIT
new file mode 100644
index 0000000..fb950dc
--- /dev/null
+++ b/meta-arm/meta-gem5/COPYING.MIT
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy 
+of this software and associated documentation files (the "Software"), to deal 
+in the Software without restriction, including without limitation the rights 
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 
+copies of the Software, and to permit persons to whom the Software is 
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in 
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
+THE SOFTWARE.
diff --git a/meta-arm/meta-gem5/README.md b/meta-arm/meta-gem5/README.md
new file mode 100644
index 0000000..490ddca
--- /dev/null
+++ b/meta-arm/meta-gem5/README.md
@@ -0,0 +1 @@
+See ../README.md
diff --git a/meta-arm/meta-gem5/conf/layer.conf b/meta-arm/meta-gem5/conf/layer.conf
new file mode 100644
index 0000000..d329bd0
--- /dev/null
+++ b/meta-arm/meta-gem5/conf/layer.conf
@@ -0,0 +1,19 @@
+# We have a conf and classes directory, add to BBPATH
+BBPATH .= ":${LAYERDIR}"
+
+# We have recipes-* directories, add to BBFILES
+BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
+            ${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "meta-gem5"
+BBFILE_PATTERN_meta-gem5 = "^${LAYERDIR}/"
+BBFILE_PRIORITY_meta-gem5 = "5"
+
+LAYERDEPENDS_meta-gem5 = "core openembedded-layer meta-arm"
+LAYERSERIES_COMPAT_meta-gem5 = "kirkstone"
+
+BBFILES_DYNAMIC += " \
+    virtualization-layer:${LAYERDIR}/dynamic-layers/meta-virtualization/*/*/*.bbappend \
+"
+
+DISTRO_FEATURES_NATIVE:append = " ${@bb.utils.filter('DISTRO_FEATURES', 'xen', d)}"
diff --git a/meta-arm/meta-gem5/conf/machine/gem5-arm64.conf b/meta-arm/meta-gem5/conf/machine/gem5-arm64.conf
new file mode 100644
index 0000000..fa931da
--- /dev/null
+++ b/meta-arm/meta-gem5/conf/machine/gem5-arm64.conf
@@ -0,0 +1,54 @@
+# Configuration for gem5 running on ARM64
+
+#@TYPE: Machine
+#@NAME: Gem5 arm64 machine
+#@DESCRIPTION: Machine configuration for Gem5 arm64
+
+TUNE_FEATURES = "aarch64"
+
+require conf/machine/include/arm/arch-armv8a.inc
+
+MACHINE_FEATURES = "optee pci"
+
+KERNEL_IMAGETYPES = "Image vmlinux"
+KERNEL_IMAGETYPE = "Image"
+
+IMAGE_FSTYPES += "tar.bz2 ext4"
+
+SERIAL_CONSOLES = "115200;ttyAMA0"
+
+EXTRA_IMAGEDEPENDS += "virtual/gem5-bootloader"
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto"
+PREFERRED_VERSION_linux-yocto ?= "5.4%"
+
+
+# Uncomment the following if you need to build gem5 provided bootloader, else
+# using standard bootloader by Linux aarch64
+# Use gem5 provided bootloader
+# PREFERRED_PROVIDER_virtual/gem5-bootloader = "gem5-aarch64-bootloader"
+
+# use the dtb stored in the kernel recipe
+# KERNEL_DEVICETREE ?= "gem5-arm64/armv8_gem5_v2_4cpu.dtb"
+
+# Use Linux aarch64 boot wrapper with FDT support and generated
+# dtb (gem5-aarch64-dtb.bb)
+PREFERRED_PROVIDER_virtual/gem5-bootloader = "boot-wrapper-aarch64"
+
+BOOT_WRAPPER_AARCH64_CMDLINE ?= "\
+    earlyprintk=pl011,0x1c090000 console=ttyAMA0 root=/dev/vda rw mem=1G \
+    "
+# Use baremetal profile and axf file so dtb is in axf file
+GEM5_RUN_PROFILE = "configs/example/arm/baremetal.py"
+GEM5_RUN_KERNEL = "linux-system.axf"
+GEM5_RUN_EXTRA = ""
+GEM5_RUN_DTB = ""
+GEM5_RUN_CMDLINE = ""
+
+EXTRA_IMAGEDEPENDS += "gem5-aarch64-native"
+
+# As this is a virtual target that will not be used in the real world there is
+# no need for real SSH keys.  Disable rng-tools (which takes too long to
+# initialise) and install the pre-generated keys.
+PACKAGECONFIG:remove:pn-openssh = "rng-tools"
+MACHINE_EXTRA_RRECOMMENDS += "ssh-pregen-hostkeys"
diff --git a/meta-arm/meta-gem5/documentation/gem5-arm64.md b/meta-arm/meta-gem5/documentation/gem5-arm64.md
new file mode 100644
index 0000000..137676b
--- /dev/null
+++ b/meta-arm/meta-gem5/documentation/gem5-arm64.md
@@ -0,0 +1,32 @@
+# Gem5 Arm64 Platform Support in meta-gem5
+
+## Howto Build and Run
+
+### Configuration:
+In the local.conf file, MACHINE should be set as follow:
+MACHINE ?= "gem5-arm64"
+
+And in the bblayers.conf the following layers need to be added:
+##OEROOT##/meta-arm/meta-arm-toolchain
+##OEROOT##/meta-arm/meta-arm
+
+### Build:
+```bash$ bitbake core-image-minimal```
+
+### Run:
+After compilation of an image, you can execute it using the compiled gem5
+with the followin command:
+```./tmp/deploy/tools/start-gem5.sh```
+
+You can modify the script to change the command line options of gem5.
+
+## Devices supported in the kernel
+- serial
+
+### Untested:
+- pci
+- sata
+- ide
+
+
+## Devices not supported or not functional
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-bsp/boot-wrapper-aaarch64/boot-wrapper-aarch64_%.bbappend b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-bsp/boot-wrapper-aaarch64/boot-wrapper-aarch64_%.bbappend
new file mode 100644
index 0000000..e4b97e9
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-bsp/boot-wrapper-aaarch64/boot-wrapper-aarch64_%.bbappend
@@ -0,0 +1,32 @@
+# Use OVERRIDES to minimize the usage of
+# ${@bb.utils.contains('DISTRO_FEATURES', 'xen', ...
+OVERRIDES:append = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ':xen', '', d)}"
+
+# Xen image to put in the image
+# This should point to a file in the deploy image directory
+BOOT_WRAPPER_AARCH64_XEN ??= "xen-${MACHINE}"
+
+# Xen command line for the image
+BOOT_WRAPPER_AARCH64_XEN_CMDLINE ??= "noreboot dom0_mem=256M"
+
+BOOT_WRAPPER_AARCH64_XEN_CMDLINE:gem5-arm64 = "noreboot dom0_mem=256M console=dtuart \
+    dtuart=/uart@1c090000 bootscrub=0"
+
+# Fix command line in the axf file for gem5-arm64 when Xen is present
+BOOT_WRAPPER_AARCH64_CMDLINE_xen:gem5-arm64 = "console=hvc0 root=/dev/vda rw"
+
+# Image generated by boot wrapper when Xen is present
+BOOT_WRAPPER_AARCH64_IMAGE:xen ?= "xen-system.axf"
+
+EXTRA_OECONF:append:xen = " \
+--with-xen=${WORKDIR}/kernel/arch/arm64/boot/Image \
+--with-xen-cmdline="" \
+"
+
+EXTRA_OEMAKE:append:xen = " \
+XEN_IMAGE=${DEPLOY_DIR_IMAGE}/${BOOT_WRAPPER_AARCH64_XEN} \
+XEN_CMDLINE="${BOOT_WRAPPER_AARCH64_XEN_CMDLINE}" \
+"
+
+# We need xen if it is activated
+do_deploy[depends] += "${@bb.utils.contains('DISTRO_FEATURES', 'xen', 'xen:do_deploy', '', d)}"
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-devtools/gem5/gem5-aarch64-native_20.bbappend b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-devtools/gem5/gem5-aarch64-native_20.bbappend
new file mode 100644
index 0000000..5c38bdd
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-devtools/gem5/gem5-aarch64-native_20.bbappend
@@ -0,0 +1,7 @@
+# When booting gem5-arm64 with Xen we need to set the cpu as Cortex A53 and
+# remove support for pointer authentification
+GEM5_RUN_EXTRA:append = " \
+${@bb.utils.contains('DISTRO_FEATURES_NATIVE', 'xen', \
+'--param=system.cpu_cluster[0].cpus[0].isa[0].midr=0x410fd030 \
+--param=system.cpu_cluster[0].cpus[0].isa[0].id_aa64isar1_el1=0x0', \
+'', d)}"
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/files/gem5-arm64/early-printk.cfg b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/files/gem5-arm64/early-printk.cfg
new file mode 100644
index 0000000..e89e546
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/files/gem5-arm64/early-printk.cfg
@@ -0,0 +1,2 @@
+CONFIG_DEBUG=y
+CONFIG_EARLY_PRINTK_VEXPRESS=y
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/xen_%.bbappend b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/xen_%.bbappend
new file mode 100644
index 0000000..6ee4dbd
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-extended/xen/xen_%.bbappend
@@ -0,0 +1,4 @@
+# gem5-arm64 support
+COMPATIBLE_MACHINE:gem5-arm64 = "gem5-arm64"
+FILESEXTRAPATHS:prepend:gem5-arm64 := "${THISDIR}/files:"
+SRC_URI:append:gem5-arm64 = " file://early-printk.cfg"
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/linux-%.bbappend b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/linux-%.bbappend
new file mode 100644
index 0000000..7ff3fe2
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/linux-%.bbappend
@@ -0,0 +1,14 @@
+FILESEXTRAPATHS:prepend:gem5-arm64 := "${THISDIR}:"
+
+#
+# virtualization kmeta extra
+#
+SRC_URI:append:gem5-arm64 = " file://virtualization-kmeta-extra-gem5;type=kmeta;name=virtualization-kmeta-extra-gem5;destsuffix=virtualization-kmeta-extra-gem5"
+
+# We need to turn off SVE support in the Linux kernel otherwise Xen is stopping
+# Linux kernel with a coredump while trying to access XEN bit of CPACR1 core
+# register.
+LINUX_VIRTUALIZATION_DISABLE_ARM64_SVE:gem5-arm64 = "${@bb.utils.contains('DISTRO_FEATURES', \
+                                         'xen', ' features/disable-arm64-sve.scc','',d)}"
+
+KERNEL_FEATURES:append:gem5-arm64 = "${LINUX_VIRTUALIZATION_DISABLE_ARM64_SVE}"
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.cfg b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.cfg
new file mode 100644
index 0000000..7e87cab
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.cfg
@@ -0,0 +1,4 @@
+# We need to turn off SVE support in the Linux kernel otherwise Xen is stopping
+# Linux kernel with a coredump while trying to access ZEN bit of CPACR1 core
+# register.
+# CONFIG_ARM64_SVE is not set
diff --git a/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.scc b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.scc
new file mode 100644
index 0000000..6bc769c
--- /dev/null
+++ b/meta-arm/meta-gem5/dynamic-layers/meta-virtualization/recipes-kernel/linux/virtualization-kmeta-extra-gem5/features/disable-arm64-sve.scc
@@ -0,0 +1,3 @@
+define KFEATURE_DESCRIPTION "Disable SVE support"
+
+kconf non-hardware disable-arm64-sve.cfg
diff --git a/meta-arm/meta-gem5/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_%.bbappend b/meta-arm/meta-gem5/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_%.bbappend
new file mode 100644
index 0000000..3dd2cba
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_%.bbappend
@@ -0,0 +1,16 @@
+# Gem5 aarch64 support
+COMPATIBLE_MACHINE:gem5-arm64 = "gem5-arm64"
+
+PROVIDES:gem5-arm64 += "virtual/gem5-bootloader"
+
+# For gem5 we use the dtb generated by gem5 directly
+DEPENDS:append:gem5-arm64 = " gem5-aarch64-dtb"
+BOOT_WRAPPER_AARCH64_DEVICETREE:gem5-arm64 = "gem5-aarch64.dtb"
+
+# The dtb must be generated for us to generate the axf
+DEPLOY_DEPEND_LIST ?= ""
+DEPLOY_DEPEND_LIST:gem5-arm64 = " gem5-aarch64-dtb:do_deploy"
+do_deploy[depends] += "${DEPLOY_DEPEND_LIST}"
+
+# The base recipe has been upgraded, so hold back at known working revision
+SRCREV = "8d5a765251d9113c3c0f9fa14de42a9e7486fe8a"
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/files/mapping.patch b/meta-arm/meta-gem5/recipes-devtools/gem5/files/mapping.patch
new file mode 100644
index 0000000..3a7cb43
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/files/mapping.patch
@@ -0,0 +1,37 @@
+Upstream-Status: Backport
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+
+From 89958f7f30ec722e30e1bcffdeab547c874fa475 Mon Sep 17 00:00:00 2001
+From: Adrian Herrera <adrian.herrera@arm.com>
+Date: Mon, 15 Mar 2021 13:14:44 +0000
+Subject: [PATCH] python: debug, fix Mapping import
+
+Change "collections.Mapping" to "collections.abc.Mapping".
+"collections.Mapping" was an alias, it is deprecated starting from Python 3.3, and it will be removed in Python 3.10.
+
+Change-Id: Ic257e3c5206eb3d48d4eed85a93fac48bd3b8dc4
+Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
+Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43023
+Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
+Maintainer: Jason Lowe-Power <power.jg@gmail.com>
+Tested-by: kokoro <noreply+kokoro@google.com>
+---
+ src/python/m5/debug.py | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
+index d808850cc..787a39ece 100644
+--- a/src/python/m5/debug.py
++++ b/src/python/m5/debug.py
+@@ -26,7 +26,7 @@
+
+ from __future__ import print_function
+
+-from collections import Mapping
++from collections.abc import Mapping
+
+ import _m5.debug
+ from _m5.debug import SimpleFlag, CompoundFlag
+-- 
+2.25.1
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/files/start-gem5.sh b/meta-arm/meta-gem5/recipes-devtools/gem5/files/start-gem5.sh
new file mode 100644
index 0000000..6335411
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/files/start-gem5.sh
@@ -0,0 +1,39 @@
+#!/bin/bash
+
+# Get parameters from bitbake configuration
+
+source <(bitbake -e gem5-aarch64-native | grep \
+    -e "^STAGING_.*_NATIVE=" \
+    -e "^DEPLOY_DIR.*=" \
+    -e "^GEM5_RUN.*=")
+
+export M5_PATH="${DEPLOY_DIR_IMAGE}"
+
+args=""
+
+if [ -n "${GEM5_RUN_KERNEL}" ]; then
+    kernfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_KERNEL})
+    args="$args --kernel=$kernfile"
+fi
+
+if [ -n "${GEM5_RUN_DISK}" ]; then
+    diskfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_DISK})
+    args="$args --disk-image=$diskfile"
+fi
+
+if [ -n "${GEM5_RUN_DTB}" ]; then
+    dtbfile=$(readlink -f ${DEPLOY_DIR_IMAGE}/${GEM5_RUN_DTB})
+    args="$args --dtb=$dtbfile"
+fi
+
+if [ -n "${GEM5_RUN_CMDLINE}" ]; then
+    args="$args --command-line='${GEM5_RUN_CMDLINE}'"
+fi
+
+if [ -n "${GEM5_RUN_EXTRA}" ]; then
+    args="$args ${GEM5_RUN_EXTRA}"
+fi
+
+oe-run-native gem5-aarch64-native ${GEM5_RUN_CONFIG} \
+    ${STAGING_DATADIR_NATIVE}/gem5/${GEM5_RUN_PROFILE} ${args} "$@"
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader.inc b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader.inc
new file mode 100644
index 0000000..c4fd3a1
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader.inc
@@ -0,0 +1,30 @@
+# Build instructions for gem5 custom bootloader
+
+SUMMARY = "Gem5 AARCH64 boot loader"
+LICENSE = "BSD-3-Clause"
+
+inherit deploy
+
+PROVIDES += "virtual/gem5-bootloader"
+
+COMPATIBLE_MACHINE = "gem5-arm64"
+
+BOOTLOADER_SRC_PATH ?= "${S}/system/arm/bootloader/arm64"
+
+# no configure step
+do_configure[noexec] = "1"
+
+# no install
+do_install[noexec] = "1"
+
+do_compile() {
+    oe_runmake -C ${BOOTLOADER_SRC_PATH} all CROSS_COMPILE=${TARGET_PREFIX}
+}
+
+do_deploy() {
+    oe_runmake -C ${BOOTLOADER_SRC_PATH} install \
+        CROSS_COMPILE=${TARGET_PREFIX} DESTDIR=${DEPLOYDIR}/binaries
+}
+
+addtask deploy before do_build after do_compile
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader_20.bb b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader_20.bb
new file mode 100644
index 0000000..67570f6
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-bootloader_20.bb
@@ -0,0 +1,7 @@
+# gem5 custom bootloader
+
+require gem5-source_20.inc
+
+BPN = "gem5-aarch64-bootloader"
+
+require gem5-aarch64-bootloader.inc
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-dtb.bb b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-dtb.bb
new file mode 100644
index 0000000..50ac030
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-dtb.bb
@@ -0,0 +1,30 @@
+# Use gem5 executable to produce a dtb
+
+LICENSE = "MIT"
+
+inherit deploy
+
+DEPENDS = "gem5-aarch64-native"
+
+do_configure[noexec] = "1"
+
+do_compile() {
+    # generate a dtb using gem5
+    gem5.opt \
+        ${STAGING_DATADIR_NATIVE}/gem5/${GEM5_RUN_PROFILE} \
+        --dtb-gen
+
+    if [ ! -f m5out/system.dtb ]; then
+        echo "No dtb generated !!!"
+        exit 1
+    fi
+}
+
+do_install[noexec] = "1"
+
+do_deploy() {
+    install --d ${DEPLOYDIR}
+    cp m5out/system.dtb ${DEPLOYDIR}/gem5-aarch64.dtb
+}
+addtask deploy before do_build after do_compile
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native.inc b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native.inc
new file mode 100644
index 0000000..2fd5206
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native.inc
@@ -0,0 +1,40 @@
+# gem5 aarch64 specific configuration
+
+# Build arm64 gem5
+GEM5_BUILD_CONFIGS ?= "build/ARM/gem5.${GEM5_BUILD_VARIANT}"
+
+SRC_URI += "file://start-gem5.sh"
+
+inherit deploy
+
+# Parameters for the start script
+
+GEM5_RUN_CONFIG ?= "gem5.${GEM5_BUILD_VARIANT}"
+
+# Linux kernel file to boot
+GEM5_RUN_KERNEL ?= "vmlinux"
+
+# Disk Image to use
+GEM5_RUN_DISK ?= "*-${MACHINE}.ext4"
+
+# DTB to use
+GEM5_RUN_DTB ?= "${@os.path.basename(d.getVar('KERNEL_DEVICETREE'))}"
+
+# Linux command line to pass
+GEM5_RUN_CMDLINE ?= "earlyprintk=pl011,0x1c090000 console=ttyAMA0 rw mem=512MB root=/dev/sda rootwait"
+
+# Extra arguments to pass to gem5
+GEM5_RUN_EXTRA ?= "--mem-size=512MB -n 4 --machine-type=VExpress_GEM5_V2"
+
+#This is required so that our binaries are in the sysroot. We need this
+# to have both gem5 required libraries and gem5 in the same sysroot.
+addtask addto_recipe_sysroot after do_populate_sysroot before do_build
+
+do_deploy[sstate-outputdirs] = "${DEPLOY_DIR_TOOLS}"
+do_deploy() {
+    install -d ${DEPLOYDIR}
+
+    install -m 755 ${WORKDIR}/start-gem5.sh ${DEPLOYDIR}/.
+}
+addtask deploy before do_build after do_compile
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native/0001-dev-arm-SMMUv3-enable-interrupt-interface.patch b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native/0001-dev-arm-SMMUv3-enable-interrupt-interface.patch
new file mode 100644
index 0000000..6d00cc2
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native/0001-dev-arm-SMMUv3-enable-interrupt-interface.patch
@@ -0,0 +1,97 @@
+From be710c5657b03bc9a9ce18ecf7ce1956265bae47 Mon Sep 17 00:00:00 2001
+From: Adrian Herrera <adrian.herrera@arm.com>
+Date: Thu, 10 Dec 2020 18:07:21 +0000
+Subject: [PATCH] dev-arm: SMMUv3, enable interrupt interface
+
+Users can set "irq_interface_enable" to allow software to program
+SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+
+in a reasonable time. Notice the model does not implement architectural
+interrupt sources, so no assertions will happen.
+
+Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9
+Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
+Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38555
+Tested-by: kokoro <noreply+kokoro@google.com>
+Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
+Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
+
+Upstream-Status: Accepted [https://gem5-review.googlesource.com/c/public/gem5/+/38555]
+Expected version: v20.2
+---
+ src/dev/arm/SMMUv3.py  |  5 +++++
+ src/dev/arm/smmu_v3.cc | 10 +++++++++-
+ src/dev/arm/smmu_v3.hh |  4 +++-
+ 3 files changed, 17 insertions(+), 2 deletions(-)
+
+diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
+index 29c15682bf..f57be896f9 100644
+--- a/src/dev/arm/SMMUv3.py
++++ b/src/dev/arm/SMMUv3.py
+@@ -91,6 +91,11 @@ class SMMUv3(ClockedObject):
+     reg_map = Param.AddrRange('Address range for control registers')
+     system = Param.System(Parent.any, "System this device is part of")
+ 
++    irq_interface_enable = Param.Bool(False,
++            "This flag enables software to program SMMU_IRQ_CTRL and "
++            "SMMU_IRQ_CTRLACK as if the model implemented architectural "
++            "interrupt sources")
++
+     device_interfaces = VectorParam.SMMUv3DeviceInterface([],
+                                         "Responder interfaces")
+ 
+diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc
+index f9bdc277c6..d73f270170 100644
+--- a/src/dev/arm/smmu_v3.cc
++++ b/src/dev/arm/smmu_v3.cc
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2013, 2018-2019 ARM Limited
++ * Copyright (c) 2013, 2018-2020 ARM Limited
+  * All rights reserved
+  *
+  * The license below extends only to copyright in the software and shall
+@@ -58,6 +58,7 @@ SMMUv3::SMMUv3(SMMUv3Params *params) :
+     requestPort(name() + ".request", *this),
+     tableWalkPort(name() + ".walker", *this),
+     controlPort(name() + ".control", *this, params->reg_map),
++    irqInterfaceEnable(params->irq_interface_enable),
+     tlb(params->tlb_entries, params->tlb_assoc, params->tlb_policy),
+     configCache(params->cfg_entries, params->cfg_assoc, params->cfg_policy),
+     ipaCache(params->ipa_entries, params->ipa_assoc, params->ipa_policy),
+@@ -626,6 +627,13 @@ SMMUv3::writeControl(PacketPtr pkt)
+             assert(pkt->getSize() == sizeof(uint32_t));
+             regs.cr0 = regs.cr0ack = pkt->getLE<uint32_t>();
+             break;
++        case offsetof(SMMURegs, irq_ctrl):
++            assert(pkt->getSize() == sizeof(uint32_t));
++            if (irqInterfaceEnable) {
++                warn("SMMUv3::%s No support for interrupt sources", __func__);
++                regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE<uint32_t>();
++            }
++            break;
+ 
+         case offsetof(SMMURegs, cr1):
+         case offsetof(SMMURegs, cr2):
+diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh
+index 6b3f3982b8..a001d71178 100644
+--- a/src/dev/arm/smmu_v3.hh
++++ b/src/dev/arm/smmu_v3.hh
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2013, 2018-2019 ARM Limited
++ * Copyright (c) 2013, 2018-2020 ARM Limited
+  * All rights reserved
+  *
+  * The license below extends only to copyright in the software and shall
+@@ -94,6 +94,8 @@ class SMMUv3 : public ClockedObject
+     SMMUTableWalkPort tableWalkPort;
+     SMMUControlPort   controlPort;
+ 
++    const bool irqInterfaceEnable;
++
+     ARMArchTLB  tlb;
+     ConfigCache configCache;
+     IPACache    ipaCache;
+-- 
+2.17.1
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native_20.bb b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native_20.bb
new file mode 100644
index 0000000..057aad8
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-aarch64-native_20.bb
@@ -0,0 +1,22 @@
+require gem5-source_20.inc
+
+SRC_URI += "file://0001-dev-arm-SMMUv3-enable-interrupt-interface.patch"
+
+BPN = "gem5-aarch64-native"
+
+require gem5-aarch64-native.inc
+require gem5-native.inc
+
+# Get rid of compiler errors when building protobuf
+GEM5_SCONS_ARGS:append = " CCFLAGS_EXTRA='-Wno-error=unused-variable' --verbose"
+
+# Get rid of linker errors and have a faster link process
+GEM5_SCONS_ARGS:append = " LDFLAGS_EXTRA='${BUILD_LDFLAGS}' \
+MARSHAL_LDFLAGS_EXTRA='${BUILD_LDFLAGS}' --force-lto "
+
+do_compile:prepend() {
+    # Gem5 expect to have python in the path (can be python2 or 3)
+    # Create a link named python to python3
+    real=$(which ${PYTHON})
+    ln -snf $real $(dirname $real)/python
+}
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops/0001-util-m5ops-optional-extra-build-flags.patch b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops/0001-util-m5ops-optional-extra-build-flags.patch
new file mode 100644
index 0000000..b446a2f
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops/0001-util-m5ops-optional-extra-build-flags.patch
@@ -0,0 +1,59 @@
+From 32e35a2f179d1b036d2eb699d77f869f7787f36b Mon Sep 17 00:00:00 2001
+From: Adrian Herrera <adrian.herrera@arm.com>
+Date: Tue, 8 Dec 2020 20:12:55 +0000
+Subject: [PATCH] util: m5ops, optional extra build flags
+
+This increases compilation control for users. Main use case is building
+m5ops as part of an image distribution. Specifying a different sysroot
+or dynamic linker may be required when the cross toolchain is built as
+part of the process.
+
+Change-Id: Icbd3faa92ea6e084fc4a9b2db83129bce73faf21
+Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
+Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38416
+Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
+Reviewed-by: Gabe Black <gabe.black@gmail.com>
+Maintainer: Jason Lowe-Power <power.jg@gmail.com>
+Tested-by: kokoro <noreply+kokoro@google.com>
+
+Upstream-Status: Accepted [https://gem5-review.googlesource.com/c/public/gem5/+/38416]
+Expected version: v20.2
+---
+ util/m5/SConstruct | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/util/m5/SConstruct b/util/m5/SConstruct
+index bbae8d9bbf..a37573d763 100644
+--- a/util/m5/SConstruct
++++ b/util/m5/SConstruct
+@@ -136,16 +136,24 @@ for root, dirs, files in os.walk(abspath(src_dir)):
+         #
+         # This also considers scons command line settings which may look like
+         # environment variables, but are set after "scons" on the command line.
+-        def get_abi_opt(name, default):
++        def _extract_abi_opt_val(name, default):
+             var_name = env.subst('${ABI}.%s' % name)
+-            env[name] = os.environ.get(
+-                    var_name, ARGUMENTS.get(var_name, default))
++            return os.environ.get(var_name, ARGUMENTS.get(var_name, default))
++        def get_abi_opt(name, default):
++            env[name] = _extract_abi_opt_val(name, default)
++        def append_abi_opt(name):
++            env.Append(**{ name: _extract_abi_opt_val(name, '') })
+ 
+         # Process the ABI's settings in the SConsopts file, storing them
+         # in a copy of the primary environment.
+         env.SConscript(Dir(root).File('SConsopts'),
+                        exports=[ 'env', 'get_abi_opt' ])
+ 
++        # The user can pass extra build flags for each ABI
++        append_abi_opt('CCFLAGS')
++        append_abi_opt('CXXFLAGS')
++        append_abi_opt('LINKFLAGS')
++
+         # Once all the options have been configured, set up build targets for
+         # this abi.
+         abi_dir = build_dir.Dir(env.subst('${ABI}'))
+-- 
+2.17.1
+
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops_20.bb b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops_20.bb
new file mode 100644
index 0000000..8ff4826
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5ops_20.bb
@@ -0,0 +1,26 @@
+require gem5-source_20.inc
+inherit scons package
+
+HOMEPAGE = "https://www.gem5.org/documentation/general_docs/m5ops"
+SUMMARY = "m5ops provide pseudo-instructions to trigger gem5 functionality"
+LICENSE = "BSD-3-Clause"
+
+M5OPS_DIR = "util/m5"
+
+SRC_URI += "file://0001-util-m5ops-optional-extra-build-flags.patch"
+
+OUT_DIR = "build/${TARGET_ARCH}/out"
+
+EXTRA_OESCONS += "${TARGET_ARCH}.CROSS_COMPILE=${TARGET_PREFIX} \
+                  ${TARGET_ARCH}.CCFLAGS=--sysroot=${STAGING_DIR_TARGET} \
+                  ${TARGET_ARCH}.LINKFLAGS=--sysroot=${STAGING_DIR_TARGET} \
+                  -C ${S}/${M5OPS_DIR} ${OUT_DIR}/m5"
+
+# The SConstruct file for m5ops does not provide a "install" target
+# We do the install process within the recipe
+do_install() {
+    install -d ${D}${bindir} ${D}${libdir} ${D}${includedir}
+    install -m 755 ${B}/${M5OPS_DIR}/${OUT_DIR}/m5 ${D}${bindir}
+    install -m 644 ${B}/${M5OPS_DIR}/${OUT_DIR}/libm5.a ${D}${libdir}
+    install -m 644 ${B}/include/gem5/m5ops.h ${D}${includedir}
+}
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term-native_20.bb b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term-native_20.bb
new file mode 100644
index 0000000..b91dbbc
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term-native_20.bb
@@ -0,0 +1,24 @@
+require gem5-source_20.inc
+
+SUMMARY = "m5term allows users to connect to gem5's simulated console"
+HOMEPAGE = "https://www.gem5.org/documentation/general_docs/fullsystem/m5term"
+LICENSE = "BSD-3-Clause"
+
+inherit native
+
+M5TERM_DIR = "util/term"
+
+SRC_URI += "file://0001-add-makefile-flags.patch"
+
+do_compile() {
+    oe_runmake -C ${S}/${M5TERM_DIR}
+}
+
+# The Makefile for m5term does not provide a "install" target
+# We do the install process within the recipe
+do_install() {
+    install -d ${D}${bindir}
+    install -m 755 ${B}/${M5TERM_DIR}/m5term ${D}${bindir}
+}
+
+addtask addto_recipe_sysroot before do_build
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term/0001-add-makefile-flags.patch b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term/0001-add-makefile-flags.patch
new file mode 100644
index 0000000..d13ef4c
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-m5term/0001-add-makefile-flags.patch
@@ -0,0 +1,34 @@
+From 688f7103e08318edbd48cf830c0ab3a048761bbb Mon Sep 17 00:00:00 2001
+From: Adrian Herrera <adrian.herrera@arm.com>
+Date: Thu, 03 Dec 2020 16:45:59 +0000
+Subject: [PATCH] util: m5term, fix LDFLAGS, standard make variables
+
+Enables build systems to provide necessary flags to build m5term.
+Useful specially if a different linker is intended to be used.
+
+Change-Id: If7f867cc0965d6ad4627b5421e00a99cc3d64989
+Signed-off-by: Adrian Herrera <adrian.herrera@arm.com>
+
+Upstream-Status: Accepted [https://gem5-review.googlesource.com/c/public/gem5/+/38256]
+Expected version: v20.2
+---
+
+diff --git a/util/term/Makefile b/util/term/Makefile
+index 658b961..4aa1c52 100644
+--- a/util/term/Makefile
++++ b/util/term/Makefile
+@@ -24,12 +24,12 @@
+ # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ 
+-CCFLAGS= -g -O0
++CFLAGS ?= -g -O0
+ 
+ default: m5term
+ 
+ m5term: term.c
+-	$(CC) $(LFLAGS) -o $@ $^
++	$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LDLIBS)
+ 
+ install: m5term
+ 	$(SUDO) install -o root -m 555 m5term /usr/local/bin
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-native.inc b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-native.inc
new file mode 100644
index 0000000..91a554b
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-native.inc
@@ -0,0 +1,52 @@
+# gem5 platform independent build information
+
+SUMMARY = "A modular platform for computer-system architecture research"
+HOMEPAGE = "http://gem5.org"
+LICENSE = "BSD-3-Clause & MIT & LGPL-2.1-only"
+
+# Gem5 build and run parameter
+
+# See http://www.gem5.org/documentation/general_docs/building for the list of variants
+GEM5_BUILD_VARIANT ?= "opt"
+
+# What gem5 binary are we building
+GEM5_BUILD_CONFIGS ?= "build/X86/gem5.{GEM5_BUILD_VARIANT}"
+
+# Scons build arguments
+GEM5_SCONS_ARGS ?= "CC=${BUILD_CC} CXX=${BUILD_CXX} \
+    AS=${BUILD_AS} AR=${BUILD_AR} ${GEM5_BUILD_CONFIGS} \
+    PYTHON_CONFIG=python3-config"
+
+# Default profile to run
+GEM5_RUN_PROFILE ?= "configs/example/fs.py"
+
+# We are building a native package and we need to use scons
+inherit scons native
+
+# the build is using several tools:
+# python3: scons and six
+# google protobuf
+# pkgconfig
+# hdf5
+DEPENDS += "m4-native python3-six-native protobuf-native hdf5-native pkgconfig-native \
+    boost-native libpng-native"
+
+EXTRA_OESCONS = "${GEM5_SCONS_ARGS}"
+
+do_install() {
+
+    install -d ${D}${datadir}/gem5
+    cp -a --no-preserve=ownership -rf configs ${D}${datadir}/gem5/.
+
+    for f in ${GEM5_BUILD_CONFIGS}; do
+        destname=$(basename $f)
+        install -d ${D}${bindir}
+        install -m 755 $f ${D}${bindir}/$destname
+    done
+}
+
+FILES:${PN} = "${datadir}/gem5/* ${bindir}/*"
+INSANE_SKIP:${PN} += "already-stripped"
+RDEPENDS:${PN} += "python3-native hdf5-native protobuf-native libpng-native"
+
+addtask addto_recipe_sysroot before do_build
diff --git a/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-source_20.inc b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-source_20.inc
new file mode 100644
index 0000000..bf448fe
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-devtools/gem5/gem5-source_20.inc
@@ -0,0 +1,11 @@
+LIC_FILES_CHKSUM = "file://COPYING;md5=2d9514d69d8abf88b6e9125e759bf0ab \
+                    file://LICENSE;md5=a585e2893cee63d16a1d8bc16c6297ec"
+
+SRC_URI = "git://gem5.googlesource.com/public/gem5;protocol=https;nobranch=1 \
+           file://mapping.patch"
+RELEASE_TAG = "v20.1.0.5"
+SRCREV = "31cd81fdec46bae4b48d4f3788776936389dbdec"
+
+PV = "${RELEASE_TAG}"
+
+S = "${WORKDIR}/git"
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts
new file mode 100644
index 0000000..0e59fdf
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_1cpu.dts
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2015-2016 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+/include/ "vexpress_gem5_v2.dtsi"
+
+/ {
+	model = "V2P-AARCH64";
+	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0x4 0x00000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+        cpu@0 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 0 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+	};
+
+	virt-encoder {
+		compatible = "drm,virtual-encoder";
+		port {
+			dp0_virt_input: endpoint@0 {
+				remote-endpoint = <&dp0_output>;
+			};
+		};
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing_1080p60 {
+				/* 1920x1080-60 */
+				clock-frequency = <148500000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hfront-porch = <148>;
+				hback-porch = <88>;
+				hsync-len = <44>;
+				vfront-porch = <36>;
+				vback-porch = <4>;
+				vsync-len = <5>;
+			};
+		};
+	};
+};
+
+&dp0 {
+	status = "ok";
+
+	port {
+		dp0_output: endpoint@0 {
+			remote-endpoint = <&dp0_virt_input>;
+		};
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts
new file mode 100644
index 0000000..441d3df
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_2cpu.dts
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2015-2016 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+/include/ "vexpress_gem5_v2.dtsi"
+
+/ {
+	model = "V2P-AARCH64";
+	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0x4 0x00000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+        cpu@0 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 0 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@1 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 1 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+	};
+
+	virt-encoder {
+		compatible = "drm,virtual-encoder";
+		port {
+			dp0_virt_input: endpoint@0 {
+				remote-endpoint = <&dp0_output>;
+			};
+		};
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing_1080p60 {
+				/* 1920x1080-60 */
+				clock-frequency = <148500000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hfront-porch = <148>;
+				hback-porch = <88>;
+				hsync-len = <44>;
+				vfront-porch = <36>;
+				vback-porch = <4>;
+				vsync-len = <5>;
+			};
+		};
+	};
+};
+
+&dp0 {
+	status = "ok";
+
+	port {
+		dp0_output: endpoint@0 {
+			remote-endpoint = <&dp0_virt_input>;
+		};
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts
new file mode 100644
index 0000000..2d0311a
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_4cpu.dts
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2015-2016 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+/include/ "vexpress_gem5_v2.dtsi"
+
+/ {
+	model = "V2P-AARCH64";
+	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0x4 0x00000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+        cpu@0 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 0 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@1 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 1 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@2 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 2 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@3 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 3 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+	};
+
+	virt-encoder {
+		compatible = "drm,virtual-encoder";
+		port {
+			dp0_virt_input: endpoint@0 {
+				remote-endpoint = <&dp0_output>;
+			};
+		};
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing_1080p60 {
+				/* 1920x1080-60 */
+				clock-frequency = <148500000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hfront-porch = <148>;
+				hback-porch = <88>;
+				hsync-len = <44>;
+				vfront-porch = <36>;
+				vback-porch = <4>;
+				vsync-len = <5>;
+			};
+		};
+	};
+};
+
+&dp0 {
+	status = "ok";
+
+	port {
+		dp0_output: endpoint@0 {
+			remote-endpoint = <&dp0_virt_input>;
+		};
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts
new file mode 100644
index 0000000..ba94d07
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/armv8_gem5_v2_8cpu.dts
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2015-2016 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+/include/ "vexpress_gem5_v2.dtsi"
+
+/ {
+	model = "V2P-AARCH64";
+	compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0x4 0x00000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+        cpu@0 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 0 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@1 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 1 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@2 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 2 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@3 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 3 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@4 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 4 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@5 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 5 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@6 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 6 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+        cpu@7 {
+            device_type = "cpu";
+            compatible = "gem5,armv8", "arm,armv8";
+            reg = < 7 >;
+            enable-method = "spin-table";
+            cpu-release-addr = <0 0x8000fff8>;
+        };
+
+	};
+
+	virt-encoder {
+		compatible = "drm,virtual-encoder";
+		port {
+			dp0_virt_input: endpoint@0 {
+				remote-endpoint = <&dp0_output>;
+			};
+		};
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing_1080p60 {
+				/* 1920x1080-60 */
+				clock-frequency = <148500000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hfront-porch = <148>;
+				hback-porch = <88>;
+				hsync-len = <44>;
+				vfront-porch = <36>;
+				vback-porch = <4>;
+				vsync-len = <5>;
+			};
+		};
+	};
+};
+
+&dp0 {
+	status = "ok";
+
+	port {
+		dp0_output: endpoint@0 {
+			remote-endpoint = <&dp0_virt_input>;
+		};
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi
new file mode 100644
index 0000000..e53e6e8
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2.dtsi
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2015-2018 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/include/ "vexpress_gem5_v2_base.dtsi"
+
+/ {
+	/* The display processor needs custom configuration to setup its
+	 * output ports. Disable it by default in the platform until the
+	 * DT bindings have stabilize.
+	 */
+	dp0: hdlcd@2b000000 {
+		compatible = "arm,hdlcd";
+		reg = <0x0 0x2b000000 0x0 0x1000>;
+		interrupts = <0 63 4>;
+		clocks = <&osc_pxl>;
+		clock-names = "pxlclk";
+		status = "disabled";
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi
new file mode 100644
index 0000000..eba0db2
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/files/dts/gem5-arm64/vexpress_gem5_v2_base.dtsi
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2015-2017, 2019 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/ {
+	arm,hbi = <0x0>;
+	arm,vexpress,site = <0xf>;
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	gic: interrupt-controller@2c000000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <0x3>;
+		#address-cells = <0x2>;
+		ranges;
+		interrupt-controller;
+		redistributor-stride = <0x0 0x40000>; // 256kB stride
+		reg = <0x0 0x2c000000 0x0 0x10000
+		       0x0 0x2c010000 0x0 0x2000000 // room for 128 redistributors using 128K each (256K strided...)
+		       0x0 0x0 0x0 0x0>;
+		interrupts = <1 9 0xf04>;
+		#size-cells = <0x2>;
+		linux,phandle = <0x1>;
+		phandle = <0x1>;
+
+		gic-its@2e010000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			#msi-cells = <1>;
+			reg = <0x0 0x2e010000 0 0x20000>;
+		};
+	};
+
+	timer {
+		compatible = "arm,cortex-a15-timer",
+			     "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+		             <1 14 0xf08>,
+			     <1 11 0xf08>,
+		             <1 10 0xf08>;
+		clocks = <&osc_sys>;
+		clock-names="apb_pclk";
+	};
+
+	pci {
+		compatible = "pci-host-ecam-generic";
+		device_type = "pci";
+		#address-cells = <0x3>;
+		#size-cells = <0x2>;
+		#interrupt-cells = <0x1>;
+
+		reg = <0x0 0x30000000 0x0 0x10000000>;
+
+		ranges = <0x01000000 0x0 0x00000000  0x0 0x2f000000  0x0 0x00010000>,
+		         <0x02000000 0x0 0x40000000  0x0 0x40000000  0x0 0x40000000>;
+
+	/*
+	  child unit address, #cells = #address-cells
+	  child interrupt specifier, #cells = #interrupt-cells (INTA = 1, INTB = 2, INTC = 3 and INTD = 4)
+	  interrupt-parent, phandle
+	  parent unit address, #cells = #address-cells@gic
+	  parent interrupt specifier, #cells = #interrupt-cells@gic
+	*/
+	interrupt-map = <0x0    0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x44 0x1
+		         0x800  0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x45 0x1
+		         0x1000 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x46 0x1
+		         0x1800 0x0 0x0  0x1  &gic  0x0 0x0  0x0 0x47 0x1>;
+
+	interrupt-map-mask = <0x001800 0x0 0x0 0x0>;
+	dma-coherent;
+	};
+
+	kmi@1c060000 {
+		compatible = "arm,pl050", "arm,primecell";
+		reg = <0x0 0x1c060000 0x0 0x1000>;
+		interrupts = <0 12 4>;
+		clocks = <&v2m_clk24mhz>, <&osc_smb>;
+		clock-names = "KMIREFCLK", "apb_pclk";
+	};
+
+	kmi@1c070000 {
+		compatible = "arm,pl050", "arm,primecell";
+		reg = <0x0 0x1c070000 0x0 0x1000>;
+		interrupts = <0 13 4>;
+		clocks = <&v2m_clk24mhz>, <&osc_smb>;
+		clock-names = "KMIREFCLK", "apb_pclk";
+	};
+
+	uart0: uart@1c090000 {
+		compatible = "arm,pl011", "arm,primecell";
+		reg = <0x0 0x1c090000 0x0 0x1000>;
+		interrupts = <0 5 4>;
+		clocks = <&osc_peripheral>, <&osc_smb>;
+		clock-names = "uartclk", "apb_pclk";
+	};
+
+	rtc@1c170000 {
+		compatible = "arm,pl031", "arm,primecell";
+		reg = <0x0 0x1c170000 0x0 0x1000>;
+		interrupts = <0 4 4>;
+		clocks = <&osc_smb>;
+		clock-names = "apb_pclk";
+	};
+
+	v2m_clk24mhz: clk24mhz {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "v2m:clk24mhz";
+	};
+
+
+	v2m_sysreg: sysreg@1c010000 {
+		compatible = "arm,vexpress-sysreg";
+		reg = <0 0x1c010000 0x0 0x1000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	vio@1c130000 {
+		compatible = "virtio,mmio";
+		reg = <0 0x1c130000 0x0 0x1000>;
+		interrupts = <0 42 4>;
+	};
+
+	vio@1c140000 {
+		compatible = "virtio,mmio";
+		reg = <0 0x1c140000 0x0 0x1000>;
+		interrupts = <0 43 4>;
+	};
+
+	dcc {
+		compatible = "arm,vexpress,config-bus";
+		arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+		osc_pxl: osc@5 {
+			compatible = "arm,vexpress-osc";
+			arm,vexpress-sysreg,func = <1 5>;
+			freq-range = <23750000 1000000000>;
+			#clock-cells = <0>;
+			clock-output-names = "oscclk5";
+		};
+
+		osc_smb: osc@6 {
+			compatible = "arm,vexpress-osc";
+			arm,vexpress-sysreg,func = <1 6>;
+			freq-range = <20000000 50000000>;
+			#clock-cells = <0>;
+			clock-output-names = "oscclk6";
+		};
+
+		osc_sys: osc@7 {
+			compatible = "arm,vexpress-osc";
+			arm,vexpress-sysreg,func = <1 7>;
+			freq-range = <20000000 60000000>;
+			#clock-cells = <0>;
+			clock-output-names = "oscclk7";
+		};
+	};
+
+
+	mcc {
+		compatible = "arm,vexpress,config-bus";
+		arm,vexpress,config-bridge = <&v2m_sysreg>;
+		arm,vexpress,site = <0>;
+
+		osc_peripheral: osc@2 {
+			compatible = "arm,vexpress-osc";
+			arm,vexpress-sysreg,func = <1 2>;
+			freq-range = <24000000 24000000>;
+			#clock-cells = <0>;
+			clock-output-names = "v2m:oscclk2";
+		};
+	};
+};
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64-standard.scc b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64-standard.scc
new file mode 100644
index 0000000..0fb69e4
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64-standard.scc
@@ -0,0 +1,11 @@
+define KMACHINE gem5-arm64
+define KTYPE standard
+define KARCH arm64
+
+include ktypes/standard/standard.scc
+
+include gem5-arm64.scc
+
+# default policy for standard kernels
+#include features/latencytop/latencytop.scc
+#include features/profiling/profiling.scc
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64.scc b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64.scc
new file mode 100644
index 0000000..a24a3af
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64.scc
@@ -0,0 +1,14 @@
+include features/input/input.scc
+include features/net/net.scc
+include cfg/timer/no_hz.scc
+
+kconf hardware gem5-arm64/gem5-arm64-board.cfg
+kconf hardware gem5-arm64/gem5-arm64-drm.cfg
+kconf hardware gem5-arm64/gem5-arm64-net.cfg
+kconf hardware gem5-arm64/gem5-arm64-rtc.cfg
+kconf hardware gem5-arm64/gem5-arm64-serial.cfg
+kconf hardware gem5-arm64/gem5-arm64-virtio.cfg
+kconf hardware gem5-arm64/gem5-arm64-cfi.cfg
+kconf hardware gem5-arm64/gem5-arm64-virtio.cfg
+kconf hardware gem5-arm64/gem5-arm64-pci.cfg
+kconf hardware gem5-arm64/gem5-arm64-pata.cfg
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-board.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-board.cfg
new file mode 100644
index 0000000..56bb9e6
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-board.cfg
@@ -0,0 +1,23 @@
+CONFIG_ARM64=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=256
+CONFIG_HOTPLUG_CPU=y
+
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+
+CONFIG_VEXPRESS_CONFIG=y
+
+# Keyboard over AMBA
+CONFIG_SERIO=y
+CONFIG_SERIO_AMBAKMI=y
+
+CONFIG_MFD_VEXPRESS_SYSREG=y
+
+# Turn off RAID to speed up boot
+CONFIG_MD=n
+CONFIG_BTRFS_FS=n
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-cfi.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-cfi.cfg
new file mode 100644
index 0000000..f28e0d9
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-cfi.cfg
@@ -0,0 +1,3 @@
+# CFI Flash
+CONFIG_MTD=y
+CONFIG_MTD_CFI=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-drm.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-drm.cfg
new file mode 100644
index 0000000..34b0141
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-drm.cfg
@@ -0,0 +1,4 @@
+CONFIG_DRM=y
+CONFIG_DRM_HDLCD=y
+CONFIG_FB=y
+CONFIG_FB_ARMCLCD=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-net.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-net.cfg
new file mode 100644
index 0000000..54e3686
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-net.cfg
@@ -0,0 +1,2 @@
+CONFIG_SMSC911X=y
+CONFIG_SMC91X=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pata.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pata.cfg
new file mode 100644
index 0000000..6272288
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pata.cfg
@@ -0,0 +1,12 @@
+CONFIG_ATA=y
+CONFIG_ATA_GENERIC=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_ATA_PIIX=y
+CONFIG_PATA_OLDPIIX=y
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pci.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pci.cfg
new file mode 100644
index 0000000..c8ae9d4
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-pci.cfg
@@ -0,0 +1,2 @@
+CONFIG_PCI=y
+CONFIG_PCI_HOST_GENERIC=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-rtc.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-rtc.cfg
new file mode 100644
index 0000000..5d377b3
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-rtc.cfg
@@ -0,0 +1,2 @@
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_PL031=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-serial.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-serial.cfg
new file mode 100644
index 0000000..f58e3c2
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-serial.cfg
@@ -0,0 +1,3 @@
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-virtio.cfg b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-virtio.cfg
new file mode 100644
index 0000000..b4a53da
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/gem5-kmeta/bsp/gem5-platforms/gem5-arm64/gem5-arm64-virtio.cfg
@@ -0,0 +1,9 @@
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_BLOCK=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_BLK_MQ_VIRTIO=y
+CONFIG_SCSI_VIRTIO=y
+CONFIG_VIRTIO_BLK_SCSI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_PCI_LEGACY=y
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_%.bbappend b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_%.bbappend
new file mode 100644
index 0000000..b36ea06
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_%.bbappend
@@ -0,0 +1,11 @@
+FILESEXTRAPATHS:prepend:gem5-arm64 := "${THISDIR}:${THISDIR}/files:"
+
+COMPATIBLE_MACHINE:gem5-arm64 = "gem5-arm64"
+KMACHINE:gem5-arm64 = "gem5-arm64"
+SRC_URI:append:gem5-arm64 = " file://gem5-kmeta;type=kmeta;name=gem5-kmeta;destsuffix=gem5-kmeta \
+                              file://dts/gem5-arm64;subdir=add-files"
+
+do_patch:append:gem5-arm64() {
+    tar -C ${WORKDIR}/add-files/dts -cf - gem5-arm64 | \
+        tar -C arch/arm64/boot/dts -xf -
+}
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bb b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bb
new file mode 100644
index 0000000..99a1669
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bb
@@ -0,0 +1,22 @@
+KBRANCH ?= "v5.4/standard/base"
+
+require recipes-kernel/linux/linux-yocto.inc
+
+SRCREV_machine ?= "e2020dbe2ccaef50d7e8f37a5bf08c68a006a064"
+SRCREV_meta ?= "e8c675c7e11fbd96cd812dfb9f4f6fb6f92b6abb"
+
+SRC_URI = "git://git.yoctoproject.org/linux-yocto.git;name=machine;branch=${KBRANCH}; \
+           git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-5.4;destsuffix=${KMETA}"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
+LINUX_VERSION ?= "5.4.178"
+
+DEPENDS += "openssl-native util-linux-native"
+
+PV = "${LINUX_VERSION}+git${SRCPV}"
+
+KMETA = "kernel-meta"
+KCONF_BSP_AUDIT_LEVEL = "1"
+
+# Functionality flags
+KERNEL_FEATURES:append = " ${KERNEL_EXTRA_FEATURES}"
diff --git a/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bbappend b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bbappend
new file mode 100644
index 0000000..078b684
--- /dev/null
+++ b/meta-arm/meta-gem5/recipes-kernel/linux/linux-yocto_5.4.bbappend
@@ -0,0 +1 @@
+require ${@bb.utils.contains('DISTRO_FEATURES', 'virtualization', 'recipes-kernel/linux/linux-yocto_virtualization.inc', '', d)}