100644 blob b714be4c66f521b2b57ec0e05996a45a76d3124d	0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch
100644 blob 249d4398fd92d9b583bfb4d3a3b3470e57354d05	0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch
100644 blob 0381b5d8473226f190c22938272eff7a3404d947	0003-aspeed-support-passing-system-reset-status-to-kernel.patch
100644 blob 2f8ff45bd7967ab799106968f63b9daf4556e8d4	0004-aspeed-add-gpio-support.patch
100644 blob 0dd736fbaeea7c6edca0d8c01195919cdb68c84a	0005-aspeed-Enable-SPI-master-mode.patch
100644 blob 02a4783622cb71d2e8682f013576dcb8fad585a5	0006-aspeed-support-Mt.Jade-platform-init.patch