From a6daca56b77d7f1b26483f10eb33ebdd6e157d3e Mon Sep 17 00:00:00 2001
From: Peter Hoyes <Peter.Hoyes@arm.com>
Date: Fri, 10 Dec 2021 16:37:26 +0000
Subject: [PATCH 5/9] armv8: Make disabling HVC configurable when switching to
 EL1

On the BASER_FVP there is no EL3, so HVC is used to provide PSCI
services. Therefore we cannot disable hypercalls.

Create CONFIG_ARMV8_DISABLE_HVC (dependent on CONFIG_ARMV8_TO_EL1) to
control whether to disable HVC exceptions in HCR_EL2->HCD

Issue-Id: SCM-3728
Upstream-Status: Inappropriate [other]
  Implementation pending further discussion
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Change-Id: I463d82f1db8a3cafcab40a9c0c208753569cc300
---
 arch/arm/cpu/armv8/Kconfig        |  9 +++++++++
 arch/arm/include/asm/macro.h      | 10 ++++++++--
 configs/vexpress_aemv8r_defconfig |  1 +
 3 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index dec4be0e30..95c03487a2 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -208,4 +208,13 @@ config ARMV8_CE_SHA256
 
 endif
 
+config ARMV8_DISABLE_HVC
+	bool "Disable HVC calls before switching to EL1"
+	depends on ARMV8_SWITCH_TO_EL1
+	default y
+	help
+	  If switching to EL1 before loading the operating system, disable taking
+	  hypercalls back to EL2. May be disabled if, for example, PSCI services are
+	  running at EL2.
+
 endif
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 1a1edc9870..7167739210 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -296,9 +296,12 @@ lr	.req	x30
 	ldr	\tmp2, =(ID_AA64ISAR1_EL1_GPI | ID_AA64ISAR1_EL1_GPA | \
 		      ID_AA64ISAR1_EL1_API | ID_AA64ISAR1_EL1_APA)
 	tst	\tmp, \tmp2
-	mov	\tmp2, #(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS)
+	mov	\tmp2, #(HCR_EL2_RW_AARCH64)
 	orr	\tmp, \tmp2, #(HCR_EL2_APK | HCR_EL2_API)
 	csel	\tmp, \tmp2, \tmp, eq
+#ifdef CONFIG_ARMV8_DISABLE_HVC
+	orr	\tmp, \tmp, #(HCR_EL2_HCD_DIS)
+#endif
 	msr	hcr_el2, \tmp
 
 	/* Return to the EL1_SP1 mode from EL2 */
@@ -311,7 +314,10 @@ lr	.req	x30
 
 1:
 	/* Initialize HCR_EL2 */
-	ldr	\tmp, =(HCR_EL2_RW_AARCH32 | HCR_EL2_HCD_DIS)
+	ldr	\tmp, =(HCR_EL2_RW_AARCH32)
+#ifdef CONFIG_ARMV8_DISABLE_HVC
+	orr	\tmp, \tmp, #(HCR_EL2_HCD_DIS)
+#endif
 	msr	hcr_el2, \tmp
 
 	/* Return to AArch32 Supervisor mode from EL2 */
diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig
index 6044f82b00..6226f6b2c1 100644
--- a/configs/vexpress_aemv8r_defconfig
+++ b/configs/vexpress_aemv8r_defconfig
@@ -18,3 +18,4 @@ CONFIG_SYS_PBSIZE=541
 CONFIG_VIRTIO_MMIO=y
 CONFIG_ARMV8_EXCEPTION_VECTORS=n
 CONFIG_ARMV8_SWITCH_TO_EL1=y
+CONFIG_ARMV8_DISABLE_HVC=n
-- 
2.25.1