update handling of OCC SRAM ECC errors
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I43d993c89eb33179e4194ee74dfb9b9f52ce37ca
diff --git a/analyzer/ras-data/data/ras-data-p10-10.json b/analyzer/ras-data/data/ras-data-p10-10.json
index d78b7a0..22cb676 100644
--- a/analyzer/ras-data/data/ras-data-p10-10.json
+++ b/analyzer/ras-data/data/ras-data-p10-10.json
@@ -32594,10 +32594,10 @@
"00": "self_M_info_only"
},
"2c": {
- "00": "level2_M_th_1"
+ "00": "self_M_th_1"
},
"2d": {
- "00": "self_M_th_1"
+ "00": "self_M_info_only"
},
"2e": {
"00": "self_M_info_only"
diff --git a/analyzer/ras-data/data/ras-data-p10-20.json b/analyzer/ras-data/data/ras-data-p10-20.json
index 215a695..23e620e 100644
--- a/analyzer/ras-data/data/ras-data-p10-20.json
+++ b/analyzer/ras-data/data/ras-data-p10-20.json
@@ -32463,10 +32463,10 @@
"00": "self_M_info_only"
},
"2c": {
- "00": "level2_M_th_1"
+ "00": "self_M_th_1"
},
"2d": {
- "00": "self_M_th_1"
+ "00": "self_M_info_only"
},
"2e": {
"00": "self_M_info_only"