diff --git a/analyzer/analyzer_main.cpp b/analyzer/analyzer_main.cpp
index cf3d195..cf78149 100644
--- a/analyzer/analyzer_main.cpp
+++ b/analyzer/analyzer_main.cpp
@@ -24,22 +24,6 @@
 
 //------------------------------------------------------------------------------
 
-uint8_t __attrType(pdbg_target* i_trgt)
-{
-    uint8_t attr = 0;
-    pdbg_target_get_attribute(i_trgt, "ATTR_TYPE", 1, 1, &attr);
-    return attr;
-}
-
-uint32_t __attrFapiPos(pdbg_target* i_trgt)
-{
-    uint32_t attr = 0;
-    pdbg_target_get_attribute(i_trgt, "ATTR_FAPI_POS", 4, 1, &attr);
-    return attr;
-}
-
-//------------------------------------------------------------------------------
-
 const char* __attn(libhei::AttentionType_t i_attnType)
 {
     const char* str = "";
@@ -69,10 +53,8 @@
 
 uint32_t __trgt(const libhei::Signature& i_sig)
 {
-    auto trgt = (pdbg_target*)i_sig.getChip().getChip();
-
-    uint8_t type = __attrType(trgt);
-    uint32_t pos = __attrFapiPos(trgt);
+    uint8_t type = util::pdbg::getTrgtType(i_sig.getChip());
+    uint32_t pos = util::pdbg::getChipPos(i_sig.getChip());
 
     // Technically, the FapiPos attribute is 32-bit, but not likely to ever go
     // over 24-bit.
@@ -96,7 +78,7 @@
     // TODO: Will need to grab the model/level from the target attributes when
     //       they are available. For now, use ATTR_TYPE to determine which
     //       currently supported value to use supported.
-    uint8_t attrType = __attrType(i_trgt);
+    uint8_t attrType = util::pdbg::getTrgtType(i_trgt);
     switch (attrType)
     {
         case 0x05: // PROC
diff --git a/analyzer/hei_user_interface.cpp b/analyzer/hei_user_interface.cpp
index ee87f79..0f4a441 100644
--- a/analyzer/hei_user_interface.cpp
+++ b/analyzer/hei_user_interface.cpp
@@ -10,6 +10,7 @@
 #include <stdio.h>
 
 #include <hei_user_interface.hpp>
+#include <util/pdbg.hpp>
 #include <util/trace.hpp>
 
 namespace libhei
@@ -58,7 +59,7 @@
         default:
             trace::err("Unsupported register type: trgt=%s regType=0x%02x "
                        "addr=0x%0" PRIx64,
-                       pdbg_target_path(i_procTrgt), i_regType, i_address);
+                       util::pdbg::getPath(i_procTrgt), i_regType, i_address);
             assert(0); // an unsupported register type
     }
 
@@ -87,7 +88,7 @@
         default:
             trace::err("Unsupported register type: trgt=%s regType=0x%02x "
                        "addr=0x%0" PRIx64,
-                       pdbg_target_path(i_obmcTrgt), i_regType, i_address);
+                       util::pdbg::getPath(i_obmcTrgt), i_regType, i_address);
             assert(0);
     }
     */
@@ -102,10 +103,9 @@
 {
     bool accessFailure = false;
 
-    auto trgt = (pdbg_target*)(i_chip.getChip());
+    auto trgt = util::pdbg::getTrgt(i_chip);
 
-    uint8_t trgtType = 0;
-    pdbg_target_get_attribute(trgt, "ATTR_TYPE", 1, 1, &trgtType);
+    uint8_t trgtType = util::pdbg::getTrgtType(trgt);
 
     switch (trgtType)
     {
@@ -119,14 +119,14 @@
 
         default:
             trace::err("Unsupported target type: trgt=%s trgtType=0x%02x",
-                       pdbg_target_path(trgt), trgtType);
+                       util::pdbg::getPath(trgt), trgtType);
             assert(0);
     }
 
     if (accessFailure)
     {
         trace::err("%s failure: trgt=%s addr=0x%0" PRIx64, __regType(i_regType),
-                   pdbg_target_path(trgt), i_address);
+                   util::pdbg::getPath(trgt), i_address);
         o_value = 0; // just in case
     }