Add simulated SCOM/CFAM read support for test
Change-Id: I615f1819cd309528735d63f2e6e4b4181c58fd34
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
diff --git a/test/pdbg-sim-only.cpp b/test/pdbg-sim-only.cpp
index efeee51..2e81fe5 100644
--- a/test/pdbg-sim-only.cpp
+++ b/test/pdbg-sim-only.cpp
@@ -8,6 +8,7 @@
#include <assert.h>
+#include <test/sim-hw-access.hpp>
#include <util/pdbg.hpp>
#include <util/trace.hpp>
@@ -22,6 +23,8 @@
namespace pdbg
{
+//------------------------------------------------------------------------------
+
// This is the simulated version of this function.
bool queryLpcTimeout(pdbg_target* target)
{
@@ -32,5 +35,44 @@
return g_lpcTimeout;
}
+//------------------------------------------------------------------------------
+
+int getScom(pdbg_target* i_target, uint64_t i_addr, uint64_t& o_val)
+{
+ assert(nullptr != i_target);
+ assert(TYPE_PROC == getTrgtType(i_target) ||
+ TYPE_OCMB == getTrgtType(i_target));
+
+ int rc = sim::ScomAccess::getSingleton().get(i_target, i_addr, o_val);
+
+ if (0 != rc)
+ {
+ trace::err("SCOM read failure: target=%s addr=0x%0" PRIx64,
+ getPath(i_target), i_addr);
+ }
+
+ return rc;
+}
+
+//------------------------------------------------------------------------------
+
+int getCfam(pdbg_target* i_target, uint32_t i_addr, uint32_t& o_val)
+{
+ assert(nullptr != i_target);
+ assert(TYPE_PROC == getTrgtType(i_target));
+
+ int rc = sim::CfamAccess::getSingleton().get(i_target, i_addr, o_val);
+
+ if (0 != rc)
+ {
+ trace::err("CFAM read failure: target=%s addr=0x%08x",
+ getPath(i_target), i_addr);
+ }
+
+ return rc;
+}
+
+//------------------------------------------------------------------------------
+
} // namespace pdbg
} // namespace util